LLVM 18.0.0git
AMDGPUGlobalISelUtils.h
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1//===- AMDGPUGlobalISelUtils -------------------------------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
10#define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
11
12#include "llvm/ADT/ArrayRef.h"
14#include <utility>
15
16namespace llvm {
17
18class MachineRegisterInfo;
19class GCNSubtarget;
20class GISelKnownBits;
21class LLT;
22
23namespace AMDGPU {
24
25/// Returns base register and constant offset.
26std::pair<Register, unsigned>
27getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg,
28 GISelKnownBits *KnownBits = nullptr,
29 bool CheckNUW = false);
30
31bool hasAtomicFaddRtnForTy(const GCNSubtarget &Subtarget, const LLT &Ty);
32}
33}
34
35#endif
unsigned const MachineRegisterInfo * MRI
unsigned Reg
bool hasAtomicFaddRtnForTy(const GCNSubtarget &Subtarget, const LLT &Ty)
std::pair< Register, unsigned > getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg, GISelKnownBits *KnownBits=nullptr, bool CheckNUW=false)
Returns base register and constant offset.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18