LLVM 17.0.0git
ARMTargetMachine.h
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1//===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the ARM specific subclass of TargetMachine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
14#define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
15
16#include "ARMSubtarget.h"
17#include "llvm/ADT/StringMap.h"
18#include "llvm/ADT/StringRef.h"
22#include <memory>
23#include <optional>
24
25namespace llvm {
26
28public:
29 enum ARMABI {
32 ARM_ABI_AAPCS, // ARM EABI
35
36protected:
37 std::unique_ptr<TargetLoweringObjectFile> TLOF;
40
41public:
42 ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
44 std::optional<Reloc::Model> RM,
45 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
46 bool isLittle);
48
49 const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
50 // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
51 // subtargets are per-function entities based on the target-specific
52 // attributes of each function.
53 const ARMSubtarget *getSubtargetImpl() const = delete;
54 bool isLittleEndian() const { return isLittle; }
55
57
58 // Pass Pipeline Configuration
60
62 return TLOF.get();
63 }
64
65 bool isTargetHardFloat() const {
73 }
74
75 bool targetSchedulesPostRAScheduling() const override { return true; };
76
79 const TargetSubtargetInfo *STI) const override;
80
81 /// Returns true if a cast between SrcAS and DestAS is a noop.
82 bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
83 // Addrspacecasts are always noops.
84 return true;
85 }
86};
87
88/// ARM/Thumb little endian target machine.
89///
91public:
92 ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
94 std::optional<Reloc::Model> RM,
95 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
96 bool JIT);
97};
98
99/// ARM/Thumb big endian target machine.
100///
102public:
103 ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
105 std::optional<Reloc::Model> RM,
106 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
107 bool JIT);
108};
109
110} // end namespace llvm
111
112#endif // LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
This file defines the StringMap class.
#define F(x, y, z)
Definition: MD5.cpp:55
Basic Register Allocator
This pass exposes codegen information to IR-level passes.
ARM/Thumb big endian target machine.
TargetLoweringObjectFile * getObjFileLowering() const override
std::unique_ptr< TargetLoweringObjectFile > TLOF
enum llvm::ARMBaseTargetMachine::ARMABI TargetABI
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override
Returns true if a cast between SrcAS and DestAS is a noop.
bool targetSchedulesPostRAScheduling() const override
True if subtarget inserts the final scheduling pass on its own.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
const ARMSubtarget * getSubtargetImpl() const =delete
StringMap< std::unique_ptr< ARMSubtarget > > SubtargetMap
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
ARM/Thumb little endian target machine.
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
This class describes a target machine that is implemented with the LLVM target-independent code gener...
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:111
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:97
std::unique_ptr< const MCSubtargetInfo > STI
TargetOptions Options
Target-Independent Code Generator Pass Configuration Options.
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
@ MuslEABIHF
Definition: Triple.h:247
SubArchType getSubArch() const
get the parsed subarchitecture type for this triple.
Definition: Triple.h:358
bool isOSBinFormatMachO() const
Tests whether the environment is MachO.
Definition: Triple.h:687
EnvironmentType getEnvironment() const
Get the parsed environment type of this triple.
Definition: Triple.h:372
bool isOSWindows() const
Tests whether the OS is Windows.
Definition: Triple.h:583
@ ARMSubArch_v7em
Definition: Triple.h:134
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
Level
Code generation optimization level.
Definition: CodeGen.h:57
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...