LLVM 19.0.0git
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1//=== LoongArchDeadRegisterDefinitions.cpp - Replace dead defs w/ zero reg ===//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
9// This pass rewrites Rd to r0 for instrs whose return values are unused.
13#include "LoongArch.h"
14#include "LoongArchInstrInfo.h"
15#include "LoongArchSubtarget.h"
16#include "llvm/ADT/Statistic.h"
23using namespace llvm;
24#define DEBUG_TYPE "loongarch-dead-defs"
25#define LoongArch_DEAD_REG_DEF_NAME "LoongArch Dead register definitions"
27STATISTIC(NumDeadDefsReplaced, "Number of dead definitions replaced");
29namespace {
30class LoongArchDeadRegisterDefinitions : public MachineFunctionPass {
32 static char ID;
34 LoongArchDeadRegisterDefinitions() : MachineFunctionPass(ID) {}
35 bool runOnMachineFunction(MachineFunction &MF) override;
36 void getAnalysisUsage(AnalysisUsage &AU) const override {
37 AU.setPreservesCFG();
45 }
47 StringRef getPassName() const override { return LoongArch_DEAD_REG_DEF_NAME; }
49} // end anonymous namespace
51char LoongArchDeadRegisterDefinitions::ID = 0;
52INITIALIZE_PASS(LoongArchDeadRegisterDefinitions, DEBUG_TYPE,
53 LoongArch_DEAD_REG_DEF_NAME, false, false)
56 return new LoongArchDeadRegisterDefinitions();
59bool LoongArchDeadRegisterDefinitions::runOnMachineFunction(
60 MachineFunction &MF) {
61 if (skipFunction(MF.getFunction()))
62 return false;
66 LiveIntervals &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS();
67 LLVM_DEBUG(dbgs() << "***** LoongArchDeadRegisterDefinitions *****\n");
69 bool MadeChange = false;
70 for (MachineBasicBlock &MBB : MF) {
71 for (MachineInstr &MI : MBB) {
72 // We only handle non-computational instructions.
73 const MCInstrDesc &Desc = MI.getDesc();
74 if (!Desc.mayLoad() && !Desc.mayStore() &&
75 !Desc.hasUnmodeledSideEffects())
76 continue;
77 for (int I = 0, E = Desc.getNumDefs(); I != E; ++I) {
78 MachineOperand &MO = MI.getOperand(I);
79 if (!MO.isReg() || !MO.isDef() || MO.isEarlyClobber())
80 continue;
81 // Be careful not to change the register if it's a tied operand.
82 if (MI.isRegTiedToUseOperand(I)) {
83 LLVM_DEBUG(dbgs() << " Ignoring, def is tied operand.\n");
84 continue;
85 }
86 Register Reg = MO.getReg();
87 if (!Reg.isVirtual() || !MO.isDead())
88 continue;
89 LLVM_DEBUG(dbgs() << " Dead def operand #" << I << " in:\n ";
90 MI.print(dbgs()));
91 const TargetRegisterClass *RC = TII->getRegClass(Desc, I, TRI, MF);
92 if (!(RC && RC->contains(LoongArch::R0))) {
93 LLVM_DEBUG(dbgs() << " Ignoring, register is not a GPR.\n");
94 continue;
95 }
96 assert(LIS.hasInterval(Reg));
97 LIS.removeInterval(Reg);
98 MO.setReg(LoongArch::R0);
99 LLVM_DEBUG(dbgs() << " Replacing with zero register. New:\n ";
100 MI.print(dbgs()));
101 ++NumDeadDefsReplaced;
102 MadeChange = true;
103 }
104 }
105 }
107 return MadeChange;
MachineBasicBlock & MBB
#define LLVM_DEBUG(X)
Definition: Debug.h:101
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define LoongArch_DEAD_REG_DEF_NAME
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:38
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
Definition: Statistic.h:167
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:269
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
bool hasInterval(Register Reg) const
void removeInterval(Register Reg)
Interval removal.
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:198
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Function & getFunction()
Return the LLVM function that this machine code represents.
Representation of each machine instruction.
Definition: MachineInstr.h:69
MachineOperand class - Representation of each machine instruction operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void setReg(Register Reg)
Change the register this operand corresponds to.
bool isEarlyClobber() const
Register getReg() const
getReg - Returns the register number.
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
Definition: Pass.cpp:130
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
TargetInstrInfo - Interface to description of machine instruction set.
bool contains(Register Reg) const
Return true if the specified register is included in this register class.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
FunctionPass * createLoongArchDeadRegisterDefinitionsPass()
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
Description of the encoding of one expression Op.