Go to the documentation of this file.
23 #include "llvm/Config/llvm-config.h"
36 cl::desc(
"Number of registers to limit to when "
37 "printing regmask operands in IR dumps. "
66 SmallContents.RegNo =
Reg;
72 SmallContents.RegNo =
Reg;
100 assert(
isReg() &&
"Wrong MachineOperand accessor");
101 assert((!Val || !
isDebug()) &&
"Marking a debug operation as def");
104 assert(!IsDeadOrKill &&
"Changing def/use with dead/kill set not supported");
117 assert(
isReg() &&
"Wrong MachineOperand accessor");
119 "isRenamable should only be checked on physical registers");
135 assert(
isReg() &&
"Wrong MachineOperand accessor");
137 "setIsRenamable should only be called on physical registers");
143 void MachineOperand::removeRegFromUses() {
144 if (!
isReg() || !isOnRegUseList())
148 MF->getRegInfo().removeRegOperandFromUseList(
this);
160 Contents.ImmVal = ImmVal;
165 unsigned TargetFlags) {
171 Contents.CFP = FPImm;
176 unsigned TargetFlags) {
178 "Cannot change a tied operand into an external symbol");
183 Contents.OffsetedInfo.Val.SymbolName = SymName;
189 unsigned TargetFlags) {
191 "Cannot change a tied operand into a global address");
196 Contents.OffsetedInfo.Val.GV = GV;
203 "Cannot change a tied operand into an MCSymbol");
214 "Cannot change a tied operand into a FrameIndex");
224 unsigned TargetFlags) {
226 "Cannot change a tied operand into a FrameIndex");
240 bool isKill,
bool isDead,
bool isUndef,
244 RegInfo = &MF->getRegInfo();
247 bool WasReg =
isReg();
248 if (RegInfo && WasReg)
260 SmallContents.RegNo =
Reg;
261 SubReg_TargetFlags = 0;
267 IsInternalRead =
false;
268 IsEarlyClobber =
false;
271 Contents.Reg.Prev =
nullptr;
322 if (RegMask == OtherRegMask)
331 return std::equal(RegMask, RegMask + RegMaskSize, OtherRegMask);
409 TRI = MF->getSubtarget().getRegisterInfo();
410 IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
416 assert(
TII &&
"expected instruction info");
417 auto Indices =
TII->getSerializableTargetIndices();
418 auto Found =
find_if(Indices, [&](
const std::pair<int, const char *> &
I) {
421 if (Found != Indices.end())
422 return Found->second;
433 for (
const auto &
I : Flags) {
444 OS <<
"%dwarfreg." << DwarfReg;
465 }
else if (
const Module *
M =
F->getParent()) {
487 OS <<
"syncscope(\"";
488 printEscapedString(SSNs[SSID], OS);
496 auto Flags =
TII.getSerializableMachineMemOperandTargetFlags();
497 for (
const auto &
I : Flags) {
498 if (
I.first == TMMOFlag) {
511 if (Alloca->hasName())
512 Name = Alloca->getName();
530 if (!
Op.getTargetFlags())
537 assert(
TII &&
"expected instruction info");
539 OS <<
"target-flags(";
540 const bool HasDirectFlags = Flags.first;
541 const bool HasBitmaskFlags = Flags.second;
542 if (!HasDirectFlags && !HasBitmaskFlags) {
546 if (HasDirectFlags) {
550 OS <<
"<unknown target flag>";
552 if (!HasBitmaskFlags) {
556 bool IsCommaNeeded = HasDirectFlags;
557 unsigned BitMask = Flags.second;
559 for (
const auto &
Mask : BitMasks) {
561 if ((BitMask &
Mask.first) ==
Mask.first) {
564 IsCommaNeeded =
true;
567 BitMask &= ~(
Mask.first);
575 OS <<
"<unknown bitmask target flag>";
581 OS <<
"<mcsymbol " << Sym <<
">";
601 OS <<
" - " << -Offset;
604 OS <<
" + " << Offset;
624 OS <<
"remember_state ";
629 OS <<
"restore_state ";
641 OS <<
"def_cfa_register ";
647 OS <<
"def_cfa_offset ";
660 OS <<
"llvm_def_aspace_cfa ";
675 OS <<
"adjust_cfa_offset ";
692 for (
size_t i = 0;
i <
e; ++
i)
713 OS <<
"window_save ";
718 OS <<
"negate_ra_sign_state ";
724 OS <<
"<unserializable cfi directive>";
739 print(OS, DummyMST, TypeToPrint,
None,
false,
742 0,
TRI, IntrinsicInfo);
747 bool IsStandalone,
bool ShouldPrintRegisterTies,
748 unsigned TiedOperandIdx,
756 OS << (
isDef() ?
"implicit-def " :
"implicit ");
757 else if (PrintDef &&
isDef())
769 OS <<
"early-clobber ";
778 MRI = &MF->getRegInfo();
788 OS <<
".subreg" <<
SubReg;
801 if (ShouldPrintRegisterTies &&
isTied() && !
isDef())
802 OS <<
"(tied-def " << TiedOperandIdx <<
")";
805 OS <<
'(' << TypeToPrint <<
')';
811 const auto *
TII = MF->getSubtarget().getInstrInfo();
812 assert(
TII &&
"expected instruction info");
813 Formatter =
TII->getMIRFormatter();
832 bool IsFixed =
false;
835 MFI = &MF->getFrameInfo();
844 OS <<
"target-index(";
845 const char *
Name =
"<unknown>";
848 Name = TargetIndexName;
872 OS <<
"blockaddress(";
884 unsigned NumRegsInMask = 0;
885 unsigned NumRegsEmitted = 0;
887 unsigned MaskWord =
i / 32;
888 unsigned MaskBit =
i % 32;
889 if (
getRegMask()[MaskWord] & (1 << MaskBit)) {
898 if (NumRegsEmitted != NumRegsInMask)
899 OS <<
" and " << (NumRegsInMask - NumRegsEmitted) <<
" more...";
912 bool IsCommaNeeded =
false;
914 if (RegMask[
Reg / 32] & (1U << (
Reg % 32))) {
918 IsCommaNeeded =
true;
935 OS <<
"<cfi directive>";
940 if (
ID < Intrinsic::num_intrinsics)
942 else if (IntrinsicInfo)
943 OS <<
"intrinsic(@" << IntrinsicInfo->
getName(
ID) <<
')';
945 OS <<
"intrinsic(" <<
ID <<
')';
955 OS <<
"shufflemask(";
958 for (
int Elt :
Mask) {
960 OS << Separator <<
"undef";
962 OS << Separator << Elt;
971 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
991 if (BasePtr ==
nullptr)
1007 int FI, int64_t Offset) {
1020 int64_t Offset, uint8_t
ID) {
1034 AAInfo(AAInfo), Ranges(Ranges) {
1037 "invalid pointer value");
1040 AtomicInfo.SSID =
static_cast<unsigned>(SSID);
1042 AtomicInfo.Ordering =
static_cast<unsigned>(Ordering);
1044 AtomicInfo.FailureOrdering =
static_cast<unsigned>(FailureOrdering);
1055 s == ~UINT64_C(0) ?
LLT() :
LLT::scalar(8 *
s),
a,
1056 AAInfo, Ranges, SSID, Ordering, FailureOrdering) {}
1081 PtrInfo = MMO->PtrInfo;
1100 OS <<
"non-temporal ";
1102 OS <<
"dereferenceable ";
1116 "machine memory operand must be a load or store (or both)");
1132 OS <<
"unknown-size";
1139 assert(PVal &&
"Expected a pseudo source value");
1140 switch (PVal->kind()) {
1151 OS <<
"constant-pool";
1154 int FrameIndex = cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex();
1155 bool IsFixed =
true;
1160 OS <<
"call-entry ";
1161 cast<GlobalValuePseudoSourceValue>(PVal)->getValue()->printAsOperand(
1165 OS <<
"call-entry &";
1167 OS, cast<ExternalSymbolPseudoSourceValue>(PVal)->getSymbol());
1185 <<
"unknown-address";
1198 OS <<
", !alias.scope ";
1202 OS <<
", !noalias ";
1212 OS <<
", addrspace " << AS;
StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI, const TargetRegisterInfo *TRI)
MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, uint64_t s, Align a, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
Construct a MachineMemOperand object with the specified PtrInfo, flags, size, and base alignment.
@ MO_BlockAddress
Address of a basic block.
const PseudoSourceValue * getGOT()
Return a pseudo source value referencing the global offset table (or something the like).
@ MO_Immediate
Immediate operand.
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
bool isNull() const
Test if the pointer held in the union is null, regardless of which type it is.
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
This is an optimization pass for GlobalISel generic memory operations.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
static void tryToGetTargetInfo(const MachineOperand &MO, const TargetRegisterInfo *&TRI, const TargetIntrinsicInfo *&IntrinsicInfo)
A parsed version of the target data layout string in and methods for querying it.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Align getAlign() const
Return the minimum known alignment in bytes of the actual memory reference.
@ MO_ShuffleMask
Other IR Constant for ISel (shuffle masks)
const GlobalValue * getGlobal() const
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
@ MO_RegisterLiveOut
Mask of live-out registers.
void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
virtual const TargetInstrInfo * getInstrInfo() const
static const MachineFunction * getMFIfAvailable(const MachineOperand &MO)
static MachinePointerInfo getConstantPool(MachineFunction &MF)
Return a MachinePointerInfo record that refers to the constant pool.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
static void printIRSlotNumber(raw_ostream &OS, int Slot)
Print an IRSlotNumber.
Intrinsic::ID getIntrinsicID() const
static MachinePointerInfo getUnknownStack(MachineFunction &MF)
Stack memory without other information.
void printLLVMNameWithoutPrefix(raw_ostream &OS, StringRef Name)
Print out a name of an LLVM value without any prefixes.
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
const BlockAddress * getBlockAddress() const
int64_t getOffset() const
For normal values, this is a byte offset added to the base address.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
const Function * getCurrentFunction() const
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Reg
All possible values of the reg field in the ModR/M byte.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
const void * getOpaqueValue() const
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
A description of a memory reference used in the backend.
@ MO_CFIIndex
MCCFIInstruction index.
const char * getTargetIndexName() const
getTargetIndexName - If this MachineOperand is a TargetIndex that has a name, attempt to get the name...
PseudoSourceValueManager & getPSVManager() const
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
void getSyncScopeNames(SmallVectorImpl< StringRef > &SSNs) const
getSyncScopeNames - Populates client supplied SmallVector with synchronization scope names registered...
void ChangeToTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Replace this operand with a target index.
void incorporateFunction(const Function &F)
Incorporate the given function.
const PseudoSourceValue * getStack()
Return a pseudo source value referencing the area below the stack frame of a function,...
void ChangeToFrameIndex(int Idx, unsigned TargetFlags=0)
Replace this operand with a frame index.
static StringRef getPredicateName(Predicate P)
MDNode * Scope
The tag for alias scope specification (used with noalias).
hash_code hash_value(const APFloat &Arg)
See friend declarations above.
AAMDNodes getAAInfo() const
Return the AA tags for the memory reference.
int64_t getOffset() const
Return the offset from the symbol in this operand.
Manage lifetime of a slot tracker for printing IR.
unsigned const TargetRegisterInfo * TRI
T get() const
Returns the value of the specified pointer type.
static MachinePointerInfo getJumpTable(MachineFunction &MF)
Return a MachinePointerInfo record that refers to a jump table entry.
MCSymbol * getMCSymbol() const
@ MO_Register
Register operand.
LLVM Basic Block Representation.
bool is() const
Test if the Union currently holds the type matching T.
=0.0 ? 0.0 :(a > 0.0 ? 1.0 :-1.0) a
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
static bool isUndef(ArrayRef< int > Mask)
TargetIntrinsicInfo - Interface to description of machine instruction set.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
int64_t Offset
Offset - This is an offset from the base Value*.
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
TargetInstrInfo - Interface to description of machine instruction set.
Align getBaseAlign() const
Return the minimum known alignment in bytes of the base address, without the offset.
void ChangeToRegister(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
ChangeToRegister - Replace this operand with a new register operand of the specified value.
Itanium Name Demangler i e convert the string _Z1fv into f()". You can also use the CRTP base ManglingParser to perform some simple analysis on the mangled name
@ MO_GlobalAddress
Address of a global value.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
unsigned getAddrSpace() const
static const char * getTargetIndexName(const MachineFunction &MF, int Index)
const Value * getValue() const
Return the base address of the memory access.
(vector float) vec_cmpeq(*A, *B) C
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
void setSubReg(unsigned subReg)
@ MO_FrameIndex
Abstract Stack Frame Index.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
static MachinePointerInfo getGOT(MachineFunction &MF)
Return a MachinePointerInfo record that refers to a GOT entry.
const HexagonInstrInfo * TII
void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags=0)
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value.
MachineOperand class - Representation of each machine instruction operand.
This class implements an extremely fast bulk output stream that can only output to a stream.
ConstantFP - Floating Point Values [float, double].
void ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
OpType getOperation() const
Printable printJumpTableEntryReference(unsigned Idx)
Prints a jump table entry reference.
void setTargetFlags(unsigned F)
@ System
Synchronized with respect to all concurrently executing threads.
Special value supplied for machine level alias analysis.
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS, const TargetRegisterInfo *TRI)
This struct is a compact representation of a valid (non-zero power of two) alignment.
int getObjectIndexBegin() const
Return the minimum frame object index.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
MachinePointerInfo(const Value *v, int64_t offset=0, uint8_t ID=0)
unsigned getRegister() const
static void printOperandOffset(raw_ostream &OS, int64_t Offset)
Print the offset with explicit +/- signs.
SyncScope::ID getSyncScopeID() const
Returns the synchronization scope ID for this memory operation.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
bool def_empty(Register RegNo) const
def_empty - Return true if there are no instructions defining the specified register (it may be live-...
Optional< unsigned > getLLVMRegNum(unsigned RegNum, bool isEH) const
Map a dwarf register back to a target register.
void Profile(FoldingSetNodeID &ID) const
Profile - Gather unique data for the object.
const MDNode * getMetadata() const
@ ExternalSymbolCallEntry
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
AtomicOrdering
Atomic ordering for LLVM's memory model.
@ MO_Metadata
Metadata reference (for debug info)
void ChangeToFPImmediate(const ConstantFP *FPImm, unsigned TargetFlags=0)
ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value.
unsigned getTargetFlags() const
void substVirtReg(Register Reg, unsigned SubIdx, const TargetRegisterInfo &)
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.
constexpr LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
bool isDereferenceable(unsigned Size, LLVMContext &C, const DataLayout &DL) const
Return true if memory region [V, V+Offset+Size) is known to be dereferenceable.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const ConstantInt * getCImm() const
Representation of each machine instruction.
bool isDereferenceable() const
multiplies can be turned into SHL s
This class contains a discriminated union of information about pointers in memory operands,...
This is an important class for using LLVM in a threaded context.
@ MO_Predicate
Generic predicate for ISel.
@ MO_MCSymbol
MCSymbol reference (for debug/eh info)
initializer< Ty > init(const Ty &Val)
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const ConstantFP * getFPImm() const
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
unsigned getPredicate() const
unsigned getRegister2() const
Flags
Flags values. These may be or'd together.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool isEarlyClobber() const
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
AtomicOrdering getSuccessOrdering() const
Return the atomic ordering requirements for this memory operation.
ArrayRef< int > getShuffleMask() const
@ MO_TargetIndex
Target-dependent index+offset operand.
static cl::opt< int > PrintRegMaskNumRegs("print-regmask-num-regs", cl::desc("Number of registers to limit to when " "printing regmask operands in IR dumps. " "unlimited = -1"), cl::init(32), cl::Hidden)
LLT getMemoryType() const
Return the memory type of the memory reference.
@ MO_FPImmediate
Floating-point immediate operand.
static void printFrameIndex(raw_ostream &OS, int FrameIndex, bool IsFixed, const MachineFrameInfo *MFI)
Register getReg() const
getReg - Returns the register number.
A Module instance is used to store all the information related to an LLVM module.
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Class for arbitrary precision integers.
bool isIntPredicate() const
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
@ MO_CImmediate
Immediate >64bit operand.
Printable printRegClassOrBank(Register Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
void setIsDef(bool Val=true)
Change a def to a use, or a use to a def.
unsigned getAddressSpace() const
MachineBasicBlock * getMBB() const
std::pair< unsigned, unsigned > decomposeMachineOperandsTargetFlags(unsigned TF) const override
Decompose the machine operand's target flags into two values - the direct target flag value and any o...
PointerUnion< const Value *, const PseudoSourceValue * > V
This is the IR pointer value for the access, or it is null if unknown.
StringRef - Represent a constant reference to a string, i.e.
StringRef getValues() const
void ChangeToES(const char *SymName, unsigned TargetFlags=0)
ChangeToES - Replace this operand with a new external symbol operand.
unsigned composeSubRegIndices(unsigned a, unsigned b) const
Return the subregister index you get from composing two subregister indices.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Type * getType() const
All values are typed, get the type of this value.
void setIsUndef(bool Val=true)
void setIsRenamable(bool Val=true)
@ MO_MachineBasicBlock
MachineBasicBlock reference.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
FoldingSetNodeID - This class is used to gather all the unique data bits of a node.
@ MO_IntrinsicID
Intrinsic ID for ISel.
void removeRegOperandFromUseList(MachineOperand *MO)
Remove MO from its use-def list.
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
unsigned getAllocaAddrSpace() const
virtual std::string getName(unsigned IID, Type **Tys=nullptr, unsigned numTys=0) const =0
Return the name of a target intrinsic, e.g.
unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
unsigned getSubReg() const
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
const PseudoSourceValue * getJumpTable()
Return a pseudo source value referencing a jump table.
constexpr LLVM_NODISCARD size_t size() const
size - Get the string size.
Function * getFunction() const
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
Align commonAlignment(Align A, Align B)
Returns the alignment that satisfies both alignments.
void ChangeToGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
ChangeToGA - Replace this operand with a new global address operand.
void addRegOperandToUseList(MachineOperand *MO)
Add MO to the linked list of operands for its register.
MDNode * NoAlias
The tag specifying the noalias scope.
static const char * getTargetFlagName(const TargetInstrInfo *TII, unsigned TF)
const PseudoSourceValue * getFixedStack(int FI)
Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot.
uint64_t value() const
This is a hole in the type system and should not be abused.
uint64_t getSize() const
Return the size in bytes of the memory reference.
@ MO_ExternalSymbol
Name of external global symbol.
unsigned getCFIIndex() const
void refineAlignment(const MachineMemOperand *MMO)
Update this MachineMemOperand to reflect the alignment of MMO, if it has a greater alignment.
MDNode * TBAA
The tag for type-based alias analysis.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
static bool isValid(const char C)
Returns true if C is a valid mangled character: <0-9a-zA-Z_>.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
hash_code hash_combine(const Ts &...args)
Combine values into a single hash_code.
const char * getSymbolName() const
static const char * getTargetMMOFlagName(const TargetInstrInfo &TII, unsigned TMMOFlag)
void setReg(Register Reg)
Change the register this operand corresponds to.
const char * toIRString(AtomicOrdering ao)
String used by LLVM IR to represent atomic ordering.
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
bool isInternalRead() const
const uint32_t * getRegLiveOut() const
getRegLiveOut - Returns a bit mask of live-out registers.
AtomicOrdering getFailureOrdering() const
For cmpxchg atomic operations, return the atomic ordering requirements when store does not occur.
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
void substPhysReg(MCRegister Reg, const TargetRegisterInfo &)
substPhysReg - Substitute the current register with the physical register Reg, taking any existing Su...
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
an instruction to allocate memory on the stack
@ MO_RegisterMask
Mask of preserved registers.
static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB, ModuleSlotTracker &MST)
bool isNonTemporal() const
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
const MDNode * getRanges() const
Return the range tag for the memory reference.
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)
Stack pointer relative access.
LLVM Value Representation.
Flags getFlags() const
Return the raw flags of the source value,.
const PseudoSourceValue * getConstantPool()
Return a pseudo source value referencing the constant pool.
Optional< std::vector< StOtherPiece > > Other
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
MCSymbol * getLabel() const
Wrapper class representing physical registers. Should be passed by value.
bool isDereferenceableAndAlignedPointer(const Value *V, Type *Ty, Align Alignment, const DataLayout &DL, const Instruction *CtxI=nullptr, const DominatorTree *DT=nullptr, const TargetLibraryInfo *TLI=nullptr)
Returns true if V is always a dereferenceable pointer with alignment greater or equal than requested.
const PseudoSourceValue * getPseudoValue() const
An opaque object representing a hash code.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
void setOffset(int64_t Offset)
static void printSyncScope(raw_ostream &OS, const LLVMContext &Context, SyncScope::ID SSID, SmallVectorImpl< StringRef > &SSNs)