24#include "llvm/Config/llvm-config.h"
38 cl::desc(
"Number of registers to limit to when "
39 "printing regmask operands in IR dumps. "
73 MRI.removeRegOperandFromUseList(
this);
74 SmallContents.RegNo = Reg;
75 MRI.addRegOperandToUseList(
this);
80 SmallContents.RegNo = Reg;
108 assert(
isReg() &&
"Wrong MachineOperand accessor");
109 assert((!Val || !
isDebug()) &&
"Marking a debug operation as def");
112 assert(!IsDeadOrKill &&
"Changing def/use with dead/kill set not supported");
116 MRI.removeRegOperandFromUseList(
this);
118 MRI.addRegOperandToUseList(
this);
125 assert(
isReg() &&
"Wrong MachineOperand accessor");
127 "isRenamable should only be checked on physical registers");
143 assert(
isReg() &&
"Wrong MachineOperand accessor");
145 "setIsRenamable should only be called on physical registers");
151void MachineOperand::removeRegFromUses() {
152 if (!
isReg() || !isOnRegUseList())
156 MF->getRegInfo().removeRegOperandFromUseList(
this);
168 Contents.ImmVal = ImmVal;
173 unsigned TargetFlags) {
179 Contents.CFP = FPImm;
184 unsigned TargetFlags) {
186 "Cannot change a tied operand into an external symbol");
191 Contents.OffsetedInfo.Val.SymbolName = SymName;
197 unsigned TargetFlags) {
199 "Cannot change a tied operand into a global address");
204 Contents.OffsetedInfo.Val.GV = GV;
211 "Cannot change a tied operand into an MCSymbol");
222 "Cannot change a tied operand into a FrameIndex");
232 unsigned TargetFlags) {
234 "Cannot change a tied operand into a FrameIndex");
245 unsigned TargetFlags) {
247 "Cannot change a tied operand into a DbgInstrRef");
261 bool isKill,
bool isDead,
bool isUndef,
265 RegInfo = &MF->getRegInfo();
268 bool WasReg =
isReg();
269 if (RegInfo && WasReg)
281 SmallContents.RegNo = Reg;
282 SubReg_TargetFlags = 0;
288 IsInternalRead =
false;
289 IsEarlyClobber =
false;
292 Contents.Reg.Prev =
nullptr;
343 if (RegMask == OtherRegMask)
350 return std::equal(RegMask, RegMask + RegMaskSize, OtherRegMask);
412 std::vector<stable_hash> RegMaskHashes(RegMask, RegMask + RegMaskSize);
415 RegMaskHashes.size()));
418 assert(0 &&
"MachineOperand not associated with any MachineFunction");
446 TRI = MF->getSubtarget().getRegisterInfo();
447 IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
453 assert(
TII &&
"expected instruction info");
454 auto Indices =
TII->getSerializableTargetIndices();
455 auto Found =
find_if(Indices, [&](
const std::pair<int, const char *> &
I) {
458 if (Found != Indices.end())
459 return Found->second;
470 for (
const auto &
I :
Flags) {
481 OS <<
"%dwarfreg." << DwarfReg;
485 if (std::optional<unsigned> Reg =
TRI->getLLVMRegNum(DwarfReg,
true))
498 std::optional<int> Slot;
502 }
else if (
const Module *M =
F->getParent()) {
524 OS <<
"syncscope(\"";
525 printEscapedString(SSNs[SSID],
OS);
533 auto Flags =
TII.getSerializableMachineMemOperandTargetFlags();
534 for (
const auto &
I :
Flags) {
535 if (
I.first == TMMOFlag) {
548 if (Alloca->hasName())
549 Name = Alloca->getName();
559 if (
TRI &&
Index != 0 && Index < TRI->getNumSubRegIndices())
567 if (!Op.getTargetFlags())
574 assert(
TII &&
"expected instruction info");
576 OS <<
"target-flags(";
577 const bool HasDirectFlags =
Flags.first;
578 const bool HasBitmaskFlags =
Flags.second;
579 if (!HasDirectFlags && !HasBitmaskFlags) {
583 if (HasDirectFlags) {
587 OS <<
"<unknown target flag>";
589 if (!HasBitmaskFlags) {
593 bool IsCommaNeeded = HasDirectFlags;
594 unsigned BitMask =
Flags.second;
596 for (
const auto &Mask : BitMasks) {
598 if ((BitMask & Mask.first) == Mask.first) {
601 IsCommaNeeded =
true;
604 BitMask &= ~(Mask.first);
612 OS <<
"<unknown bitmask target flag>";
618 OS <<
"<mcsymbol " << Sym <<
">";
625 OS <<
"%fixed-stack." << FrameIndex;
629 OS <<
"%stack." << FrameIndex;
661 OS <<
"remember_state ";
666 OS <<
"restore_state ";
678 OS <<
"def_cfa_register ";
684 OS <<
"def_cfa_offset ";
697 OS <<
"llvm_def_aspace_cfa ";
712 OS <<
"adjust_cfa_offset ";
729 for (
size_t i = 0; i < e; ++i)
750 OS <<
"window_save ";
755 OS <<
"negate_ra_sign_state ";
761 OS <<
"<unserializable cfi directive>";
776 print(
OS, DummyMST, TypeToPrint, std::nullopt,
false,
779 0,
TRI, IntrinsicInfo);
783 LLT TypeToPrint, std::optional<unsigned> OpIdx,
784 bool PrintDef,
bool IsStandalone,
785 bool ShouldPrintRegisterTies,
786 unsigned TiedOperandIdx,
794 OS << (
isDef() ?
"implicit-def " :
"implicit ");
795 else if (PrintDef &&
isDef())
807 OS <<
"early-clobber ";
814 if (Reg.isVirtual()) {
816 MRI = &MF->getRegInfo();
829 if (Reg.isVirtual()) {
832 if (IsStandalone || !PrintDef ||
MRI.def_empty(Reg)) {
839 if (ShouldPrintRegisterTies &&
isTied() && !
isDef())
840 OS <<
"(tied-def " << TiedOperandIdx <<
")";
843 OS <<
'(' << TypeToPrint <<
')';
849 const auto *
TII = MF->getSubtarget().getInstrInfo();
850 assert(
TII &&
"expected instruction info");
851 Formatter =
TII->getMIRFormatter();
870 bool IsFixed =
false;
873 MFI = &MF->getFrameInfo();
882 OS <<
"target-index(";
883 const char *
Name =
"<unknown>";
886 Name = TargetIndexName;
910 OS <<
"blockaddress(";
922 unsigned NumRegsInMask = 0;
923 unsigned NumRegsEmitted = 0;
924 for (
unsigned i = 0; i <
TRI->getNumRegs(); ++i) {
925 unsigned MaskWord = i / 32;
926 unsigned MaskBit = i % 32;
927 if (
getRegMask()[MaskWord] & (1 << MaskBit)) {
936 if (NumRegsEmitted != NumRegsInMask)
937 OS <<
" and " << (NumRegsInMask - NumRegsEmitted) <<
" more...";
950 bool IsCommaNeeded =
false;
951 for (
unsigned Reg = 0,
E =
TRI->getNumRegs(); Reg <
E; ++Reg) {
952 if (RegMask[Reg / 32] & (1U << (Reg % 32))) {
956 IsCommaNeeded =
true;
978 OS <<
"<cfi directive>";
983 if (
ID < Intrinsic::num_intrinsics)
985 else if (IntrinsicInfo)
986 OS <<
"intrinsic(@" << IntrinsicInfo->
getName(
ID) <<
')';
988 OS <<
"intrinsic(" <<
ID <<
')';
998 OS <<
"shufflemask(";
1001 for (
int Elt : Mask) {
1003 OS << Separator <<
"undef";
1005 OS << Separator << Elt;
1014#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1034 if (BasePtr ==
nullptr)
1050 int FI, int64_t
Offset) {
1076 : PtrInfo(ptrinfo), MemoryType(type), FlagVals(f), BaseAlign(a),
1077 AAInfo(AAInfo), Ranges(Ranges) {
1080 "invalid pointer value");
1083 AtomicInfo.SSID =
static_cast<unsigned>(SSID);
1085 AtomicInfo.Ordering =
static_cast<unsigned>(Ordering);
1087 AtomicInfo.FailureOrdering =
static_cast<unsigned>(FailureOrdering);
1098 s == ~UINT64_C(0) ?
LLT() :
LLT::scalar(8 * s), a,
1099 AAInfo, Ranges, SSID, Ordering, FailureOrdering) {}
1124 PtrInfo = MMO->PtrInfo;
1143 OS <<
"non-temporal ";
1145 OS <<
"dereferenceable ";
1160 OS <<
"\"MOTargetFlag1\" ";
1162 OS <<
"\"MOTargetFlag2\" ";
1164 OS <<
"\"MOTargetFlag3\" ";
1168 "machine memory operand must be a load or store (or both)");
1184 OS <<
"unknown-size";
1191 assert(PVal &&
"Expected a pseudo source value");
1192 switch (PVal->kind()) {
1203 OS <<
"constant-pool";
1206 int FrameIndex = cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex();
1207 bool IsFixed =
true;
1212 OS <<
"call-entry ";
1213 cast<GlobalValuePseudoSourceValue>(PVal)->getValue()->printAsOperand(
1217 OS <<
"call-entry &";
1219 OS, cast<ExternalSymbolPseudoSourceValue>(PVal)->getSymbol());
1237 <<
"unknown-address";
1250 OS <<
", !alias.scope ";
1254 OS <<
", !noalias ";
1264 OS <<
", addrspace " << AS;
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
Given that RA is a live value
This file defines a hash set that can be used to remove duplication of nodes in a graph.
const HexagonInstrInfo * TII
static bool isUndef(ArrayRef< int > Mask)
This file contains an interface for creating legacy passes to print out IR in various granularities.
static void tryToGetTargetInfo(const MachineInstr &MI, const TargetRegisterInfo *&TRI, const MachineRegisterInfo *&MRI, const TargetIntrinsicInfo *&IntrinsicInfo, const TargetInstrInfo *&TII)
static const MachineFunction * getMFIfAvailable(const MachineInstr &MI)
static void printSyncScope(raw_ostream &OS, const LLVMContext &Context, SyncScope::ID SSID, SmallVectorImpl< StringRef > &SSNs)
static const MachineFunction * getMFIfAvailable(const MachineOperand &MO)
static const char * getTargetIndexName(const MachineFunction &MF, int Index)
static void printFrameIndex(raw_ostream &OS, int FrameIndex, bool IsFixed, const MachineFrameInfo *MFI)
static cl::opt< int > PrintRegMaskNumRegs("print-regmask-num-regs", cl::desc("Number of registers to limit to when " "printing regmask operands in IR dumps. " "unlimited = -1"), cl::init(32), cl::Hidden)
static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB, ModuleSlotTracker &MST)
static const char * getTargetFlagName(const TargetInstrInfo *TII, unsigned TF)
static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS, const TargetRegisterInfo *TRI)
static const char * getTargetMMOFlagName(const TargetInstrInfo &TII, unsigned TMMOFlag)
static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI, const TargetRegisterInfo *TRI)
unsigned const TargetRegisterInfo * TRI
static bool isValid(const char C)
Returns true if C is a valid mangled character: <0-9a-zA-Z_>.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
LLVM Basic Block Representation.
const Function * getParent() const
Return the enclosing method, or null if none.
Function * getFunction() const
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
bool isIntPredicate() const
ConstantFP - Floating Point Values [float, double].
A parsed version of the target data layout string in and methods for querying it.
unsigned getAllocaAddrSpace() const
FoldingSetNodeID - This class is used to gather all the unique data bits of a node.
std::pair< unsigned, unsigned > decomposeMachineOperandsTargetFlags(unsigned TF) const override
Decompose the machine operand's target flags into two values - the direct target flag value and any o...
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
constexpr bool isValid() const
This is an important class for using LLVM in a threaded context.
void getSyncScopeNames(SmallVectorImpl< StringRef > &SSNs) const
getSyncScopeNames - Populates client supplied SmallVector with synchronization scope names registered...
MCSymbol * getLabel() const
unsigned getAddressSpace() const
unsigned getRegister2() const
unsigned getRegister() const
OpType getOperation() const
StringRef getValues() const
Wrapper class representing physical registers. Should be passed by value.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
int getObjectIndexBegin() const
Return the minimum frame object index.
PseudoSourceValueManager & getPSVManager() const
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Representation of each machine instruction.
unsigned getOperandNo(const_mop_iterator I) const
Returns the number of the operand iterator I points to.
A description of a memory reference used in the backend.
AtomicOrdering getFailureOrdering() const
For cmpxchg atomic operations, return the atomic ordering requirements when store does not occur.
const PseudoSourceValue * getPseudoValue() const
MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, uint64_t s, Align a, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
Construct a MachineMemOperand object with the specified PtrInfo, flags, size, and base alignment.
LLT getMemoryType() const
Return the memory type of the memory reference.
unsigned getAddrSpace() const
void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
bool isNonTemporal() const
const MDNode * getRanges() const
Return the range tag for the memory reference.
void refineAlignment(const MachineMemOperand *MMO)
Update this MachineMemOperand to reflect the alignment of MMO, if it has a greater alignment.
uint64_t getSize() const
Return the size in bytes of the memory reference.
SyncScope::ID getSyncScopeID() const
Returns the synchronization scope ID for this memory operation.
const void * getOpaqueValue() const
Flags
Flags values. These may be or'd together.
AtomicOrdering getSuccessOrdering() const
Return the atomic ordering requirements for this memory operation.
Flags getFlags() const
Return the raw flags of the source value,.
Align getAlign() const
Return the minimum known alignment in bytes of the actual memory reference.
bool isDereferenceable() const
void Profile(FoldingSetNodeID &ID) const
Profile - Gather unique data for the object.
AAMDNodes getAAInfo() const
Return the AA tags for the memory reference.
const Value * getValue() const
Return the base address of the memory access.
Align getBaseAlign() const
Return the minimum known alignment in bytes of the base address, without the offset.
int64_t getOffset() const
For normal values, this is a byte offset added to the base address.
MachineOperand class - Representation of each machine instruction operand.
void setSubReg(unsigned subReg)
unsigned getSubReg() const
unsigned getInstrRefOpIndex() const
void setInstrRefInstrIndex(unsigned InstrIdx)
unsigned getOperandNo() const
Returns the index of this operand in the instruction that it belongs to.
const GlobalValue * getGlobal() const
void substVirtReg(Register Reg, unsigned SubIdx, const TargetRegisterInfo &)
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.
void ChangeToFrameIndex(int Idx, unsigned TargetFlags=0)
Replace this operand with a frame index.
const uint32_t * getRegLiveOut() const
getRegLiveOut - Returns a bit mask of live-out registers.
void setInstrRefOpIndex(unsigned OpIdx)
const ConstantInt * getCImm() const
const char * getTargetIndexName() const
getTargetIndexName - If this MachineOperand is a TargetIndex that has a name, attempt to get the name...
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
unsigned getInstrRefInstrIndex() const
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
void ChangeToFPImmediate(const ConstantFP *FPImm, unsigned TargetFlags=0)
ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value.
void setIsRenamable(bool Val=true)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const MDNode * getMetadata() const
MachineBasicBlock * getMBB() const
ArrayRef< int > getShuffleMask() const
void ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
void ChangeToTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Replace this operand with a target index.
void setReg(Register Reg)
Change the register this operand corresponds to.
void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags=0)
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value.
void ChangeToES(const char *SymName, unsigned TargetFlags=0)
ChangeToES - Replace this operand with a new external symbol operand.
void ChangeToGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
ChangeToGA - Replace this operand with a new global address operand.
unsigned getCFIIndex() const
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
static void printOperandOffset(raw_ostream &OS, int64_t Offset)
Print the offset with explicit +/- signs.
void ChangeToDbgInstrRef(unsigned InstrIdx, unsigned OpIdx, unsigned TargetFlags=0)
Replace this operand with an Instruction Reference.
void ChangeToRegister(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
ChangeToRegister - Replace this operand with a new register operand of the specified value.
const BlockAddress * getBlockAddress() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
void substPhysReg(MCRegister Reg, const TargetRegisterInfo &)
substPhysReg - Substitute the current register with the physical register Reg, taking any existing Su...
static unsigned getRegMaskSize(unsigned NumRegs)
Returns number of elements needed for a regmask array.
void setOffset(int64_t Offset)
static void printIRSlotNumber(raw_ostream &OS, int Slot)
Print an IRSlotNumber.
unsigned getTargetFlags() const
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const char * getSymbolName() const
void setIsUndef(bool Val=true)
bool isEarlyClobber() const
Register getReg() const
getReg - Returns the register number.
Intrinsic::ID getIntrinsicID() const
bool isInternalRead() const
void setTargetFlags(unsigned F)
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
void setIsDef(bool Val=true)
Change a def to a use, or a use to a def.
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
const ConstantFP * getFPImm() const
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
unsigned getPredicate() const
MCSymbol * getMCSymbol() const
@ MO_CFIIndex
MCCFIInstruction index.
@ MO_Immediate
Immediate operand.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
@ MO_MCSymbol
MCSymbol reference (for debug/eh info)
@ MO_Predicate
Generic predicate for ISel.
@ MO_GlobalAddress
Address of a global value.
@ MO_RegisterMask
Mask of preserved registers.
@ MO_ShuffleMask
Other IR Constant for ISel (shuffle masks)
@ MO_CImmediate
Immediate >64bit operand.
@ MO_BlockAddress
Address of a basic block.
@ MO_DbgInstrRef
Integer indices referring to an instruction+operand.
@ MO_MachineBasicBlock
MachineBasicBlock reference.
@ MO_FrameIndex
Abstract Stack Frame Index.
@ MO_Register
Register operand.
@ MO_ExternalSymbol
Name of external global symbol.
@ MO_IntrinsicID
Intrinsic ID for ISel.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
@ MO_TargetIndex
Target-dependent index+offset operand.
@ MO_Metadata
Metadata reference (for debug info)
@ MO_FPImmediate
Floating-point immediate operand.
@ MO_RegisterLiveOut
Mask of live-out registers.
int64_t getOffset() const
Return the offset from the symbol in this operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
void removeRegOperandFromUseList(MachineOperand *MO)
Remove MO from its use-def list.
void addRegOperandToUseList(MachineOperand *MO)
Add MO to the linked list of operands for its register.
Manage lifetime of a slot tracker for printing IR.
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
const Function * getCurrentFunction() const
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
bool isNull() const
Test if the pointer held in the union is null, regardless of which type it is.
T get() const
Returns the value of the specified pointer type.
bool is() const
Test if the Union currently holds the type matching T.
const PseudoSourceValue * getJumpTable()
Return a pseudo source value referencing a jump table.
const PseudoSourceValue * getFixedStack(int FI)
Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot.
const PseudoSourceValue * getGOT()
Return a pseudo source value referencing the global offset table (or something the like).
const PseudoSourceValue * getStack()
Return a pseudo source value referencing the area below the stack frame of a function,...
const PseudoSourceValue * getConstantPool()
Return a pseudo source value referencing the constant pool.
Special value supplied for machine level alias analysis.
@ ExternalSymbolCallEntry
Wrapper class representing virtual and physical registers.
bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
StringRef - Represent a constant reference to a string, i.e.
constexpr bool empty() const
empty - Check if the string is empty.
constexpr size_t size() const
size - Get the string size.
TargetInstrInfo - Interface to description of machine instruction set.
TargetIntrinsicInfo - Interface to description of machine instruction set.
virtual std::string getName(unsigned IID, Type **Tys=nullptr, unsigned numTys=0) const =0
Return the name of a target intrinsic, e.g.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetInstrInfo * getInstrInfo() const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
StringRef getName() const
Return a constant reference to the value's name.
An opaque object representing a hash code.
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
@ System
Synchronized with respect to all concurrently executing threads.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
hash_code hash_value(const FixedPointSemantics &Val)
bool isDereferenceableAndAlignedPointer(const Value *V, Type *Ty, Align Alignment, const DataLayout &DL, const Instruction *CtxI=nullptr, AssumptionCache *AC=nullptr, const DominatorTree *DT=nullptr, const TargetLibraryInfo *TLI=nullptr)
Returns true if V is always a dereferenceable pointer with alignment greater or equal than requested.
Printable printJumpTableEntryReference(unsigned Idx)
Prints a jump table entry reference.
const char * toIRString(AtomicOrdering ao)
String used by LLVM IR to represent atomic ordering.
stable_hash stable_hash_combine_array(const stable_hash *P, size_t C)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Printable printRegClassOrBank(Register Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
AtomicOrdering
Atomic ordering for LLVM's memory model.
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
Align commonAlignment(Align A, uint64_t Offset)
Returns the alignment that satisfies both alignments.
hash_code hash_combine(const Ts &...args)
Combine values into a single hash_code.
void printLLVMNameWithoutPrefix(raw_ostream &OS, StringRef Name)
Print out a name of an LLVM value without any prefixes.
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
MDNode * Scope
The tag for alias scope specification (used with noalias).
MDNode * TBAA
The tag for type-based alias analysis.
MDNode * NoAlias
The tag specifying the noalias scope.
This struct is a compact representation of a valid (non-zero power of two) alignment.
uint64_t value() const
This is a hole in the type system and should not be abused.
This class contains a discriminated union of information about pointers in memory operands,...
static MachinePointerInfo getJumpTable(MachineFunction &MF)
Return a MachinePointerInfo record that refers to a jump table entry.
bool isDereferenceable(unsigned Size, LLVMContext &C, const DataLayout &DL) const
Return true if memory region [V, V+Offset+Size) is known to be dereferenceable.
unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)
Stack pointer relative access.
int64_t Offset
Offset - This is an offset from the base Value*.
PointerUnion< const Value *, const PseudoSourceValue * > V
This is the IR pointer value for the access, or it is null if unknown.
static MachinePointerInfo getConstantPool(MachineFunction &MF)
Return a MachinePointerInfo record that refers to the constant pool.
static MachinePointerInfo getUnknownStack(MachineFunction &MF)
Stack memory without other information.
static MachinePointerInfo getGOT(MachineFunction &MF)
Return a MachinePointerInfo record that refers to a GOT entry.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.