LLVM 17.0.0git
LoongArchTargetMachine.cpp
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1//===-- LoongArchTargetMachine.cpp - Define TargetMachine for LoongArch ---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Implements the info about LoongArch target spec.
10//
11//===----------------------------------------------------------------------===//
12
14#include "LoongArch.h"
18#include "llvm/CodeGen/Passes.h"
23#include <optional>
24
25using namespace llvm;
26
27#define DEBUG_TYPE "loongarch"
28
30 // Register the target.
36}
37
38static cl::opt<bool>
39 EnableLoopDataPrefetch("loongarch-enable-loop-data-prefetch", cl::Hidden,
40 cl::desc("Enable the loop data prefetch pass"),
41 cl::init(false));
42
43static std::string computeDataLayout(const Triple &TT) {
44 if (TT.isArch64Bit())
45 return "e-m:e-p:64:64-i64:64-i128:128-n64-S128";
46 assert(TT.isArch32Bit() && "only LA32 and LA64 are currently supported");
47 return "e-m:e-p:32:32-i64:64-n32-S128";
48}
49
51 std::optional<Reloc::Model> RM) {
52 return RM.value_or(Reloc::Static);
53}
54
56 const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
57 const TargetOptions &Options, std::optional<Reloc::Model> RM,
58 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
59 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
61 getEffectiveCodeModel(CM, CodeModel::Small), OL),
62 TLOF(std::make_unique<TargetLoweringObjectFileELF>()) {
64}
65
67
70 Attribute CPUAttr = F.getFnAttribute("target-cpu");
71 Attribute TuneAttr = F.getFnAttribute("tune-cpu");
72 Attribute FSAttr = F.getFnAttribute("target-features");
73
74 std::string CPU =
75 CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
76 std::string TuneCPU =
77 TuneAttr.isValid() ? TuneAttr.getValueAsString().str() : CPU;
78 std::string FS =
79 FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
80
81 std::string Key = CPU + TuneCPU + FS;
82 auto &I = SubtargetMap[Key];
83 if (!I) {
84 // This needs to be done before we create a new subtarget since any
85 // creation will depend on the TM and the code generation flags on the
86 // function that reside in TargetOptions.
88 auto ABIName = Options.MCOptions.getABIName();
89 if (const MDString *ModuleTargetABI = dyn_cast_or_null<MDString>(
90 F.getParent()->getModuleFlag("target-abi"))) {
91 auto TargetABI = LoongArchABI::getTargetABI(ABIName);
92 if (TargetABI != LoongArchABI::ABI_Unknown &&
93 ModuleTargetABI->getString() != ABIName) {
94 report_fatal_error("-target-abi option != target-abi module flag");
95 }
96 ABIName = ModuleTargetABI->getString();
97 }
98 I = std::make_unique<LoongArchSubtarget>(TargetTriple, CPU, TuneCPU, FS,
99 ABIName, *this);
100 }
101 return I.get();
102}
103
105 BumpPtrAllocator &Allocator, const Function &F,
106 const TargetSubtargetInfo *STI) const {
107 return LoongArchMachineFunctionInfo::create<LoongArchMachineFunctionInfo>(
108 Allocator, F, STI);
109}
110
111namespace {
112class LoongArchPassConfig : public TargetPassConfig {
113public:
114 LoongArchPassConfig(LoongArchTargetMachine &TM, PassManagerBase &PM)
115 : TargetPassConfig(TM, PM) {}
116
117 LoongArchTargetMachine &getLoongArchTargetMachine() const {
118 return getTM<LoongArchTargetMachine>();
119 }
120
121 void addIRPasses() override;
122 bool addInstSelector() override;
123 void addPreEmitPass() override;
124 void addPreEmitPass2() override;
125 void addPreRegAlloc() override;
126};
127} // end namespace
128
131 return new LoongArchPassConfig(*this, PM);
132}
133
134void LoongArchPassConfig::addIRPasses() {
135 // Run LoopDataPrefetch
136 //
137 // Run this before LSR to remove the multiplies involved in computing the
138 // pointer values N iterations ahead.
139 if (TM->getOptLevel() != CodeGenOpt::None && EnableLoopDataPrefetch)
141 addPass(createAtomicExpandPass());
142
144}
145
146bool LoongArchPassConfig::addInstSelector() {
147 addPass(createLoongArchISelDag(getLoongArchTargetMachine()));
148
149 return false;
150}
151
152void LoongArchPassConfig::addPreEmitPass() { addPass(&BranchRelaxationPassID); }
153
154void LoongArchPassConfig::addPreEmitPass2() {
155 // Schedule the expansion of AtomicPseudos at the last possible moment,
156 // avoiding the possibility for other passes to break the requirements for
157 // forward progress in the LL/SC block.
159}
160
161void LoongArchPassConfig::addPreRegAlloc() {
163}
static cl::opt< bool > EnableLoopDataPrefetch("aarch64-enable-loop-data-prefetch", cl::Hidden, cl::desc("Enable the loop data prefetch pass"), cl::init(true))
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:127
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static LVOptions Options
Definition: LVOptions.cpp:25
static std::string computeDataLayout()
static cl::opt< bool > EnableLoopDataPrefetch("loongarch-enable-loop-data-prefetch", cl::Hidden, cl::desc("Enable the loop data prefetch pass"), cl::init(false))
static Reloc::Model getEffectiveRelocModel(const Triple &TT, std::optional< Reloc::Model > RM)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLoongArchTarget()
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
const char LLVMTargetMachineRef TM
Basic Register Allocator
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Target-Independent Code Generator Pass Configuration Options pass.
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:317
bool isValid() const
Return true if the attribute is any kind of attribute.
Definition: Attributes.h:187
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
This class describes a target machine that is implemented with the LLVM target-independent code gener...
const LoongArchSubtarget * getSubtargetImpl() const =delete
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
LoongArchTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
StringRef getABIName() const
getABIName - If this returns a non-empty string this represents the textual name of the ABI that we w...
A single uniqued string.
Definition: Metadata.h:611
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:222
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:97
std::string TargetFS
Definition: TargetMachine.h:99
std::string TargetCPU
Definition: TargetMachine.h:98
std::unique_ptr< const MCSubtargetInfo > STI
TargetOptions Options
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
MCTargetOptions MCOptions
Machine level options.
Target-Independent Code Generator Pass Configuration Options.
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
TargetSubtargetInfo - Generic base class for all target subtargets.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
Level
Code generation optimization level.
Definition: CodeGen.h:57
ABI getTargetABI(StringRef ABIName)
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:445
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Target & getTheLoongArch64Target()
FunctionPass * createLoongArchExpandAtomicPseudoPass()
void initializeLoongArchDAGToDAGISelPass(PassRegistry &)
FunctionPass * createAtomicExpandPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
void initializeLoongArchPreRAExpandPseudoPass(PassRegistry &)
FunctionPass * createLoongArchISelDag(LoongArchTargetMachine &TM)
CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
FunctionPass * createLoopDataPrefetchPass()
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:145
Target & getTheLoongArch32Target()
FunctionPass * createLoongArchPreRAExpandPseudoPass()
Definition: BitVector.h:858
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
RegisterTargetMachine - Helper template for registering a target machine implementation,...