LLVM  16.0.0git
MacroFusion.cpp
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1 //===- MacroFusion.cpp - Macro Fusion -------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file This file contains the implementation of the DAG scheduling mutation
10 /// to pair instructions back to back.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/ADT/Statistic.h"
22 #include "llvm/Support/Debug.h"
24 
25 #define DEBUG_TYPE "machine-scheduler"
26 
27 STATISTIC(NumFused, "Number of instr pairs fused");
28 
29 using namespace llvm;
30 
31 static cl::opt<bool> EnableMacroFusion("misched-fusion", cl::Hidden,
32  cl::desc("Enable scheduling for macro fusion."), cl::init(true));
33 
34 static bool isHazard(const SDep &Dep) {
35  return Dep.getKind() == SDep::Anti || Dep.getKind() == SDep::Output;
36 }
37 
38 static SUnit *getPredClusterSU(const SUnit &SU) {
39  for (const SDep &SI : SU.Preds)
40  if (SI.isCluster())
41  return SI.getSUnit();
42 
43  return nullptr;
44 }
45 
46 bool llvm::hasLessThanNumFused(const SUnit &SU, unsigned FuseLimit) {
47  unsigned Num = 1;
48  const SUnit *CurrentSU = &SU;
49  while ((CurrentSU = getPredClusterSU(*CurrentSU)) && Num < FuseLimit) Num ++;
50  return Num < FuseLimit;
51 }
52 
54  SUnit &SecondSU) {
55  // Check that neither instr is already paired with another along the edge
56  // between them.
57  for (SDep &SI : FirstSU.Succs)
58  if (SI.isCluster())
59  return false;
60 
61  for (SDep &SI : SecondSU.Preds)
62  if (SI.isCluster())
63  return false;
64  // Though the reachability checks above could be made more generic,
65  // perhaps as part of ScheduleDAGInstrs::addEdge(), since such edges are valid,
66  // the extra computation cost makes it less interesting in general cases.
67 
68  // Create a single weak edge between the adjacent instrs. The only effect is
69  // to cause bottom-up scheduling to heavily prioritize the clustered instrs.
70  if (!DAG.addEdge(&SecondSU, SDep(&FirstSU, SDep::Cluster)))
71  return false;
72 
73  // TODO - If we want to chain more than two instructions, we need to create
74  // artifical edges to make dependencies from the FirstSU also dependent
75  // on other chained instructions, and other chained instructions also
76  // dependent on the dependencies of the SecondSU, to prevent them from being
77  // scheduled into these chained instructions.
78  assert(hasLessThanNumFused(FirstSU, 2) &&
79  "Currently we only support chaining together two instructions");
80 
81  // Adjust the latency between both instrs.
82  for (SDep &SI : FirstSU.Succs)
83  if (SI.getSUnit() == &SecondSU)
84  SI.setLatency(0);
85 
86  for (SDep &SI : SecondSU.Preds)
87  if (SI.getSUnit() == &FirstSU)
88  SI.setLatency(0);
89 
90  LLVM_DEBUG(
91  dbgs() << "Macro fuse: "; DAG.dumpNodeName(FirstSU); dbgs() << " - ";
92  DAG.dumpNodeName(SecondSU); dbgs() << " / ";
93  dbgs() << DAG.TII->getName(FirstSU.getInstr()->getOpcode()) << " - "
94  << DAG.TII->getName(SecondSU.getInstr()->getOpcode()) << '\n';);
95 
96  // Make data dependencies from the FirstSU also dependent on the SecondSU to
97  // prevent them from being scheduled between the FirstSU and the SecondSU.
98  if (&SecondSU != &DAG.ExitSU)
99  for (const SDep &SI : FirstSU.Succs) {
100  SUnit *SU = SI.getSUnit();
101  if (SI.isWeak() || isHazard(SI) ||
102  SU == &DAG.ExitSU || SU == &SecondSU || SU->isPred(&SecondSU))
103  continue;
104  LLVM_DEBUG(dbgs() << " Bind "; DAG.dumpNodeName(SecondSU);
105  dbgs() << " - "; DAG.dumpNodeName(*SU); dbgs() << '\n';);
106  DAG.addEdge(SU, SDep(&SecondSU, SDep::Artificial));
107  }
108 
109  // Make the FirstSU also dependent on the dependencies of the SecondSU to
110  // prevent them from being scheduled between the FirstSU and the SecondSU.
111  if (&FirstSU != &DAG.EntrySU) {
112  for (const SDep &SI : SecondSU.Preds) {
113  SUnit *SU = SI.getSUnit();
114  if (SI.isWeak() || isHazard(SI) || &FirstSU == SU || FirstSU.isSucc(SU))
115  continue;
116  LLVM_DEBUG(dbgs() << " Bind "; DAG.dumpNodeName(*SU); dbgs() << " - ";
117  DAG.dumpNodeName(FirstSU); dbgs() << '\n';);
118  DAG.addEdge(&FirstSU, SDep(SU, SDep::Artificial));
119  }
120  // ExitSU comes last by design, which acts like an implicit dependency
121  // between ExitSU and any bottom root in the graph. We should transfer
122  // this to FirstSU as well.
123  if (&SecondSU == &DAG.ExitSU) {
124  for (SUnit &SU : DAG.SUnits) {
125  if (SU.Succs.empty())
126  DAG.addEdge(&FirstSU, SDep(&SU, SDep::Artificial));
127  }
128  }
129  }
130 
131  ++NumFused;
132  return true;
133 }
134 
135 namespace {
136 
137 /// Post-process the DAG to create cluster edges between instrs that may
138 /// be fused by the processor into a single operation.
139 class MacroFusion : public ScheduleDAGMutation {
141  bool FuseBlock;
142  bool scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU);
143 
144 public:
145  MacroFusion(ShouldSchedulePredTy shouldScheduleAdjacent, bool FuseBlock)
146  : shouldScheduleAdjacent(shouldScheduleAdjacent), FuseBlock(FuseBlock) {}
147 
148  void apply(ScheduleDAGInstrs *DAGInstrs) override;
149 };
150 
151 } // end anonymous namespace
152 
154  if (FuseBlock)
155  // For each of the SUnits in the scheduling block, try to fuse the instr in
156  // it with one in its predecessors.
157  for (SUnit &ISU : DAG->SUnits)
158  scheduleAdjacentImpl(*DAG, ISU);
159 
160  if (DAG->ExitSU.getInstr())
161  // Try to fuse the instr in the ExitSU with one in its predecessors.
162  scheduleAdjacentImpl(*DAG, DAG->ExitSU);
163 }
164 
165 /// Implement the fusion of instr pairs in the scheduling DAG,
166 /// anchored at the instr in AnchorSU..
167 bool MacroFusion::scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU) {
168  const MachineInstr &AnchorMI = *AnchorSU.getInstr();
169  const TargetInstrInfo &TII = *DAG.TII;
170  const TargetSubtargetInfo &ST = DAG.MF.getSubtarget();
171 
172  // Check if the anchor instr may be fused.
173  if (!shouldScheduleAdjacent(TII, ST, nullptr, AnchorMI))
174  return false;
175 
176  // Explorer for fusion candidates among the dependencies of the anchor instr.
177  for (SDep &Dep : AnchorSU.Preds) {
178  // Ignore dependencies other than data or strong ordering.
179  if (Dep.isWeak() || isHazard(Dep))
180  continue;
181 
182  SUnit &DepSU = *Dep.getSUnit();
183  if (DepSU.isBoundaryNode())
184  continue;
185 
186  // Only chain two instructions together at most.
187  const MachineInstr *DepMI = DepSU.getInstr();
188  if (!hasLessThanNumFused(DepSU, 2) ||
189  !shouldScheduleAdjacent(TII, ST, DepMI, AnchorMI))
190  continue;
191 
192  if (fuseInstructionPair(DAG, DepSU, AnchorSU))
193  return true;
194  }
195 
196  return false;
197 }
198 
199 std::unique_ptr<ScheduleDAGMutation>
203  return std::make_unique<MacroFusion>(shouldScheduleAdjacent, true);
204  return nullptr;
205 }
206 
207 std::unique_ptr<ScheduleDAGMutation>
211  return std::make_unique<MacroFusion>(shouldScheduleAdjacent, false);
212  return nullptr;
213 }
ScheduleDAG.h
MachineInstr.h
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::SDep::Artificial
@ Artificial
Arbitrary strong DAG edge (no real dependence).
Definition: ScheduleDAG.h:72
ScheduleDAGInstrs.h
Statistic.h
llvm::createBranchMacroFusionDAGMutation
std::unique_ptr< ScheduleDAGMutation > createBranchMacroFusionDAGMutation(ShouldSchedulePredTy shouldScheduleAdjacent)
Create a DAG scheduling mutation to pair branch instructions with one of their predecessors back to b...
Definition: MacroFusion.cpp:208
llvm::SDep::Anti
@ Anti
A register anti-dependence (aka WAR).
Definition: ScheduleDAG.h:54
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:140
llvm::ScheduleDAGInstrs::addEdge
bool addEdge(SUnit *SuccSU, const SDep &PredDep)
Add a DAG edge to the given SU with the given predecessor dependence data.
Definition: ScheduleDAGInstrs.cpp:1199
TargetInstrInfo.h
llvm::SUnit::Succs
SmallVector< SDep, 4 > Succs
All sunit successors.
Definition: ScheduleDAG.h:257
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
CommandLine.h
llvm::SUnit::isBoundaryNode
bool isBoundaryNode() const
Boundary nodes are placeholders for the boundary of the scheduling region.
Definition: ScheduleDAG.h:344
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:98
llvm::cl::apply
void apply(Opt *O, const Mod &M, const Mods &... Ms)
Definition: CommandLine.h:1300
SI
@ SI
Definition: SIInstrInfo.cpp:7882
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::fuseInstructionPair
bool fuseInstructionPair(ScheduleDAGInstrs &DAG, SUnit &FirstSU, SUnit &SecondSU)
Create an artificial edge between FirstSU and SecondSU.
Definition: MacroFusion.cpp:53
llvm::SDep::Output
@ Output
A register output-dependence (aka WAW).
Definition: ScheduleDAG.h:55
llvm::createMacroFusionDAGMutation
std::unique_ptr< ScheduleDAGMutation > createMacroFusionDAGMutation(ShouldSchedulePredTy shouldScheduleAdjacent)
Create a DAG scheduling mutation to pair instructions back to back for instructions that benefit acco...
Definition: MacroFusion.cpp:200
llvm::shouldScheduleAdjacent
static bool shouldScheduleAdjacent(const TargetInstrInfo &TII, const TargetSubtargetInfo &TSI, const MachineInstr *FirstMI, const MachineInstr &SecondMI)
Check if the instr pair, FirstMI and SecondMI, should be fused together.
Definition: ARMMacroFusion.cpp:51
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:657
llvm::cl::opt< bool >
llvm::SUnit::isPred
bool isPred(const SUnit *N) const
Tests if node N is a predecessor of this node.
Definition: ScheduleDAG.h:431
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
MacroFusion.h
llvm::ARM_MB::ST
@ ST
Definition: ARMBaseInfo.h:73
llvm::SUnit::getInstr
MachineInstr * getInstr() const
Returns the representative MachineInstr for this SUnit.
Definition: ScheduleDAG.h:373
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:447
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MCInstrInfo::getName
StringRef getName(unsigned Opcode) const
Returns the name for the instructions with the given opcode.
Definition: MCInstrInfo.h:69
ScheduleDAGMutation.h
llvm::SDep::getSUnit
SUnit * getSUnit() const
Definition: ScheduleDAG.h:480
llvm::MachineInstr::getOpcode
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:516
llvm::ScheduleDAG::MF
MachineFunction & MF
Machine function.
Definition: ScheduleDAG.h:559
llvm::ScheduleDAG::EntrySU
SUnit EntrySU
Special node for the region entry.
Definition: ScheduleDAG.h:562
EnableMacroFusion
static cl::opt< bool > EnableMacroFusion("misched-fusion", cl::Hidden, cl::desc("Enable scheduling for macro fusion."), cl::init(true))
llvm::TargetSubtargetInfo
TargetSubtargetInfo - Generic base class for all target subtargets.
Definition: TargetSubtargetInfo.h:62
llvm::SDep
Scheduling dependency.
Definition: ScheduleDAG.h:49
llvm::hasLessThanNumFused
bool hasLessThanNumFused(const SUnit &SU, unsigned FuseLimit)
Checks if the number of cluster edges between SU and its predecessors is less than FuseLimit.
Definition: MacroFusion.cpp:46
llvm::ScheduleDAG::SUnits
std::vector< SUnit > SUnits
The scheduling units.
Definition: ScheduleDAG.h:561
getPredClusterSU
static SUnit * getPredClusterSU(const SUnit &SU)
Definition: MacroFusion.cpp:38
llvm::ScheduleDAG::TII
const TargetInstrInfo * TII
Target instruction information.
Definition: ScheduleDAG.h:557
llvm::SDep::isWeak
bool isWeak() const
Tests if this a weak dependence.
Definition: ScheduleDAG.h:194
llvm::SDep::getKind
Kind getKind() const
Returns an enum value representing the kind of the dependence.
Definition: ScheduleDAG.h:486
llvm::SUnit::isSucc
bool isSucc(const SUnit *N) const
Tests if node N is a successor of this node.
Definition: ScheduleDAG.h:439
llvm::ScheduleDAG::dumpNodeName
void dumpNodeName(const SUnit &SU) const
Definition: ScheduleDAG.cpp:354
llvm::SDep::Cluster
@ Cluster
Weak DAG edge linking a chain of clustered instrs.
Definition: ScheduleDAG.h:74
llvm::ScheduleDAGMutation
Mutate the DAG as a postpass after normal DAG building.
Definition: ScheduleDAGMutation.h:22
isHazard
static bool isHazard(const SDep &Dep)
Definition: MacroFusion.cpp:34
llvm::SUnit::Preds
SmallVector< SDep, 4 > Preds
All sunit predecessors.
Definition: ScheduleDAG.h:256
llvm::SUnit
Scheduling unit. This is a node in the scheduling DAG.
Definition: ScheduleDAG.h:242
llvm::cl::desc
Definition: CommandLine.h:413
llvm::ScheduleDAGInstrs
A ScheduleDAG for scheduling lists of MachineInstr.
Definition: ScheduleDAGInstrs.h:120
raw_ostream.h
STATISTIC
STATISTIC(NumFused, "Number of instr pairs fused")
Debug.h
llvm::ScheduleDAG::ExitSU
SUnit ExitSU
Special node for the region exit.
Definition: ScheduleDAG.h:563
llvm::ShouldSchedulePredTy
std::function< bool(const TargetInstrInfo &TII, const TargetSubtargetInfo &TSI, const MachineInstr *FirstMI, const MachineInstr &SecondMI)> ShouldSchedulePredTy
Check if the instr pair, FirstMI and SecondMI, should be fused together.
Definition: MacroFusion.h:35