LLVM 17.0.0git
NVPTXInstPrinter.cpp
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1//===-- NVPTXInstPrinter.cpp - PTX assembly instruction printing ----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Print MCInst instructions to .ptx format.
10//
11//===----------------------------------------------------------------------===//
12
15#include "NVPTX.h"
16#include "llvm/MC/MCExpr.h"
17#include "llvm/MC/MCInst.h"
18#include "llvm/MC/MCInstrInfo.h"
20#include "llvm/MC/MCSymbol.h"
23#include <cctype>
24using namespace llvm;
25
26#define DEBUG_TYPE "asm-printer"
27
28#include "NVPTXGenAsmWriter.inc"
29
31 const MCRegisterInfo &MRI)
32 : MCInstPrinter(MAI, MII, MRI) {}
33
35 // Decode the virtual register
36 // Must be kept in sync with NVPTXAsmPrinter::encodeVirtualRegister
37 unsigned RCId = (Reg.id() >> 28);
38 switch (RCId) {
39 default: report_fatal_error("Bad virtual register encoding");
40 case 0:
41 // This is actually a physical register, so defer to the autogenerated
42 // register printer
43 OS << getRegisterName(Reg);
44 return;
45 case 1:
46 OS << "%p";
47 break;
48 case 2:
49 OS << "%rs";
50 break;
51 case 3:
52 OS << "%r";
53 break;
54 case 4:
55 OS << "%rd";
56 break;
57 case 5:
58 OS << "%f";
59 break;
60 case 6:
61 OS << "%fd";
62 break;
63 case 7:
64 OS << "%h";
65 break;
66 case 8:
67 OS << "%hh";
68 break;
69 }
70
71 unsigned VReg = Reg.id() & 0x0FFFFFFF;
72 OS << VReg;
73}
74
76 StringRef Annot, const MCSubtargetInfo &STI,
77 raw_ostream &OS) {
79
80 // Next always print the annotation.
81 printAnnotation(OS, Annot);
82}
83
84void NVPTXInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
85 raw_ostream &O) {
86 const MCOperand &Op = MI->getOperand(OpNo);
87 if (Op.isReg()) {
88 unsigned Reg = Op.getReg();
89 printRegName(O, Reg);
90 } else if (Op.isImm()) {
91 O << markup("<imm:") << formatImm(Op.getImm()) << markup(">");
92 } else {
93 assert(Op.isExpr() && "Unknown operand kind in printOperand");
94 Op.getExpr()->print(O, &MAI);
95 }
96}
97
99 const char *Modifier) {
100 const MCOperand &MO = MI->getOperand(OpNum);
101 int64_t Imm = MO.getImm();
102
103 if (strcmp(Modifier, "ftz") == 0) {
104 // FTZ flag
106 O << ".ftz";
107 } else if (strcmp(Modifier, "sat") == 0) {
108 // SAT flag
110 O << ".sat";
111 } else if (strcmp(Modifier, "relu") == 0) {
112 // RELU flag
114 O << ".relu";
115 } else if (strcmp(Modifier, "base") == 0) {
116 // Default operand
117 switch (Imm & NVPTX::PTXCvtMode::BASE_MASK) {
118 default:
119 return;
121 break;
123 O << ".rni";
124 break;
126 O << ".rzi";
127 break;
129 O << ".rmi";
130 break;
132 O << ".rpi";
133 break;
135 O << ".rn";
136 break;
138 O << ".rz";
139 break;
141 O << ".rm";
142 break;
144 O << ".rp";
145 break;
147 O << ".rna";
148 break;
149 }
150 } else {
151 llvm_unreachable("Invalid conversion modifier");
152 }
153}
154
156 const char *Modifier) {
157 const MCOperand &MO = MI->getOperand(OpNum);
158 int64_t Imm = MO.getImm();
159
160 if (strcmp(Modifier, "ftz") == 0) {
161 // FTZ flag
163 O << ".ftz";
164 } else if (strcmp(Modifier, "base") == 0) {
165 switch (Imm & NVPTX::PTXCmpMode::BASE_MASK) {
166 default:
167 return;
169 O << ".eq";
170 break;
172 O << ".ne";
173 break;
175 O << ".lt";
176 break;
178 O << ".le";
179 break;
181 O << ".gt";
182 break;
184 O << ".ge";
185 break;
187 O << ".lo";
188 break;
190 O << ".ls";
191 break;
193 O << ".hi";
194 break;
196 O << ".hs";
197 break;
199 O << ".equ";
200 break;
202 O << ".neu";
203 break;
205 O << ".ltu";
206 break;
208 O << ".leu";
209 break;
211 O << ".gtu";
212 break;
214 O << ".geu";
215 break;
217 O << ".num";
218 break;
220 O << ".nan";
221 break;
222 }
223 } else {
224 llvm_unreachable("Empty Modifier");
225 }
226}
227
229 raw_ostream &O, const char *Modifier) {
230 if (Modifier) {
231 const MCOperand &MO = MI->getOperand(OpNum);
232 int Imm = (int) MO.getImm();
233 if (!strcmp(Modifier, "volatile")) {
234 if (Imm)
235 O << ".volatile";
236 } else if (!strcmp(Modifier, "addsp")) {
237 switch (Imm) {
239 O << ".global";
240 break;
242 O << ".shared";
243 break;
245 O << ".local";
246 break;
248 O << ".param";
249 break;
251 O << ".const";
252 break;
254 break;
255 default:
256 llvm_unreachable("Wrong Address Space");
257 }
258 } else if (!strcmp(Modifier, "sign")) {
260 O << "s";
261 else if (Imm == NVPTX::PTXLdStInstCode::Unsigned)
262 O << "u";
263 else if (Imm == NVPTX::PTXLdStInstCode::Untyped)
264 O << "b";
265 else if (Imm == NVPTX::PTXLdStInstCode::Float)
266 O << "f";
267 else
268 llvm_unreachable("Unknown register type");
269 } else if (!strcmp(Modifier, "vec")) {
271 O << ".v2";
272 else if (Imm == NVPTX::PTXLdStInstCode::V4)
273 O << ".v4";
274 } else
275 llvm_unreachable("Unknown Modifier");
276 } else
277 llvm_unreachable("Empty Modifier");
278}
279
281 const char *Modifier) {
282 const MCOperand &MO = MI->getOperand(OpNum);
283 int Imm = (int)MO.getImm();
284 if (Modifier == nullptr || strcmp(Modifier, "version") == 0) {
285 O << Imm; // Just print out PTX version
286 } else if (strcmp(Modifier, "aligned") == 0) {
287 // PTX63 requires '.aligned' in the name of the instruction.
288 if (Imm >= 63)
289 O << ".aligned";
290 } else
291 llvm_unreachable("Unknown Modifier");
292}
293
295 raw_ostream &O, const char *Modifier) {
296 printOperand(MI, OpNum, O);
297
298 if (Modifier && !strcmp(Modifier, "add")) {
299 O << ", ";
300 printOperand(MI, OpNum + 1, O);
301 } else {
302 if (MI->getOperand(OpNum + 1).isImm() &&
303 MI->getOperand(OpNum + 1).getImm() == 0)
304 return; // don't print ',0' or '+0'
305 O << "+";
306 printOperand(MI, OpNum + 1, O);
307 }
308}
309
311 raw_ostream &O, const char *Modifier) {
312 const MCOperand &Op = MI->getOperand(OpNum);
313 assert(Op.isExpr() && "Call prototype is not an MCExpr?");
314 const MCExpr *Expr = Op.getExpr();
315 const MCSymbol &Sym = cast<MCSymbolRefExpr>(Expr)->getSymbol();
316 O << Sym.getName();
317}
unsigned const MachineRegisterInfo * MRI
IRTranslator LLVM IR MI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:44
StringRef markup(StringRef s) const
Utility functions to make adding mark ups simpler.
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:50
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:26
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
int64_t getImm() const
Definition: MCInst.h:80
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24
Generic base class for all target subtargets.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
StringRef getName() const
getName - Get the symbol name.
Definition: MCSymbol.h:203
void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printMemOperand(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O)
void printLdStCode(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printProtoIdent(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printRegName(raw_ostream &OS, MCRegister Reg) const override
Print the assembler register name.
static const char * getRegisterName(MCRegister Reg)
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &OS) override
Print the specified MCInst to the specified raw_ostream.
void printMmaCode(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
NVPTXInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:145