LLVM 17.0.0git
VirtRegMap.h
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1//===- llvm/CodeGen/VirtRegMap.h - Virtual Register Map ---------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a virtual register map. This maps virtual registers to
10// physical registers and virtual registers to stack slots. It is created and
11// updated by a register allocator and then used by a machine code rewriter that
12// adds spill code and rewrites virtual into physical register references.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_VIRTREGMAP_H
17#define LLVM_CODEGEN_VIRTREGMAP_H
18
19#include "llvm/ADT/IndexedMap.h"
23#include "llvm/Pass.h"
24#include <cassert>
25
26namespace llvm {
27
28class MachineFunction;
29class MachineRegisterInfo;
30class raw_ostream;
31class TargetInstrInfo;
32
34 public:
35 enum {
37 NO_STACK_SLOT = (1L << 30)-1,
38 MAX_STACK_SLOT = (1L << 18)-1
39 };
40
41 private:
42 MachineRegisterInfo *MRI = nullptr;
43 const TargetInstrInfo *TII = nullptr;
44 const TargetRegisterInfo *TRI = nullptr;
45 MachineFunction *MF = nullptr;
46
47 /// Virt2PhysMap - This is a virtual to physical register
48 /// mapping. Each virtual register is required to have an entry in
49 /// it; even spilled virtual registers (the register mapped to a
50 /// spilled register is the temporary used to load it from the
51 /// stack).
53
54 /// Virt2StackSlotMap - This is virtual register to stack slot
55 /// mapping. Each spilled virtual register has an entry in it
56 /// which corresponds to the stack slot this register is spilled
57 /// at.
59
60 /// Virt2SplitMap - This is virtual register to splitted virtual register
61 /// mapping.
63
64 /// Virt2ShapeMap - For X86 AMX register whose register is bound shape
65 /// information.
66 DenseMap<unsigned, ShapeT> Virt2ShapeMap;
67
68 /// createSpillSlot - Allocate a spill slot for RC from MFI.
69 unsigned createSpillSlot(const TargetRegisterClass *RC);
70
71 public:
72 static char ID;
73
75 : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
76 Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) {}
77 VirtRegMap(const VirtRegMap &) = delete;
78 VirtRegMap &operator=(const VirtRegMap &) = delete;
79
80 bool runOnMachineFunction(MachineFunction &MF) override;
81
82 void getAnalysisUsage(AnalysisUsage &AU) const override {
83 AU.setPreservesAll();
85 }
86
88 assert(MF && "getMachineFunction called before runOnMachineFunction");
89 return *MF;
90 }
91
92 MachineRegisterInfo &getRegInfo() const { return *MRI; }
93 const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
94
95 void grow();
96
97 /// returns true if the specified virtual register is
98 /// mapped to a physical register
99 bool hasPhys(Register virtReg) const {
100 return getPhys(virtReg) != NO_PHYS_REG;
101 }
102
103 /// returns the physical register mapped to the specified
104 /// virtual register
105 MCRegister getPhys(Register virtReg) const {
106 assert(virtReg.isVirtual());
107 return MCRegister::from(Virt2PhysMap[virtReg.id()]);
108 }
109
110 /// creates a mapping for the specified virtual register to
111 /// the specified physical register
112 void assignVirt2Phys(Register virtReg, MCPhysReg physReg);
113
114 bool isShapeMapEmpty() const { return Virt2ShapeMap.empty(); }
115
116 bool hasShape(Register virtReg) const {
117 return getShape(virtReg).isValid();
118 }
119
120 ShapeT getShape(Register virtReg) const {
121 assert(virtReg.isVirtual());
122 return Virt2ShapeMap.lookup(virtReg);
123 }
124
125 void assignVirt2Shape(Register virtReg, ShapeT shape) {
126 Virt2ShapeMap[virtReg.id()] = shape;
127 }
128
129 /// clears the specified virtual register's, physical
130 /// register mapping
131 void clearVirt(Register virtReg) {
132 assert(virtReg.isVirtual());
133 assert(Virt2PhysMap[virtReg.id()] != NO_PHYS_REG &&
134 "attempt to clear a not assigned virtual register");
135 Virt2PhysMap[virtReg.id()] = NO_PHYS_REG;
136 }
137
138 /// clears all virtual to physical register mappings
140 Virt2PhysMap.clear();
141 grow();
142 }
143
144 /// returns true if VirtReg is assigned to its preferred physreg.
145 bool hasPreferredPhys(Register VirtReg) const;
146
147 /// returns true if VirtReg has a known preferred register.
148 /// This returns false if VirtReg has a preference that is a virtual
149 /// register that hasn't been assigned yet.
150 bool hasKnownPreference(Register VirtReg) const;
151
152 /// records virtReg is a split live interval from SReg.
153 void setIsSplitFromReg(Register virtReg, Register SReg) {
154 Virt2SplitMap[virtReg.id()] = SReg;
155 if (hasShape(SReg)) {
156 Virt2ShapeMap[virtReg.id()] = getShape(SReg);
157 }
158 }
159
160 /// returns the live interval virtReg is split from.
162 return Virt2SplitMap[virtReg.id()];
163 }
164
165 /// getOriginal - Return the original virtual register that VirtReg descends
166 /// from through splitting.
167 /// A register that was not created by splitting is its own original.
168 /// This operation is idempotent.
170 Register Orig = getPreSplitReg(VirtReg);
171 return Orig ? Orig : VirtReg;
172 }
173
174 /// returns true if the specified virtual register is not
175 /// mapped to a stack slot or rematerialized.
176 bool isAssignedReg(Register virtReg) const {
177 if (getStackSlot(virtReg) == NO_STACK_SLOT)
178 return true;
179 // Split register can be assigned a physical register as well as a
180 // stack slot or remat id.
181 return (Virt2SplitMap[virtReg.id()] &&
182 Virt2PhysMap[virtReg.id()] != NO_PHYS_REG);
183 }
184
185 /// returns the stack slot mapped to the specified virtual
186 /// register
187 int getStackSlot(Register virtReg) const {
188 assert(virtReg.isVirtual());
189 return Virt2StackSlotMap[virtReg.id()];
190 }
191
192 /// create a mapping for the specifed virtual register to
193 /// the next available stack slot
194 int assignVirt2StackSlot(Register virtReg);
195
196 /// create a mapping for the specified virtual register to
197 /// the specified stack slot
198 void assignVirt2StackSlot(Register virtReg, int SS);
199
200 void print(raw_ostream &OS, const Module* M = nullptr) const override;
201 void dump() const;
202 };
203
204 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
205 VRM.print(OS);
206 return OS;
207 }
208
209} // end llvm namespace
210
211#endif // LLVM_CODEGEN_VIRTREGMAP_H
unsigned const MachineRegisterInfo * MRI
This file implements an indexed map.
unsigned const TargetRegisterInfo * TRI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Represent the analysis usage information of a pass.
void setPreservesAll()
Set by analyses that do not transform their input at all.
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
Definition: DenseMap.h:197
bool empty() const
Definition: DenseMap.h:98
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24
static MCRegister from(unsigned Val)
Check the provided unsigned value is a valid MCRegister.
Definition: MCRegister.h:67
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
unsigned id() const
Definition: Register.h:111
bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:91
bool isValid()
Definition: TileShapeInfo.h:65
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool hasKnownPreference(Register VirtReg) const
returns true if VirtReg has a known preferred register.
Definition: VirtRegMap.cpp:118
int assignVirt2StackSlot(Register virtReg)
create a mapping for the specifed virtual register to the next available stack slot
Definition: VirtRegMap.cpp:127
void clearVirt(Register virtReg)
clears the specified virtual register's, physical register mapping
Definition: VirtRegMap.h:131
int getStackSlot(Register virtReg) const
returns the stack slot mapped to the specified virtual register
Definition: VirtRegMap.h:187
void clearAllVirt()
clears all virtual to physical register mappings
Definition: VirtRegMap.h:139
void setIsSplitFromReg(Register virtReg, Register SReg)
records virtReg is a split live interval from SReg.
Definition: VirtRegMap.h:153
bool hasShape(Register virtReg) const
Definition: VirtRegMap.h:116
bool hasPreferredPhys(Register VirtReg) const
returns true if VirtReg is assigned to its preferred physreg.
Definition: VirtRegMap.cpp:109
void print(raw_ostream &OS, const Module *M=nullptr) const override
print - Print out the internal state of the pass.
Definition: VirtRegMap.cpp:145
Register getOriginal(Register VirtReg) const
getOriginal - Return the original virtual register that VirtReg descends from through splitting.
Definition: VirtRegMap.h:169
void dump() const
Definition: VirtRegMap.cpp:167
Register getPreSplitReg(Register virtReg) const
returns the live interval virtReg is split from.
Definition: VirtRegMap.h:161
MachineRegisterInfo & getRegInfo() const
Definition: VirtRegMap.h:92
ShapeT getShape(Register virtReg) const
Definition: VirtRegMap.h:120
static char ID
Definition: VirtRegMap.h:72
MachineFunction & getMachineFunction() const
Definition: VirtRegMap.h:87
MCRegister getPhys(Register virtReg) const
returns the physical register mapped to the specified virtual register
Definition: VirtRegMap.h:105
VirtRegMap(const VirtRegMap &)=delete
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: VirtRegMap.h:82
bool hasPhys(Register virtReg) const
returns true if the specified virtual register is mapped to a physical register
Definition: VirtRegMap.h:99
void assignVirt2Shape(Register virtReg, ShapeT shape)
Definition: VirtRegMap.h:125
bool isAssignedReg(Register virtReg) const
returns true if the specified virtual register is not mapped to a stack slot or rematerialized.
Definition: VirtRegMap.h:176
const TargetRegisterInfo & getTargetRegInfo() const
Definition: VirtRegMap.h:93
VirtRegMap & operator=(const VirtRegMap &)=delete
void assignVirt2Phys(Register virtReg, MCPhysReg physReg)
creates a mapping for the specified virtual register to the specified physical register
Definition: VirtRegMap.cpp:85
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
Definition: VirtRegMap.cpp:63
bool isShapeMapEmpty() const
Definition: VirtRegMap.h:114
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
Definition: APFixedPoint.h:292