15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
16#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
28struct WebAssemblyFunctionInfo;
34 std::vector<MVT> Params;
35 std::vector<MVT> Results;
36 std::vector<MVT> Locals;
39 std::vector<unsigned> WARegs;
52 unsigned VarargVreg = -1U;
56 unsigned BasePtrVreg = -1U;
59 unsigned FrameBaseVreg = -1U;
62 unsigned FrameBaseLocal = -1U;
65 bool CFGStackified =
false;
81 const std::vector<MVT> &
getParams()
const {
return Params; }
94 const std::vector<MVT> &
getLocals()
const {
return Locals; }
97 assert(VarargVreg != -1U &&
"Vararg vreg hasn't been set");
103 assert(BasePtrVreg != -1U &&
"Base ptr vreg hasn't been set");
108 assert(FrameBaseVreg != -1U &&
"Frame base vreg hasn't been set");
109 return FrameBaseVreg;
116 assert(FrameBaseLocal != -1U &&
"Frame base local hasn't been set");
117 return FrameBaseLocal;
126 if (
I >= VRegStackified.
size())
128 VRegStackified.
set(
I);
132 if (
I < VRegStackified.
size())
137 if (
I >= VRegStackified.
size())
139 return VRegStackified.
test(
I);
158 return Reg & INT32_MAX;
166 LLVMContext &Ctx,
const DataLayout &
DL, Type *Ty,
167 SmallVectorImpl<MVT> &ValueVTs);
170 SmallVectorImpl<MVT> &ValueVTs);
175 const Function &ContextFunc,
const TargetMachine &
TM,
176 SmallVectorImpl<MVT> &Params,
177 SmallVectorImpl<MVT> &
Results);
180 SmallVectorImpl<wasm::ValType> &Out);
182std::unique_ptr<wasm::WasmSignature>
184 const SmallVectorImpl<MVT> &Params);
208 YamlIO.mapOptional(
"params", MFI.
Params, std::vector<FlowStringValue>());
209 YamlIO.mapOptional(
"results", MFI.
Results, std::vector<FlowStringValue>());
218 YamlIO.mapRequired(Key.str().c_str(),
219 SrcToUnwindDest[std::atoi(Key.str().c_str())]);
223 for (
auto KV : SrcToUnwindDest)
224 YamlIO.mapRequired(std::to_string(KV.first).c_str(), KV.second);
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Function Alias Analysis Results
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file provides WebAssembly-specific target descriptions.
bool test(unsigned Idx) const
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
size_type size() const
size - Returns the number of bits in this bitvector.
Allocate memory in an ever growing pool, as if by bump-pointer.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
static unsigned virtReg2Index(Register Reg)
Convert a virtual register number to a 0-based index.
StringRef - Represent a constant reference to a string, i.e.
TargetSubtargetInfo - Generic base class for all target subtargets.
LLVM Value Representation.
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
void setFrameBaseVreg(unsigned Reg)
bool isVRegStackified(unsigned VReg) const
bool isCFGStackified() const
WebAssemblyFunctionInfo(const Function &F, const TargetSubtargetInfo *STI)
~WebAssemblyFunctionInfo() override
const std::vector< MVT > & getResults() const
unsigned getFrameBaseLocal() const
static const unsigned UnusedReg
void setLocal(size_t i, MVT VT)
unsigned getWAReg(unsigned VReg) const
MachineFunctionInfo * clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override
Make a functionally equivalent copy of this MachineFunctionInfo in MF.
void initWARegs(MachineRegisterInfo &MRI)
void setWAReg(unsigned VReg, unsigned WAReg)
void clearParamsAndResults()
void setBasePointerVreg(unsigned Reg)
void setNumLocals(size_t NumLocals)
void setVarargBufferVreg(unsigned Reg)
void setCFGStackified(bool Value=true)
unsigned getFrameBaseVreg() const
void setFrameBaseLocal(unsigned Local)
unsigned getVarargBufferVreg() const
void unstackifyVReg(unsigned VReg)
void stackifyVReg(MachineRegisterInfo &MRI, unsigned VReg)
unsigned getBasePointerVreg() const
const std::vector< MVT > & getLocals() const
void clearFrameBaseVreg()
void initializeBaseYamlFields(MachineFunction &MF, const yaml::WebAssemblyFunctionInfo &YamlMFI)
bool isFrameBaseVirtual() const
const std::vector< MVT > & getParams() const
static unsigned getWARegStackId(unsigned Reg)
This is an optimization pass for GlobalISel generic memory operations.
void computeSignatureVTs(const FunctionType *Ty, const Function *TargetFunc, const Function &ContextFunc, const TargetMachine &TM, SmallVectorImpl< MVT > &Params, SmallVectorImpl< MVT > &Results)
void valTypesFromMVTs(const ArrayRef< MVT > &In, SmallVectorImpl< wasm::ValType > &Out)
std::unique_ptr< wasm::WasmSignature > signatureFromMVTs(const SmallVectorImpl< MVT > &Results, const SmallVectorImpl< MVT > &Params)
void computeLegalValueVTs(const WebAssemblyTargetLowering &TLI, LLVMContext &Ctx, const DataLayout &DL, Type *Ty, SmallVectorImpl< MVT > &ValueVTs)
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
static void output(IO &YamlIO, BBNumberMap &SrcToUnwindDest)
static void inputOne(IO &YamlIO, StringRef Key, BBNumberMap &SrcToUnwindDest)
Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.
static void mapping(IO &YamlIO, WebAssemblyFunctionInfo &MFI)
~WebAssemblyFunctionInfo()=default
WebAssemblyFunctionInfo()=default
void mappingImpl(yaml::IO &YamlIO) override
std::vector< FlowStringValue > Results
std::vector< FlowStringValue > Params
BBNumberMap SrcToUnwindDest