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15 #ifndef LLVM_LIB_TARGET_AMDGPU_DISASSEMBLER_AMDGPUDISASSEMBLER_H
16 #define LLVM_LIB_TARGET_AMDGPU_DISASSEMBLER_AMDGPUDISASSEMBLER_H
28 class MCSubtargetInfo;
37 std::unique_ptr<MCInstrInfo const>
const MCII;
39 const unsigned TargetMaxInstBytes;
42 mutable bool HasLiteral;
61 template <
typename InsnType>
68 const auto SavedBytes = Bytes;
69 if (decodeInstruction(Table, TmpInst, Inst, Address,
this,
STI)) {
177 bool MandatoryLiteral =
false)
const;
212 std::vector<uint64_t> ReferencedAddresses;
229 return ReferencedAddresses;
235 #endif // LLVM_LIB_TARGET_AMDGPU_DISASSEMBLER_AMDGPUDISASSEMBLER_H
MCOperand decodeSDWASrc32(unsigned Val) const
bool tryAddingSymbolicOperand(MCInst &Inst, raw_ostream &cStream, int64_t Value, uint64_t Address, bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) override
Try to add a symbolic operand instead of Value to the MCInst.
MCOperand decodeOperand_SReg_64_XEXEC(unsigned Val) const
DecodeStatus convertDPP8Inst(MCInst &MI) const
~AMDGPUDisassembler() override=default
MCOperand decodeOperand_SReg_32_XM0_XEXEC(unsigned Val) const
This is an optimization pass for GlobalISel generic memory operations.
MCOperand decodeOperand_SReg_256(unsigned Val) const
DecodeStatus convertVINTERPInst(MCInst &MI) const
DecodeStatus decodeKernelDescriptorDirective(DataExtractor::Cursor &Cursor, ArrayRef< uint8_t > Bytes, raw_string_ostream &KdStream) const
MCOperand decodeDstOp(const OpWidthTy Width, unsigned Val) const
Context object for machine code objects.
static MCOperand decodeFPImmed(OpWidthTy Width, unsigned Imm)
A raw_ostream that writes to an std::string.
unsigned getTtmpClassId(const OpWidthTy Width) const
DecodeStatus decodeCOMPUTE_PGM_RSRC1(uint32_t FourByteBuffer, raw_string_ostream &KdStream) const
Decode as directives that handle COMPUTE_PGM_RSRC1.
MCOperand decodeOperand_VS_128(unsigned Val) const
DecodeStatus convertMIMGInst(MCInst &MI) const
MCOperand decodeOperand_AReg_128(unsigned Val) const
MCOperand decodeOperand_SReg_32_XEXEC_HI(unsigned Val) const
void tryAddingPcLoadReferenceComment(raw_ostream &cStream, int64_t Value, uint64_t Address) override
Try to add a comment on the PC-relative load.
bool hasArchitectedFlatScratch() const
Instances of this class represent a single low-level machine instruction.
MCOperand decodeSDWAVopcDst(unsigned Val) const
MCOperand decodeOperand_AVDst_512(unsigned Val) const
MCOperand decodeBoolReg(unsigned Val) const
MCOperand decodeSpecialReg64(unsigned Val) const
Symbolize and annotate disassembled instructions.
MCOperand decodeOperand_AV_32(unsigned Val) const
MCOperand decodeOperand_VReg_96(unsigned Val) const
const MCInstrInfo * getMCII() const
const char * getRegClassName(unsigned RegClassID) const
MCOperand createSRegOperand(unsigned SRegClassID, unsigned Val) const
MCOperand decodeOperand_VReg_128(unsigned Val) const
MCOperand decodeOperand_AV_64(unsigned Val) const
MCOperand decodeOperand_AReg_256(unsigned Val) const
This class implements an extremely fast bulk output stream that can only output to a stream.
MCOperand decodeSDWASrc(const OpWidthTy Width, unsigned Val) const
DecodeStatus getInstruction(MCInst &MI, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &CS) const override
Returns the disassembly of a single instruction.
MCOperand decodeOperand_AReg_512(unsigned Val) const
MCOperand decodeOperand_VSrcV216(unsigned Val) const
DecodeStatus
Ternary decode status.
const MCSubtargetInfo & STI
DecodeStatus decodeCOMPUTE_PGM_RSRC2(uint32_t FourByteBuffer, raw_string_ostream &KdStream) const
Decode as directives that handle COMPUTE_PGM_RSRC2.
Optional< DecodeStatus > onSymbolStart(SymbolInfoTy &Symbol, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &CStream) const override
Used to perform separate target specific disassembly for a particular symbol.
MCOperand decodeOperand_VSrc16(unsigned Val) const
MCOperand decodeOperand_VS_32(unsigned Val) const
MCOperand decodeOperand_VReg_1024(unsigned Val) const
unsigned getSgprClassId(const OpWidthTy Width) const
unsigned getAgprClassId(const OpWidthTy Width) const
MCOperand decodeOperand_SReg_128(unsigned Val) const
MCOperand decodeOperand_VRegOrLds_32(unsigned Val) const
DecodeStatus convertFMAanyK(MCInst &MI, int ImmLitIdx) const
MCOperand errOperand(unsigned V, const Twine &ErrMsg) const
Superclass for all disassemblers.
MCOperand decodeOperand_SRegOrLds_32(unsigned Val) const
MCOperand decodeOperand_VReg_64(unsigned Val) const
MCOperand decodeOperand_VReg_256(unsigned Val) const
MCOperand decodeLiteralConstant() const
DecodeStatus convertEXPInst(MCInst &MI) const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
MCOperand decodeOperand_AReg_1024(unsigned Val) const
MCOperand decodeSrcOp(const OpWidthTy Width, unsigned Val, bool MandatoryLiteral=false) const
MCOperand decodeOperand_VS_64(unsigned Val) const
MCOperand decodeOperand_VReg_512(unsigned Val) const
ArrayRef< uint64_t > getReferencedAddresses() const override
Get the MCSymbolizer's list of addresses that were referenced by symbolizable operands but not resolv...
static MCOperand decodeIntImmed(unsigned Imm)
DecodeStatus decodeKernelDescriptor(StringRef KdName, ArrayRef< uint8_t > Bytes, uint64_t KdAddress) const
MCDisassembler::DecodeStatus DecodeStatus
unsigned getVgprClassId(const OpWidthTy Width) const
MCOperand decodeOperand_AVDst_128(unsigned Val) const
StringRef - Represent a constant reference to a string, i.e.
std::unique_ptr< MCRelocationInfo > RelInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
MCOperand decodeSDWASrc16(unsigned Val) const
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Interface to description of machine instruction set.
MCOperand decodeOperand_SReg_64(unsigned Val) const
MCOperand decodeOperand_AGPR_32(unsigned Val) const
MCOperand decodeMandatoryLiteralConstant(unsigned Imm) const
DecodeStatus convertSDWAInst(MCInst &MI) const
AMDGPUSymbolizer(MCContext &Ctx, std::unique_ptr< MCRelocationInfo > &&RelInfo, void *disInfo)
MCOperand decodeOperand_VSrcV232(unsigned Val) const
MCOperand createRegOperand(unsigned int RegId) const
AMDGPUDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, MCInstrInfo const *MCII)
MCOperand decodeOperand_SReg_32(unsigned Val) const
int getTTmpIdx(unsigned Val) const
MCOperand decodeOperand_SReg_512(unsigned Val) const
Instances of this class represent operands of the MCInst class.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
MCOperand decodeOperand_VGPR_32(unsigned Val) const
DecodeStatus tryDecodeInst(const uint8_t *Table, MCInst &MI, InsnType Inst, uint64_t Address) const
Generic base class for all target subtargets.
MCOperand decodeOperand_AReg_64(unsigned Val) const
LLVM Value Representation.
MCOperand decodeOperand_AV_128(unsigned Val) const
MCOperand decodeSpecialReg32(unsigned Val) const