LLVM 17.0.0git
AMDGPUUnifyDivergentExitNodes.cpp
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1//===- AMDGPUUnifyDivergentExitNodes.cpp ----------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This is a variant of the UnifyFunctionExitNodes pass. Rather than ensuring
10// there is at most one ret and one unreachable instruction, it ensures there is
11// at most one divergent exiting block.
12//
13// StructurizeCFG can't deal with multi-exit regions formed by branches to
14// multiple return nodes. It is not desirable to structurize regions with
15// uniform branches, so unifying those to the same return block as divergent
16// branches inhibits use of scalar branching. It still can't deal with the case
17// where one branch goes to return, and one unreachable. Replace unreachable in
18// this case with a return.
19//
20//===----------------------------------------------------------------------===//
21
23#include "AMDGPU.h"
24#include "SIDefines.h"
25#include "llvm/ADT/ArrayRef.h"
28#include "llvm/ADT/StringRef.h"
33#include "llvm/IR/BasicBlock.h"
34#include "llvm/IR/CFG.h"
35#include "llvm/IR/Constants.h"
36#include "llvm/IR/Dominators.h"
37#include "llvm/IR/Function.h"
38#include "llvm/IR/IRBuilder.h"
39#include "llvm/IR/InstrTypes.h"
41#include "llvm/IR/Intrinsics.h"
42#include "llvm/IR/IntrinsicsAMDGPU.h"
43#include "llvm/IR/Type.h"
45#include "llvm/Pass.h"
50
51using namespace llvm;
52
53#define DEBUG_TYPE "amdgpu-unify-divergent-exit-nodes"
54
55namespace {
56
57class AMDGPUUnifyDivergentExitNodesImpl {
58private:
59 const TargetTransformInfo *TTI = nullptr;
60
61public:
62 AMDGPUUnifyDivergentExitNodesImpl() = delete;
63 AMDGPUUnifyDivergentExitNodesImpl(const TargetTransformInfo *TTI)
64 : TTI(TTI) {}
65
66 // We can preserve non-critical-edgeness when we unify function exit nodes
67 BasicBlock *unifyReturnBlockSet(Function &F, DomTreeUpdater &DTU,
68 ArrayRef<BasicBlock *> ReturningBlocks,
70 bool run(Function &F, DominatorTree *DT, const PostDominatorTree &PDT,
71 const UniformityInfo &UA);
72};
73
74class AMDGPUUnifyDivergentExitNodes : public FunctionPass {
75public:
76 static char ID;
77 AMDGPUUnifyDivergentExitNodes() : FunctionPass(ID) {
80 }
81 void getAnalysisUsage(AnalysisUsage &AU) const override;
82 bool runOnFunction(Function &F) override;
83};
84} // end anonymous namespace
85
86char AMDGPUUnifyDivergentExitNodes::ID = 0;
87
88char &llvm::AMDGPUUnifyDivergentExitNodesID = AMDGPUUnifyDivergentExitNodes::ID;
89
90INITIALIZE_PASS_BEGIN(AMDGPUUnifyDivergentExitNodes, DEBUG_TYPE,
91 "Unify divergent function exit nodes", false, false)
95INITIALIZE_PASS_END(AMDGPUUnifyDivergentExitNodes, DEBUG_TYPE,
96 "Unify divergent function exit nodes", false, false)
97
98void AMDGPUUnifyDivergentExitNodes::getAnalysisUsage(AnalysisUsage &AU) const {
100 AU.addRequired<DominatorTreeWrapperPass>();
101
102 AU.addRequired<PostDominatorTreeWrapperPass>();
103
104 AU.addRequired<UniformityInfoWrapperPass>();
105
107 AU.addPreserved<DominatorTreeWrapperPass>();
108 // FIXME: preserve PostDominatorTreeWrapperPass
109 }
110
111 // No divergent values are changed, only blocks and branch edges.
112 AU.addPreserved<UniformityInfoWrapperPass>();
113
114 // We preserve the non-critical-edgeness property
115 AU.addPreservedID(BreakCriticalEdgesID);
116
117 // This is a cluster of orthogonal Transforms
118 AU.addPreservedID(LowerSwitchID);
119 FunctionPass::getAnalysisUsage(AU);
120
121 AU.addRequired<TargetTransformInfoWrapperPass>();
122}
123
124/// \returns true if \p BB is reachable through only uniform branches.
125/// XXX - Is there a more efficient way to find this?
126static bool isUniformlyReached(const UniformityInfo &UA, BasicBlock &BB) {
129
130 while (!Stack.empty()) {
131 BasicBlock *Top = Stack.pop_back_val();
132 if (!UA.isUniform(Top->getTerminator()))
133 return false;
134
135 for (BasicBlock *Pred : predecessors(Top)) {
136 if (Visited.insert(Pred).second)
137 Stack.push_back(Pred);
138 }
139 }
140
141 return true;
142}
143
144BasicBlock *AMDGPUUnifyDivergentExitNodesImpl::unifyReturnBlockSet(
145 Function &F, DomTreeUpdater &DTU, ArrayRef<BasicBlock *> ReturningBlocks,
146 StringRef Name) {
147 // Otherwise, we need to insert a new basic block into the function, add a PHI
148 // nodes (if the function returns values), and convert all of the return
149 // instructions into unconditional branches.
150 BasicBlock *NewRetBlock = BasicBlock::Create(F.getContext(), Name, &F);
151 IRBuilder<> B(NewRetBlock);
152
153 PHINode *PN = nullptr;
154 if (F.getReturnType()->isVoidTy()) {
155 B.CreateRetVoid();
156 } else {
157 // If the function doesn't return void... add a PHI node to the block...
158 PN = B.CreatePHI(F.getReturnType(), ReturningBlocks.size(),
159 "UnifiedRetVal");
160 B.CreateRet(PN);
161 }
162
163 // Loop over all of the blocks, replacing the return instruction with an
164 // unconditional branch.
165 std::vector<DominatorTree::UpdateType> Updates;
166 Updates.reserve(ReturningBlocks.size());
167 for (BasicBlock *BB : ReturningBlocks) {
168 // Add an incoming element to the PHI node for every return instruction that
169 // is merging into this new block...
170 if (PN)
171 PN->addIncoming(BB->getTerminator()->getOperand(0), BB);
172
173 // Remove and delete the return inst.
174 BB->getTerminator()->eraseFromParent();
175 BranchInst::Create(NewRetBlock, BB);
176 Updates.push_back({DominatorTree::Insert, BB, NewRetBlock});
177 }
178
180 DTU.applyUpdates(Updates);
181 Updates.clear();
182
183 for (BasicBlock *BB : ReturningBlocks) {
184 // Cleanup possible branch to unconditional branch to the return.
185 simplifyCFG(BB, *TTI, RequireAndPreserveDomTree ? &DTU : nullptr,
186 SimplifyCFGOptions().bonusInstThreshold(2));
187 }
188
189 return NewRetBlock;
190}
191
192bool AMDGPUUnifyDivergentExitNodesImpl::run(Function &F, DominatorTree *DT,
193 const PostDominatorTree &PDT,
194 const UniformityInfo &UA) {
195 if (PDT.root_size() == 0 ||
196 (PDT.root_size() == 1 &&
197 !isa<BranchInst>(PDT.getRoot()->getTerminator())))
198 return false;
199
200 // Loop over all of the blocks in a function, tracking all of the blocks that
201 // return.
202 SmallVector<BasicBlock *, 4> ReturningBlocks;
203 SmallVector<BasicBlock *, 4> UnreachableBlocks;
204
205 // Dummy return block for infinite loop.
206 BasicBlock *DummyReturnBB = nullptr;
207
208 bool Changed = false;
209 std::vector<DominatorTree::UpdateType> Updates;
210
211 // TODO: For now we unify all exit blocks, even though they are uniformly
212 // reachable, if there are any exits not uniformly reached. This is to
213 // workaround the limitation of structurizer, which can not handle multiple
214 // function exits. After structurizer is able to handle multiple function
215 // exits, we should only unify UnreachableBlocks that are not uniformly
216 // reachable.
217 bool HasDivergentExitBlock = llvm::any_of(
218 PDT.roots(), [&](auto BB) { return !isUniformlyReached(UA, *BB); });
219
220 for (BasicBlock *BB : PDT.roots()) {
221 if (isa<ReturnInst>(BB->getTerminator())) {
222 if (HasDivergentExitBlock)
223 ReturningBlocks.push_back(BB);
224 } else if (isa<UnreachableInst>(BB->getTerminator())) {
225 if (HasDivergentExitBlock)
226 UnreachableBlocks.push_back(BB);
227 } else if (BranchInst *BI = dyn_cast<BranchInst>(BB->getTerminator())) {
228
229 ConstantInt *BoolTrue = ConstantInt::getTrue(F.getContext());
230 if (DummyReturnBB == nullptr) {
231 DummyReturnBB = BasicBlock::Create(F.getContext(),
232 "DummyReturnBlock", &F);
233 Type *RetTy = F.getReturnType();
234 Value *RetVal = RetTy->isVoidTy() ? nullptr : PoisonValue::get(RetTy);
235 ReturnInst::Create(F.getContext(), RetVal, DummyReturnBB);
236 ReturningBlocks.push_back(DummyReturnBB);
237 }
238
239 if (BI->isUnconditional()) {
240 BasicBlock *LoopHeaderBB = BI->getSuccessor(0);
241 BI->eraseFromParent(); // Delete the unconditional branch.
242 // Add a new conditional branch with a dummy edge to the return block.
243 BranchInst::Create(LoopHeaderBB, DummyReturnBB, BoolTrue, BB);
244 Updates.push_back({DominatorTree::Insert, BB, DummyReturnBB});
245 } else { // Conditional branch.
247
248 // Create a new transition block to hold the conditional branch.
249 BasicBlock *TransitionBB = BB->splitBasicBlock(BI, "TransitionBlock");
250
251 Updates.reserve(Updates.size() + 2 * Successors.size() + 2);
252
253 // 'Successors' become successors of TransitionBB instead of BB,
254 // and TransitionBB becomes a single successor of BB.
255 Updates.push_back({DominatorTree::Insert, BB, TransitionBB});
256 for (BasicBlock *Successor : Successors) {
257 Updates.push_back({DominatorTree::Insert, TransitionBB, Successor});
258 Updates.push_back({DominatorTree::Delete, BB, Successor});
259 }
260
261 // Create a branch that will always branch to the transition block and
262 // references DummyReturnBB.
264 BranchInst::Create(TransitionBB, DummyReturnBB, BoolTrue, BB);
265 Updates.push_back({DominatorTree::Insert, BB, DummyReturnBB});
266 }
267 Changed = true;
268 }
269 }
270
271 if (!UnreachableBlocks.empty()) {
272 BasicBlock *UnreachableBlock = nullptr;
273
274 if (UnreachableBlocks.size() == 1) {
275 UnreachableBlock = UnreachableBlocks.front();
276 } else {
277 UnreachableBlock = BasicBlock::Create(F.getContext(),
278 "UnifiedUnreachableBlock", &F);
279 new UnreachableInst(F.getContext(), UnreachableBlock);
280
281 Updates.reserve(Updates.size() + UnreachableBlocks.size());
282 for (BasicBlock *BB : UnreachableBlocks) {
283 // Remove and delete the unreachable inst.
284 BB->getTerminator()->eraseFromParent();
285 BranchInst::Create(UnreachableBlock, BB);
286 Updates.push_back({DominatorTree::Insert, BB, UnreachableBlock});
287 }
288 Changed = true;
289 }
290
291 if (!ReturningBlocks.empty()) {
292 // Don't create a new unreachable inst if we have a return. The
293 // structurizer/annotator can't handle the multiple exits
294
295 Type *RetTy = F.getReturnType();
296 Value *RetVal = RetTy->isVoidTy() ? nullptr : PoisonValue::get(RetTy);
297 // Remove and delete the unreachable inst.
298 UnreachableBlock->getTerminator()->eraseFromParent();
299
300 Function *UnreachableIntrin =
301 Intrinsic::getDeclaration(F.getParent(), Intrinsic::amdgcn_unreachable);
302
303 // Insert a call to an intrinsic tracking that this is an unreachable
304 // point, in case we want to kill the active lanes or something later.
305 CallInst::Create(UnreachableIntrin, {}, "", UnreachableBlock);
306
307 // Don't create a scalar trap. We would only want to trap if this code was
308 // really reached, but a scalar trap would happen even if no lanes
309 // actually reached here.
310 ReturnInst::Create(F.getContext(), RetVal, UnreachableBlock);
311 ReturningBlocks.push_back(UnreachableBlock);
312 Changed = true;
313 }
314 }
315
316 // FIXME: add PDT here once simplifycfg is ready.
317 DomTreeUpdater DTU(DT, DomTreeUpdater::UpdateStrategy::Eager);
319 DTU.applyUpdates(Updates);
320 Updates.clear();
321
322 // Now handle return blocks.
323 if (ReturningBlocks.empty())
324 return Changed; // No blocks return
325
326 if (ReturningBlocks.size() == 1)
327 return Changed; // Already has a single return block
328
329 unifyReturnBlockSet(F, DTU, ReturningBlocks, "UnifiedReturnBlock");
330 return true;
331}
332
333bool AMDGPUUnifyDivergentExitNodes::runOnFunction(Function &F) {
334 DominatorTree *DT = nullptr;
336 DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
337 const auto &PDT =
338 getAnalysis<PostDominatorTreeWrapperPass>().getPostDomTree();
339 const auto &UA = getAnalysis<UniformityInfoWrapperPass>().getUniformityInfo();
340 const auto *TranformInfo =
341 &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
342 return AMDGPUUnifyDivergentExitNodesImpl(TranformInfo).run(F, DT, PDT, UA);
343}
344
348 DominatorTree *DT = nullptr;
351
352 const auto &PDT = AM.getResult<PostDominatorTreeAnalysis>(F);
353 const auto &UA = AM.getResult<UniformityInfoAnalysis>(F);
354 const auto *TransformInfo = &AM.getResult<TargetIRAnalysis>(F);
355 return AMDGPUUnifyDivergentExitNodesImpl(TransformInfo).run(F, DT, PDT, UA)
358}
static bool isUniformlyReached(const UniformityInfo &UA, BasicBlock &BB)
Unify divergent function exit nodes
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
This file contains the declarations for the subclasses of Constant, which represent the different fla...
return RetTy
std::string Name
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
#define F(x, y, z)
Definition: MD5.cpp:55
print Print MemDeps of function
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:55
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:59
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:52
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
This pass exposes codegen information to IR-level passes.
LLVM IR instance of the generic uniformity analysis.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
A container for analyses that lazily runs them and caches their results.
Definition: PassManager.h:620
PassT::Result & getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs)
Get the result of an analysis pass for a given IR unit.
Definition: PassManager.h:774
Represent the analysis usage information of a pass.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:163
LLVM Basic Block Representation.
Definition: BasicBlock.h:56
static BasicBlock * Create(LLVMContext &Context, const Twine &Name="", Function *Parent=nullptr, BasicBlock *InsertBefore=nullptr)
Creates a new BasicBlock.
Definition: BasicBlock.h:105
BasicBlock * splitBasicBlock(iterator I, const Twine &BBName="", bool Before=false)
Split the basic block into two basic blocks at the specified instruction.
Definition: BasicBlock.cpp:410
SymbolTableList< BasicBlock >::iterator eraseFromParent()
Unlink 'this' from the containing function and delete it.
Definition: BasicBlock.cpp:132
const Instruction * getTerminator() const LLVM_READONLY
Returns the terminator instruction if the block is well formed or null if the block is not well forme...
Definition: BasicBlock.h:127
Conditional or Unconditional Branch instruction.
static BranchInst * Create(BasicBlock *IfTrue, Instruction *InsertBefore=nullptr)
static CallInst * Create(FunctionType *Ty, Value *F, const Twine &NameStr="", Instruction *InsertBefore=nullptr)
This is the shared class of boolean and integer constants.
Definition: Constants.h:78
static ConstantInt * getTrue(LLVMContext &Context)
Definition: Constants.cpp:833
void applyUpdates(ArrayRef< DominatorTree::UpdateType > Updates)
Submit updates to all available trees.
Analysis pass which computes a DominatorTree.
Definition: Dominators.h:279
iterator_range< root_iterator > roots()
size_t root_size() const
NodeT * getRoot() const
Legacy analysis pass which computes a DominatorTree.
Definition: Dominators.h:314
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition: Dominators.h:166
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
virtual bool runOnFunction(Function &F)=0
runOnFunction - Virtual method overriden by subclasses to do the per-function processing of the pass.
bool isUniform(ConstValueRefT V) const
Whether V is uniform/non-divergent.
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
Definition: IRBuilder.h:2564
SymbolTableList< Instruction >::iterator eraseFromParent()
This method unlinks 'this' from the containing basic block and deletes it.
Definition: Instruction.cpp:82
void addIncoming(Value *V, BasicBlock *BB)
Add an incoming value to the end of the PHI list.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual void getAnalysisUsage(AnalysisUsage &) const
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
Definition: Pass.cpp:98
static PoisonValue * get(Type *T)
Static factory methods - Return an 'poison' object of the specified type.
Definition: Constants.cpp:1743
Analysis pass which computes a PostDominatorTree.
PostDominatorTree Class - Concrete subclass of DominatorTree that is used to compute the post-dominat...
A set of analyses that are preserved following a run of a transformation pass.
Definition: PassManager.h:152
static PreservedAnalyses none()
Convenience factory function for the empty preserved set.
Definition: PassManager.h:155
static PreservedAnalyses all()
Construct a special preserved set that preserves all passes.
Definition: PassManager.h:158
static ReturnInst * Create(LLVMContext &C, Value *retVal=nullptr, Instruction *InsertBefore=nullptr)
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:365
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:450
bool empty() const
Definition: SmallVector.h:94
size_t size() const
Definition: SmallVector.h:91
void push_back(const T &Elt)
Definition: SmallVector.h:416
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
Analysis pass providing the TargetTransformInfo.
Result run(const Function &F, FunctionAnalysisManager &)
Wrapper pass for TargetTransformInfo.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
Analysis pass which computes UniformityInfo.
Legacy analysis pass which computes a CycleInfo.
This function has undefined behavior.
LLVM Value Representation.
Definition: Value.h:74
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
Function * getDeclaration(Module *M, ID id, ArrayRef< Type * > Tys=std::nullopt)
Create or insert an LLVM Function declaration for an intrinsic, and return it.
Definition: Function.cpp:1465
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
auto successors(const MachineBasicBlock *BB)
char & AMDGPUUnifyDivergentExitNodesID
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1826
char & LowerSwitchID
cl::opt< bool > RequireAndPreserveDomTree
This function is used to do simplification of a CFG.
bool simplifyCFG(BasicBlock *BB, const TargetTransformInfo &TTI, DomTreeUpdater *DTU=nullptr, const SimplifyCFGOptions &Options={}, ArrayRef< WeakVH > LoopHeaders={})
char & BreakCriticalEdgesID
auto predecessors(const MachineBasicBlock *BB)
void initializeAMDGPUUnifyDivergentExitNodesPass(PassRegistry &)