30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
79 ScalarizationCost(ScalarizationCost) {
82 FMF = FPMO->getFastMathFlags();
87 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
95 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
101 : RetTy(Ty), IID(Id) {
103 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
104 ParamTys.reserve(Arguments.size());
115 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
116 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
117 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
133 L->getExitingBlocks(ExitingBlocks);
138 if (!
L->isLoopLatch(BB)) {
147 if (ConstEC->getValue()->isZero())
168 bool NotAlways =
false;
170 if (!
L->contains(Pred))
205 : TTIImpl(
std::make_unique<NoTTIImpl>(
DL)) {}
210 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
213 TTIImpl = std::move(RHS.TTIImpl);
218 return TTIImpl->getInliningThresholdMultiplier();
223 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
229 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
233 return TTIImpl->getInliningLastCallToStaticBonus();
238 return TTIImpl->adjustInliningThreshold(CB);
243 return TTIImpl->getCallerAllocaCost(CB, AI);
247 return TTIImpl->getInlinerVectorBonusPercent();
253 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType,
CostKind);
261 "If pointers have same base address it has to be provided.");
262 return TTIImpl->getPointersChainCost(Ptrs,
Base, Info, AccessTy,
CostKind);
268 return TTIImpl->getEstimatedNumberOfCaseClusters(
SI, JTSize, PSI, BFI);
277 "TTI should not produce negative costs!");
284 : TTIImpl->getPredictableBranchThreshold();
288 return TTIImpl->getBranchMispredictPenalty();
292 return TTIImpl->hasBranchDivergence(
F);
299 if (
Call->hasFnAttr(Attribute::NoDivergenceSource))
302 return TTIImpl->getInstructionUniformity(V);
306 unsigned ToAS)
const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
311 unsigned ToAS)
const {
312 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
316 return TTIImpl->getFlatAddressSpace();
321 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
325 unsigned ToAS)
const {
326 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
329std::pair<KnownBits, KnownBits>
331 const Value &PtrOp)
const {
332 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
336 unsigned FromAS,
unsigned ToAS,
const KnownBits &FromPtrBits)
const {
337 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
341 unsigned SrcAS,
unsigned DstAS)
const {
342 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
347 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
351 return TTIImpl->getAssumedAddrSpace(V);
355 return TTIImpl->isSingleThreaded();
358std::pair<const Value *, unsigned>
360 return TTIImpl->getPredicatedAddrSpace(V);
365 return TTIImpl->rewriteIntrinsicWithAddressSpace(
II, OldV, NewV);
369 return TTIImpl->isLoweredToCall(
F);
375 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
379 return TTIImpl->getEpilogueVectorizationMinVF();
384 return TTIImpl->preferPredicateOverEpilogue(TFI);
388 return TTIImpl->getPreferredTailFoldingStyle();
391std::optional<Instruction *>
394 return TTIImpl->instCombineIntrinsic(IC,
II);
399 bool &KnownBitsComputed)
const {
400 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC,
II, DemandedMask, Known,
408 SimplifyAndSetOp)
const {
409 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
410 IC,
II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
417 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
422 return TTIImpl->getPeelingPreferences(L, SE, PP);
426 return TTIImpl->isLegalAddImmediate(Imm);
430 return TTIImpl->isLegalAddScalableImmediate(Imm);
434 return TTIImpl->isLegalICmpImmediate(Imm);
439 bool HasBaseReg, int64_t Scale,
442 int64_t ScalableOffset)
const {
443 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
444 Scale, AddrSpace,
I, ScalableOffset);
449 return TTIImpl->isLSRCostLess(C1, C2);
453 return TTIImpl->isNumRegsMajorCostOfLSR();
457 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
461 return TTIImpl->isProfitableLSRChainElement(
I);
465 return TTIImpl->canMacroFuseCmp();
472 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
478 return TTIImpl->getPreferredAddressingMode(L, SE);
484 return TTIImpl->isLegalMaskedStore(DataType, Alignment,
AddressSpace,
491 return TTIImpl->isLegalMaskedLoad(DataType, Alignment,
AddressSpace,
496 Align Alignment)
const {
497 return TTIImpl->isLegalNTStore(DataType, Alignment);
501 return TTIImpl->isLegalNTLoad(DataType, Alignment);
506 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
510 Align Alignment)
const {
511 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
515 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
517 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
521 Align Alignment)
const {
522 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
526 Align Alignment)
const {
527 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
531 Align Alignment)
const {
532 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
536 Align Alignment)
const {
537 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
541 Align Alignment)
const {
542 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
546 Align Alignment)
const {
547 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
552 unsigned AddrSpace)
const {
553 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
558 Type *DataType)
const {
559 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
563 return TTIImpl->enableOrderedReductions();
567 return TTIImpl->hasDivRemOp(DataType, IsSigned);
571 unsigned AddrSpace)
const {
572 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
576 return TTIImpl->prefersVectorizedAddressing();
581 int64_t Scale,
unsigned AddrSpace)
const {
583 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
584 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
589 return TTIImpl->LSRWithInstrQueries();
593 return TTIImpl->isTruncateFree(Ty1, Ty2);
597 return TTIImpl->isProfitableToHoist(
I);
603 return TTIImpl->isTypeLegal(Ty);
607 return TTIImpl->getRegUsageForType(Ty);
611 return TTIImpl->shouldBuildLookupTables();
616 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
620 return TTIImpl->shouldBuildRelLookupTables();
624 return TTIImpl->useColdCCForColdCall(
F);
628 return TTIImpl->useFastCCForInternalCall(
F);
633 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(
ID);
638 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(
ID, ScalarOpdIdx);
643 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(
ID, OpdIdx);
648 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(
ID, RetIdx);
659 I->getOperand(1)->hasOneUse())
674 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
681 return TTIImpl->getOperandsScalarizationOverhead(Tys,
CostKind, VIC);
685 return TTIImpl->supportsEfficientVectorElementLoadStore();
689 return TTIImpl->supportsTailCalls();
693 return TTIImpl->supportsTailCallFor(CB);
697 bool LoopHasReductions)
const {
698 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
703 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
707 return TTIImpl->enableSelectOptimize();
712 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
716 return TTIImpl->enableInterleavedAccessVectorization();
720 return TTIImpl->enableMaskedInterleavedAccessVectorization();
724 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
732 unsigned *
Fast)
const {
733 return TTIImpl->allowsMisalignedMemoryAccesses(Context,
BitWidth,
739 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
743 return TTIImpl->haveFastSqrt(Ty);
748 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
752 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
757 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
766 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
774 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
779 unsigned Opcode,
unsigned Idx,
const APInt &Imm,
Type *Ty,
782 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty,
CostKind, Inst);
783 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
792 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty,
CostKind);
793 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
799 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
803 return TTIImpl->getNumberOfRegisters(ClassID);
807 bool IsStore)
const {
808 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
813 return TTIImpl->getRegisterClassForType(
Vector, Ty);
817 return TTIImpl->getRegisterClassName(ClassID);
822 return TTIImpl->getRegisterClassSpillCost(ClassID,
CostKind);
827 return TTIImpl->getRegisterClassReloadCost(ClassID,
CostKind);
832 return TTIImpl->getRegisterBitWidth(K);
836 return TTIImpl->getMinVectorRegisterBitWidth();
840 return TTIImpl->getMaxVScale();
844 return TTIImpl->getVScaleForTuning();
849 return TTIImpl->shouldMaximizeVectorBandwidth(K);
853 bool IsScalable)
const {
854 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
858 unsigned Opcode)
const {
859 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
865 unsigned AddrSpace)
const {
866 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy, Alignment,
871 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
872 return TTIImpl->shouldConsiderAddressTypePromotion(
873 I, AllowPromotionWithoutCommonHeader);
878 : TTIImpl->getCacheLineSize();
881std::optional<unsigned>
883 return TTIImpl->getCacheSize(Level);
886std::optional<unsigned>
888 return TTIImpl->getCacheAssociativity(Level);
893 : TTIImpl->getMinPageSize();
897 return TTIImpl->getPrefetchDistance();
901 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
902 unsigned NumPrefetches,
bool HasCall)
const {
903 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
904 NumPrefetches, HasCall);
908 return TTIImpl->getMaxPrefetchIterationsAhead();
912 return TTIImpl->enableWritePrefetching();
916 return TTIImpl->shouldPrefetchAddressSpace(AS);
920 unsigned Opcode,
Type *InputTypeA,
Type *InputTypeB,
Type *AccumType,
924 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
925 AccumType, VF, OpAExtend, OpBExtend,
930 return TTIImpl->getMaxInterleaveFactor(VF);
944 if (CI->getValue().isPowerOf2())
946 else if (CI->getValue().isNegatedPowerOf2())
956 if (ShuffleInst->isZeroEltSplat())
971 if (CI->getValue().isPowerOf2())
973 else if (CI->getValue().isNegatedPowerOf2())
979 bool AllPow2 =
true, AllNegPow2 =
true;
980 for (
uint64_t I = 0, E = CDS->getNumElements();
I != E; ++
I) {
982 AllPow2 &= CI->getValue().isPowerOf2();
983 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
984 if (AllPow2 || AllNegPow2)
987 AllPow2 = AllNegPow2 =
false;
996 return {OpInfo, OpProps};
1016 if (TLibInfo && Opcode == Instruction::FRem) {
1020 TLibInfo->
getLibFunc(Instruction::FRem, Ty->getScalarType(), Func) &&
1027 Opcode, Ty,
CostKind, Op1Info, Op2Info, Args, CxtI);
1028 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1033 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
1036 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
1037 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1047 "Expected the Mask to match the return size if given");
1049 "Expected the same scalar types");
1051 Kind, DstTy, SrcTy, Mask,
CostKind, Index, SubTp, Args, CxtI);
1052 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1068 return Instruction::CastOps::ZExt;
1070 return Instruction::CastOps::SExt;
1072 return Instruction::CastOps::FPExt;
1083 case Instruction::CastOps::ZExt:
1085 case Instruction::CastOps::SExt:
1087 case Instruction::CastOps::FPExt:
1100 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
1101 unsigned GatScatOp) {
1106 if (
I->getOpcode() == LdStOp)
1110 if (
II->getIntrinsicID() == MaskedOp)
1112 if (
II->getIntrinsicID() == GatScatOp)
1119 switch (
I->getOpcode()) {
1120 case Instruction::ZExt:
1121 case Instruction::SExt:
1122 case Instruction::FPExt:
1123 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
1124 Intrinsic::masked_load, Intrinsic::masked_gather);
1125 case Instruction::Trunc:
1126 case Instruction::FPTrunc:
1128 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
1129 Intrinsic::masked_store,
1130 Intrinsic::masked_scatter);
1142 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1143 "Opcode should reflect passed instruction.");
1145 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
1146 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1154 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index,
CostKind);
1155 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1161 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1162 "Opcode should reflect passed instruction.");
1164 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1172 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1173 "Opcode should reflect passed instruction.");
1175 Opcode, ValTy, CondTy, VecPred,
CostKind, Op1Info, Op2Info,
I);
1176 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1183 assert((Opcode == Instruction::InsertElement ||
1184 Opcode == Instruction::ExtractElement) &&
1185 "Expecting Opcode to be insertelement/extractelement.");
1187 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind, Index, Op0, Op1, VIC);
1188 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1194 Value *Scalar,
ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1196 assert((Opcode == Instruction::InsertElement ||
1197 Opcode == Instruction::ExtractElement) &&
1198 "Expecting Opcode to be insertelement/extractelement.");
1200 Opcode, Val,
CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1201 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1212 TTIImpl->getVectorInstrCost(
I, Val,
CostKind, Index, VIC);
1213 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1219 unsigned Index)
const {
1221 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val,
CostKind, Index);
1222 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1228 assert((Opcode == Instruction::InsertValue ||
1229 Opcode == Instruction::ExtractValue) &&
1230 "Expecting Opcode to be insertvalue/extractvalue.");
1232 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1237 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1240 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1241 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1249 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1250 "Opcode should reflect passed instruction.");
1253 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1260 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1263 UseMaskForCond, UseMaskForGaps);
1264 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1272 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1280 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1289 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1294 return TTIImpl->getNumberOfParts(Tp);
1301 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr,
CostKind);
1302 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1308 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1313 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1317 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1320 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1321 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1329 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1330 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1337 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1342 bool IsUnsigned,
unsigned RedOpcode,
Type *ResTy,
VectorType *Ty,
1344 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1350 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1355 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1359 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1364 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1370 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1371 std::optional<uint32_t> AtomicElementSize)
const {
1372 return TTIImpl->getMemcpyLoopLoweringType(Context,
Length, SrcAddrSpace,
1373 DestAddrSpace, SrcAlign, DestAlign,
1379 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1381 std::optional<uint32_t> AtomicCpySize)
const {
1382 TTIImpl->getMemcpyLoopResidualLoweringType(
1383 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1384 DestAlign, AtomicCpySize);
1389 return TTIImpl->areInlineCompatible(Caller, Callee);
1395 unsigned DefaultCallPenalty)
const {
1396 return TTIImpl->getInlineCallPenalty(
F,
Call, DefaultCallPenalty);
1401 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1406 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1411 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1416 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1420 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1424 return TTIImpl->isLegalToVectorizeLoad(LI);
1428 return TTIImpl->isLegalToVectorizeStore(
SI);
1432 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1433 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1438 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1439 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1445 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1449 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1454 unsigned ChainSizeInBytes,
1456 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1461 unsigned ChainSizeInBytes,
1463 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1467 bool IsEpilogue)
const {
1468 return TTIImpl->preferFixedOverScalableIfEqualCost(IsEpilogue);
1473 return TTIImpl->preferInLoopReduction(Kind, Ty);
1477 return TTIImpl->preferAlternateOpcodeVectorization();
1481 return TTIImpl->preferPredicatedReductionSelect();
1486 return TTIImpl->preferEpilogueVectorization(Iters);
1490 return TTIImpl->shouldConsiderVectorizationRegPressure();
1495 return TTIImpl->getVPLegalizationStrategy(VPI);
1499 return TTIImpl->hasArmWideBranch(Thumb);
1503 return TTIImpl->getFeatureMask(
F);
1507 return TTIImpl->getPriorityMask(
F);
1511 return TTIImpl->isMultiversionedFunction(
F);
1515 return TTIImpl->getMaxNumArgs();
1519 return TTIImpl->shouldExpandReduction(
II);
1525 return TTIImpl->getPreferredExpandedReductionShuffle(
II);
1529 return TTIImpl->getGISelRematGlobalCost();
1533 return TTIImpl->getMinTripCountTailFoldingThreshold();
1537 return TTIImpl->supportsScalableVectors();
1541 return TTIImpl->enableScalableVectorization();
1545 return TTIImpl->hasActiveVectorLength();
1550 return TTIImpl->isProfitableToSinkOperands(
I, OpsToSink);
1554 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1560 return TTIImpl->getNumBytesToPadGlobalArray(
Size,
ArrayType);
1566 return TTIImpl->collectKernelLaunchBounds(
F, LB);
1570 return TTIImpl->allowVectorElementIndexingUsingGEP();
1575 return TTIImpl->isUniform(
I, UniformArgs);
1584 : TTICallback(
std::
move(TTICallback)) {}
1588 assert(!
F.isIntrinsic() &&
"Should not request TTI for intrinsics");
1589 return TTICallback(
F);
1595 return Result(
F.getDataLayout());
1600 "Target Transform Information",
false,
true)
1614 TTI = TIRA.run(
F, DummyFAM);
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
This class represents an incoming formal argument to a Function.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
Functions, function parameters, and return types can have attributes to indicate how they should be t...
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Conditional Branch instruction.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Class to represent function types.
FunctionType * getFunctionType() const
Returns the FunctionType for me.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Information for memory intrinsic cost model.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM_ABI bool isScalableTy(SmallPtrSetImpl< const Type * > &Visited) const
Return true if this is a type whose size is a known multiple of vscale.
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
InstructionUniformity
Enum describing how instructions behave with respect to uniformity and divergence,...
@ AlwaysUniform
The result values are always uniform.
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.