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HexagonMachineFunctionInfo.h
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1 //=- HexagonMachineFunctionInfo.h - Hexagon machine function info -*- C++ -*-=//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H
10 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H
11 
13 #include <map>
14 
15 namespace llvm {
16 
17 namespace Hexagon {
18 
19  const unsigned int StartPacket = 0x1;
20  const unsigned int EndPacket = 0x2;
21 
22 } // end namespace Hexagon
23 
24 /// Hexagon target-specific information for each MachineFunction.
26  // SRetReturnReg - Some subtargets require that sret lowering includes
27  // returning the value of the returned struct in a register. This field
28  // holds the virtual register into which the sret argument is passed.
29  unsigned SRetReturnReg = 0;
30  Register StackAlignBaseReg = 0; // Aligned-stack base register
31  int VarArgsFrameIndex;
32  int RegSavedAreaStartFrameIndex;
33  int FirstNamedArgFrameIndex;
34  int LastNamedArgFrameIndex;
35  bool HasClobberLR = false;
36  bool HasEHReturn = false;
37  std::map<const MachineInstr*, unsigned> PacketInfo;
38  virtual void anchor();
39 
40 public:
41  HexagonMachineFunctionInfo() = default;
42 
47  const override;
48 
49  unsigned getSRetReturnReg() const { return SRetReturnReg; }
50  void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
51 
52  void setVarArgsFrameIndex(int v) { VarArgsFrameIndex = v; }
53  int getVarArgsFrameIndex() { return VarArgsFrameIndex; }
54 
55  void setRegSavedAreaStartFrameIndex(int v) { RegSavedAreaStartFrameIndex = v;}
56  int getRegSavedAreaStartFrameIndex() { return RegSavedAreaStartFrameIndex; }
57 
58  void setFirstNamedArgFrameIndex(int v) { FirstNamedArgFrameIndex = v; }
59  int getFirstNamedArgFrameIndex() { return FirstNamedArgFrameIndex; }
60 
61  void setLastNamedArgFrameIndex(int v) { LastNamedArgFrameIndex = v; }
62  int getLastNamedArgFrameIndex() { return LastNamedArgFrameIndex; }
63 
65  PacketInfo[MI] |= Hexagon::StartPacket;
66  }
68  PacketInfo[MI] |= Hexagon::EndPacket;
69  }
70  bool isStartPacket(const MachineInstr* MI) const {
71  return (PacketInfo.count(MI) &&
72  (PacketInfo.find(MI)->second & Hexagon::StartPacket));
73  }
74  bool isEndPacket(const MachineInstr* MI) const {
75  return (PacketInfo.count(MI) &&
76  (PacketInfo.find(MI)->second & Hexagon::EndPacket));
77  }
78  void setHasClobberLR(bool v) { HasClobberLR = v; }
79  bool hasClobberLR() const { return HasClobberLR; }
80 
81  bool hasEHReturn() const { return HasEHReturn; };
82  void setHasEHReturn(bool H = true) { HasEHReturn = H; };
83 
84  void setStackAlignBaseReg(Register R) { StackAlignBaseReg = R; }
85  Register getStackAlignBaseReg() const { return StackAlignBaseReg; }
86 };
87 
88 } // end namespace llvm
89 
90 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H
llvm::HexagonMachineFunctionInfo::isEndPacket
bool isEndPacket(const MachineInstr *MI) const
Definition: HexagonMachineFunctionInfo.h:74
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:108
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::HexagonMachineFunctionInfo::setHasEHReturn
void setHasEHReturn(bool H=true)
Definition: HexagonMachineFunctionInfo.h:82
llvm::HexagonMachineFunctionInfo::getStackAlignBaseReg
Register getStackAlignBaseReg() const
Definition: HexagonMachineFunctionInfo.h:85
llvm::HexagonMachineFunctionInfo::setLastNamedArgFrameIndex
void setLastNamedArgFrameIndex(int v)
Definition: HexagonMachineFunctionInfo.h:61
llvm::HexagonMachineFunctionInfo::getFirstNamedArgFrameIndex
int getFirstNamedArgFrameIndex()
Definition: HexagonMachineFunctionInfo.h:59
llvm::HexagonMachineFunctionInfo::setFirstNamedArgFrameIndex
void setFirstNamedArgFrameIndex(int v)
Definition: HexagonMachineFunctionInfo.h:58
llvm::HexagonMachineFunctionInfo::setVarArgsFrameIndex
void setVarArgsFrameIndex(int v)
Definition: HexagonMachineFunctionInfo.h:52
llvm::HexagonMachineFunctionInfo::getVarArgsFrameIndex
int getVarArgsFrameIndex()
Definition: HexagonMachineFunctionInfo.h:53
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::Hexagon::StartPacket
const unsigned int StartPacket
Definition: HexagonMachineFunctionInfo.h:19
llvm::HexagonMachineFunctionInfo::setRegSavedAreaStartFrameIndex
void setRegSavedAreaStartFrameIndex(int v)
Definition: HexagonMachineFunctionInfo.h:55
llvm::HexagonMachineFunctionInfo::clone
MachineFunctionInfo * clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override
Make a functionally equivalent copy of this MachineFunctionInfo in MF.
Definition: HexagonMachineFunctionInfo.cpp:16
llvm::HexagonMachineFunctionInfo::getRegSavedAreaStartFrameIndex
int getRegSavedAreaStartFrameIndex()
Definition: HexagonMachineFunctionInfo.h:56
llvm::HexagonMachineFunctionInfo::setHasClobberLR
void setHasClobberLR(bool v)
Definition: HexagonMachineFunctionInfo.h:78
llvm::HexagonMachineFunctionInfo
Hexagon target-specific information for each MachineFunction.
Definition: HexagonMachineFunctionInfo.h:25
llvm::HexagonMachineFunctionInfo::setEndPacket
void setEndPacket(MachineInstr *MI)
Definition: HexagonMachineFunctionInfo.h:67
llvm::HexagonMachineFunctionInfo::setSRetReturnReg
void setSRetReturnReg(unsigned Reg)
Definition: HexagonMachineFunctionInfo.h:50
llvm::HexagonMachineFunctionInfo::getLastNamedArgFrameIndex
int getLastNamedArgFrameIndex()
Definition: HexagonMachineFunctionInfo.h:62
llvm::HexagonMachineFunctionInfo::hasEHReturn
bool hasEHReturn() const
Definition: HexagonMachineFunctionInfo.h:81
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
llvm::BumpPtrAllocatorImpl
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:63
llvm::DenseMap
Definition: DenseMap.h:714
llvm::HexagonMachineFunctionInfo::setStackAlignBaseReg
void setStackAlignBaseReg(Register R)
Definition: HexagonMachineFunctionInfo.h:84
llvm::HexagonMachineFunctionInfo::isStartPacket
bool isStartPacket(const MachineInstr *MI) const
Definition: HexagonMachineFunctionInfo.h:70
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::HexagonMachineFunctionInfo::HexagonMachineFunctionInfo
HexagonMachineFunctionInfo(MachineFunction &MF)
Definition: HexagonMachineFunctionInfo.h:43
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::HexagonMachineFunctionInfo::hasClobberLR
bool hasClobberLR() const
Definition: HexagonMachineFunctionInfo.h:79
H
#define H(x, y, z)
Definition: MD5.cpp:57
llvm::HexagonMachineFunctionInfo::getSRetReturnReg
unsigned getSRetReturnReg() const
Definition: HexagonMachineFunctionInfo.h:49
llvm::HexagonMachineFunctionInfo::HexagonMachineFunctionInfo
HexagonMachineFunctionInfo()=default
llvm::Hexagon::EndPacket
const unsigned int EndPacket
Definition: HexagonMachineFunctionInfo.h:20
Allocator
Basic Register Allocator
Definition: RegAllocBasic.cpp:143
llvm::HexagonMachineFunctionInfo::setStartPacket
void setStartPacket(MachineInstr *MI)
Definition: HexagonMachineFunctionInfo.h:64
MachineFunction.h
llvm::MachineFunctionInfo
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
Definition: MachineFunction.h:95