LLVM 19.0.0git
MSP430AsmBackend.cpp
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1//===-- MSP430AsmBackend.cpp - MSP430 Assembler Backend -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
11#include "llvm/ADT/APInt.h"
13#include "llvm/MC/MCAssembler.h"
14#include "llvm/MC/MCContext.h"
17#include "llvm/MC/MCExpr.h"
21#include "llvm/MC/MCSymbol.h"
25
26using namespace llvm;
27
28namespace {
29class MSP430AsmBackend : public MCAsmBackend {
30 uint8_t OSABI;
31
33 MCContext &Ctx) const;
34
35public:
36 MSP430AsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI)
37 : MCAsmBackend(llvm::endianness::little), OSABI(OSABI) {}
38 ~MSP430AsmBackend() override = default;
39
40 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
42 uint64_t Value, bool IsResolved,
43 const MCSubtargetInfo *STI) const override;
44
45 std::unique_ptr<MCObjectTargetWriter>
46 createObjectTargetWriter() const override {
47 return createMSP430ELFObjectWriter(OSABI);
48 }
49
52 const MCAsmLayout &Layout) const override {
53 return false;
54 }
55
56 bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved,
59 const MCAsmLayout &Layout,
60 const bool WasForced) const override {
61 return false;
62 }
63
64 unsigned getNumFixupKinds() const override {
66 }
67
68 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
69 const static MCFixupKindInfo Infos[MSP430::NumTargetFixupKinds] = {
70 // This table must be in the same order of enum in MSP430FixupKinds.h.
71 //
72 // name offset bits flags
73 {"fixup_32", 0, 32, 0},
74 {"fixup_10_pcrel", 0, 10, MCFixupKindInfo::FKF_IsPCRel},
75 {"fixup_16", 0, 16, 0},
76 {"fixup_16_pcrel", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
77 {"fixup_16_byte", 0, 16, 0},
78 {"fixup_16_pcrel_byte", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
79 {"fixup_2x_pcrel", 0, 10, MCFixupKindInfo::FKF_IsPCRel},
80 {"fixup_rl_pcrel", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
81 {"fixup_8", 0, 8, 0},
82 {"fixup_sym_diff", 0, 32, 0},
83 };
84 static_assert((std::size(Infos)) == MSP430::NumTargetFixupKinds,
85 "Not all fixup kinds added to Infos array");
86
87 if (Kind < FirstTargetFixupKind)
89
90 return Infos[Kind - FirstTargetFixupKind];
91 }
92
94 const MCSubtargetInfo *STI) const override;
95};
96
97uint64_t MSP430AsmBackend::adjustFixupValue(const MCFixup &Fixup,
99 MCContext &Ctx) const {
100 unsigned Kind = Fixup.getKind();
101 switch (Kind) {
103 if (Value & 0x1)
104 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned");
105
106 // Offset is signed
107 int16_t Offset = Value;
108 // Jumps are in words
109 Offset >>= 1;
110 // PC points to the next instruction so decrement by one
111 --Offset;
112
113 if (Offset < -512 || Offset > 511)
114 Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
115
116 // Mask 10 bits
117 Offset &= 0x3ff;
118
119 return Offset;
120 }
121 default:
122 return Value;
123 }
124}
125
126void MSP430AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
127 const MCValue &Target,
129 uint64_t Value, bool IsResolved,
130 const MCSubtargetInfo *STI) const {
131 Value = adjustFixupValue(Fixup, Value, Asm.getContext());
132 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
133 if (!Value)
134 return; // Doesn't change encoding.
135
136 // Shift the value into position.
137 Value <<= Info.TargetOffset;
138
139 unsigned Offset = Fixup.getOffset();
140 unsigned NumBytes = alignTo(Info.TargetSize + Info.TargetOffset, 8) / 8;
141
142 assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
143
144 // For each byte of the fragment that the fixup touches, mask in the
145 // bits from the fixup value.
146 for (unsigned i = 0; i != NumBytes; ++i) {
147 Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff);
148 }
149}
150
151bool MSP430AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
152 const MCSubtargetInfo *STI) const {
153 if ((Count % 2) != 0)
154 return false;
155
156 // The canonical nop on MSP430 is mov #0, r3
157 uint64_t NopCount = Count / 2;
158 while (NopCount--)
159 OS.write("\x03\x43", 2);
160
161 return true;
162}
163
164} // end anonymous namespace
165
167 const MCSubtargetInfo &STI,
168 const MCRegisterInfo &MRI,
169 const MCTargetOptions &Options) {
170 return new MSP430AsmBackend(STI, ELF::ELFOSABI_STANDALONE);
171}
unsigned const MachineRegisterInfo * MRI
static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t Value, MCContext &Ctx, const Triple &TheTriple, bool IsResolved)
This file implements a class to represent arbitrary precision integral constant values and operations...
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
static LVOptions Options
Definition: LVOptions.cpp:25
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:43
virtual bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout, const bool WasForced) const
Target specific predicate for whether a given fixup requires the associated instruction to be relaxed...
virtual bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const =0
Write an (optimal) nop sequence of Count bytes to the given output.
virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const =0
Simple predicate for targets where !Resolved implies requiring relaxation.
virtual std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const =0
virtual unsigned getNumFixupKinds() const =0
Get the number of target specific fixup kinds.
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const =0
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
Context object for machine code objects.
Definition: MCContext.h:76
void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:1064
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:274
Generic base class for all target subtargets.
This represents an "assembler immediate".
Definition: MCValue.h:36
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
Target - Wrapper for Target specific information.
LLVM Value Representation.
Definition: Value.h:74
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
raw_ostream & write(unsigned char C)
@ ELFOSABI_STANDALONE
Definition: ELF.h:367
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:456
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
@ FirstTargetFixupKind
Definition: MCFixup.h:45
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:155
MCAsmBackend * createMSP430MCAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
std::unique_ptr< MCObjectTargetWriter > createMSP430ELFObjectWriter(uint8_t OSABI)
endianness
Definition: bit.h:70
Target independent information on a fixup kind.
@ FKF_IsPCRel
Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...