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13 #ifndef LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
14 #define LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
35 unsigned getMSACtrlReg(
const SDValue RegIdx)
const;
39 std::pair<SDNode *, SDNode *> selectMULT(
SDNode *
N,
unsigned Opc,
48 unsigned ShiftAmount)
const;
51 SDValue &Offset)
const override;
54 SDValue &Offset)
const override;
57 SDValue &Offset)
const override;
72 SDValue &Offset)
const override;
75 SDValue &Offset)
const override;
78 SDValue &Offset)
const override;
81 SDValue &Offset)
const override;
84 SDValue &Offset)
const override;
87 SDValue &Offset)
const override;
90 SDValue &Offset)
const override;
93 SDValue &Offset)
const override;
97 unsigned MinSizeInBits)
const override;
100 unsigned ImmBitSize)
const;
137 bool SelectInlineAsmMemoryOperand(
const SDValue &
Op,
138 unsigned ConstraintID,
139 std::vector<SDValue> &OutOps)
override;
This is an optimization pass for GlobalISel generic memory operations.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Represents one node in the SelectionDAG.
Represent the analysis usage information of a pass.
FunctionPass * createMipsSEISelDag(MipsTargetMachine &TM, CodeGenOpt::Level OptLevel)
Representation of each machine instruction.
Class for arbitrary precision integers.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MipsSEDAGToDAGISel(MipsTargetMachine &TM, CodeGenOpt::Level OL)
unsigned const MachineRegisterInfo * MRI
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
const char LLVMTargetMachineRef TM