LLVM 19.0.0git
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1//=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
9// This file contains the NVPTX implementation of TargetFrameLowering class.
13#include "NVPTXFrameLowering.h"
14#include "NVPTX.h"
15#include "NVPTXRegisterInfo.h"
16#include "NVPTXSubtarget.h"
17#include "NVPTXTargetMachine.h"
25using namespace llvm;
28 : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, Align(8), 0) {}
30bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
33 MachineBasicBlock &MBB) const {
34 if (MF.getFrameInfo().hasStackObjects()) {
35 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
39 const NVPTXRegisterInfo *NRI =
40 MF.getSubtarget<NVPTXSubtarget>().getRegisterInfo();
42 // This instruction really occurs before first instruction
43 // in the BB, so giving it no debug location.
44 DebugLoc dl = DebugLoc();
46 // Emits
47 // mov %SPL, %depot;
48 // cvta.local %SP, %SPL;
49 // for local address accesses in MF.
50 bool Is64Bit =
51 static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit();
52 unsigned CvtaLocalOpcode =
53 (Is64Bit ? NVPTX::cvta_local_yes_64 : NVPTX::cvta_local_yes);
54 unsigned MovDepotOpcode =
56 if (!MR.use_empty(NRI->getFrameRegister(MF))) {
57 // If %SP is not used, do not bother emitting "cvta.local %SP, %SPL".
58 MBBI = BuildMI(MBB, MBBI, dl,
59 MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode),
60 NRI->getFrameRegister(MF))
62 }
63 if (!MR.use_empty(NRI->getFrameLocalRegister(MF))) {
64 BuildMI(MBB, MBBI, dl,
65 MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
66 NRI->getFrameLocalRegister(MF))
68 }
69 }
74 Register &FrameReg) const {
75 const MachineFrameInfo &MFI = MF.getFrameInfo();
76 FrameReg = NVPTX::VRDepot;
82 MachineBasicBlock &MBB) const {}
84// This function eliminates ADJCALLSTACKDOWN,
85// ADJCALLSTACKUP pseudo instructions
89 // Simply discard ADJCALLSTACKDOWN,
90 // ADJCALLSTACKUP instructions.
91 return MBB.erase(I);
96 return {DwarfFrameBase::CFA, {0}};
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator MBBI
#define I(x, y, z)
Definition: MD5.cpp:58
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool is64Bit(const char *name)
A debug info location.
Definition: DebugLoc.h:33
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
Definition: MCInstrInfo.h:63
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
bool hasStackObjects() const
Return true if there are any stack objects in this function.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
unsigned getFunctionNumber() const
getFunctionNumber - Return a unique ID for the current function.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const MachineBasicBlock & front() const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
bool use_empty(Register RegNo) const
use_empty - Return true if there are no instructions using the specified register.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const override
Return the frame base information to be encoded in the DWARF subprogram debug info.
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Register getFrameLocalRegister(const MachineFunction &MF) const
Register getFrameRegister(const MachineFunction &MF) const override
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
StackOffset holds a fixed and a scalable offset in bytes.
Definition: TypeSize.h:33
int64_t getFixed() const
Returns the fixed component of the stack.
Definition: TypeSize.h:49
Information about stack frame layout on the target.
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
virtual const TargetInstrInfo * getInstrInfo() const
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39