28#include "llvm/Config/llvm-config.h"
41#define DEBUG_TYPE "codegen"
45 cl::desc(
"When printing machine IR, annotate instructions and blocks with "
46 "SlotIndexes when available"),
50 : BB(
B),
Number(-1), xParent(&MF) {
53 IrrLoopHeaderWeight =
B->getIrrLoopHeaderWeight();
56MachineBasicBlock::~MachineBasicBlock() =
default;
60 if (!CachedMCSymbol) {
87 return CachedMCSymbol;
91 if (!CachedEHCatchretMCSymbol) {
98 return CachedEHCatchretMCSymbol;
102 if (!CachedEndMCSymbol) {
110 return CachedEndMCSymbol;
137 MI.addRegOperandsToUseLists(RegInfo);
142 N->getParent()->removeFromMBBNumbering(
N->Number);
149 assert(!
N->getParent() &&
"machine instruction already in a basic block");
150 N->setParent(Parent);
156 MF->handleInsertion(*
N);
162 assert(
N->getParent() &&
"machine instruction not in a basic block");
166 MF->handleRemoval(*
N);
167 N->removeRegOperandsFromUseLists(MF->
getRegInfo());
170 N->setParent(
nullptr);
176 instr_iterator First,
177 instr_iterator
Last) {
178 assert(Parent->getParent() == FromList.Parent->getParent() &&
179 "cannot transfer MachineInstrs between MachineFunctions");
182 if (
this == &FromList)
185 assert(Parent != FromList.Parent &&
"Two lists have the same parent?");
190 First->setParent(Parent);
194 assert(!
MI->getParent() &&
"MI is still in a block!");
195 Parent->getParent()->deleteMachineInstr(
MI);
200 while (
I !=
E &&
I->isPHI())
202 assert((
I ==
E || !
I->isInsideBundle()) &&
203 "First non-phi MI cannot be inside a bundle!");
212 while (
I !=
E && (
I->isPHI() ||
I->isPosition() ||
213 TII->isBasicBlockPrologue(*
I)))
217 assert((
I ==
E || !
I->isInsideBundle()) &&
218 "First non-phi / non-label instruction is inside a bundle!");
228 while (
I !=
E && (
I->isPHI() ||
I->isPosition() ||
I->isDebugInstr() ||
229 (SkipPseudoOp &&
I->isPseudoProbe()) ||
230 TII->isBasicBlockPrologue(*
I)))
234 assert((
I ==
E || !
I->isInsideBundle()) &&
235 "First non-phi / non-label / non-debug "
236 "instruction is inside a bundle!");
242 while (
I !=
B && ((--
I)->isTerminator() ||
I->isDebugInstr()))
244 while (
I !=
E && !
I->isTerminator())
251 while (
I !=
B && ((--
I)->isTerminator() ||
I->isDebugInstr()))
253 while (
I !=
E && !
I->isTerminator())
259 return find_if(
instrs(), [](
auto &II) {
return II.isTerminator(); });
275 if (
I->isDebugInstr() ||
I->isInsideBundle())
277 if (SkipPseudoOp &&
I->isPseudoProbe())
296#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
304 if (Succ->isInlineAsmBrIndirectTarget())
318 return LBB->getName();
336 bool IsStandalone)
const {
339 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
344 const Module *M =
F.getParent();
347 print(OS, MST, Indexes, IsStandalone);
352 bool IsStandalone)
const {
355 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
369 bool HasLineAttributes =
false;
373 if (Indexes) OS <<
'\t';
375 OS <<
"; predecessors: ";
380 HasLineAttributes =
true;
384 if (Indexes) OS <<
'\t';
386 OS.
indent(2) <<
"successors: ";
395 if (!Probs.empty() && IsStandalone) {
411 HasLineAttributes =
true;
415 if (Indexes) OS <<
'\t';
416 OS.
indent(2) <<
"liveins: ";
419 for (
const auto &LI :
liveins()) {
421 if (!LI.LaneMask.all())
424 HasLineAttributes =
true;
427 if (HasLineAttributes)
430 bool IsInBundle =
false;
438 if (IsInBundle && !
MI.isInsideBundle()) {
443 OS.
indent(IsInBundle ? 4 : 2);
444 MI.
print(OS, MST, IsStandalone,
false,
false,
457 if (IrrLoopHeaderWeight && IsStandalone) {
458 if (Indexes) OS <<
'\t';
459 OS.
indent(2) <<
"; Irreducible loop header weight: " << *IrrLoopHeaderWeight
483 bool hasAttributes =
false;
492 if (moduleSlotTracker) {
494 }
else if (bb->getParent()) {
501 os <<
"<ir-block badref>";
510 os <<
'.' << bb->getName();
512 hasAttributes =
true;
521 os << (hasAttributes ?
", " :
" (");
522 os <<
"machine-block-address-taken";
523 hasAttributes =
true;
526 os << (hasAttributes ?
", " :
" (");
527 os <<
"ir-block-address-taken ";
529 hasAttributes =
true;
532 os << (hasAttributes ?
", " :
" (");
534 hasAttributes =
true;
537 os << (hasAttributes ?
", " :
" (");
538 os <<
"inlineasm-br-indirect-target";
539 hasAttributes =
true;
542 os << (hasAttributes ?
", " :
" (");
543 os <<
"ehfunclet-entry";
544 hasAttributes =
true;
547 os << (hasAttributes ?
", " :
" (");
549 hasAttributes =
true;
552 os << (hasAttributes ?
", " :
" (");
564 hasAttributes =
true;
567 os << (hasAttributes ?
", " :
" (");
569 hasAttributes =
true;
586 if (
I == LiveIns.end())
589 I->LaneMask &= ~LaneMask;
590 if (
I->LaneMask.none())
597 LiveInVector::iterator LI = LiveIns.begin() + (
I - LiveIns.begin());
598 return LiveIns.erase(LI);
604 return I !=
livein_end() && (
I->LaneMask & LaneMask).any();
613 LiveInVector::const_iterator
I = LiveIns.begin();
614 LiveInVector::const_iterator J;
615 LiveInVector::iterator Out = LiveIns.begin();
616 for (;
I != LiveIns.end(); ++Out,
I = J) {
619 for (J = std::next(
I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
620 LaneMask |= J->LaneMask;
621 Out->PhysReg = PhysReg;
622 Out->LaneMask = LaneMask;
624 LiveIns.erase(Out, LiveIns.end());
631 assert(RC &&
"Register class is required");
633 "Only the entry block and landing pads can have physreg live ins");
642 for (;
I !=
E &&
I->isCopy(); ++
I)
643 if (
I->getOperand(1).getReg() == PhysReg) {
644 Register VirtReg =
I->getOperand(0).getReg();
645 if (!
MRI.constrainRegClass(VirtReg, RC))
682 assert(!
B &&
"UpdateTerminators requires analyzable predecessors!");
697 if (!PreviousLayoutSuccessor || !
isSuccessor(PreviousLayoutSuccessor) ||
698 PreviousLayoutSuccessor->
isEHPad())
726 assert(PreviousLayoutSuccessor);
730 if (PreviousLayoutSuccessor ==
TBB) {
761 for (
auto Prob : Probs)
762 Sum += Prob.getNumerator();
768 "The sum of successors's probabilities exceeds one.");
776 if (!(Probs.empty() && !Successors.empty()))
777 Probs.push_back(Prob);
778 Successors.push_back(Succ);
779 Succ->addPredecessor(
this);
787 Successors.push_back(Succ);
788 Succ->addPredecessor(
this);
793 bool NormalizeSuccProbs) {
795 assert(OldI !=
succ_end() &&
"Old is not a successor of this block!");
797 "New is already a successor of this block!");
805 : *getProbabilityIterator(OldI));
806 if (NormalizeSuccProbs)
811 bool NormalizeSuccProbs) {
818 assert(
I != Successors.end() &&
"Not a current successor!");
822 if (!Probs.empty()) {
823 probability_iterator WI = getProbabilityIterator(
I);
825 if (NormalizeSuccProbs)
829 (*I)->removePredecessor(
this);
830 return Successors.erase(
I);
853 assert(OldI !=
E &&
"Old is not a successor of this block");
857 Old->removePredecessor(
this);
858 New->addPredecessor(
this);
865 if (!Probs.empty()) {
866 auto ProbIter = getProbabilityIterator(NewI);
867 if (!ProbIter->isUnknown())
868 *ProbIter += *getProbabilityIterator(OldI);
875 if (!Orig->Probs.empty())
882 Predecessors.push_back(Pred);
887 assert(
I != Predecessors.end() &&
"Pred is not a predecessor of this block!");
888 Predecessors.erase(
I);
900 if (!FromMBB->Probs.empty()) {
901 auto Prob = *FromMBB->Probs.begin();
917 if (!FromMBB->Probs.empty()) {
918 auto Prob = *FromMBB->Probs.begin();
944 return Successors.size() == 1 ? Successors[0] :
nullptr;
974 if (!
TBB)
return &*Fallthrough;
980 return &*Fallthrough;
984 if (
Cond.empty())
return nullptr;
988 return (FBB ==
nullptr) ? &*Fallthrough :
nullptr;
1001 if (SplitPoint ==
end()) {
1009 if (UpdateLiveIns) {
1057 Indexes->insertMBBInMaps(NMBB);
1070 if (!MO.isReg() || MO.getReg() == 0 || !MO.isUse() || !MO.isKill() ||
1075 KilledRegs.push_back(Reg);
1077 MO.setIsKill(
false);
1087 if (!MO.isReg() || MO.getReg() == 0)
1110 if (Succ == PrevFallthrough)
1111 PrevFallthrough = NMBB;
1122 Indexes->removeMachineInstrFromMaps(*Terminator);
1137 if (Indexes->hasIndex(
MI))
1138 Indexes->removeMachineInstrFromMaps(
MI);
1139 Indexes->insertMachineInstrInMaps(
MI);
1148 for (
const auto &LI : Succ->
liveins())
1155 while (!KilledRegs.empty()) {
1156 Register Reg = KilledRegs.pop_back_val();
1158 if (!(--
I)->addRegisterKilled(Reg,
TRI,
false))
1160 if (Reg.isVirtual())
1167 if (LiveInSets !=
nullptr)
1184 SlotIndex StartIndex = Indexes->getMBBEndIdx(
this);
1186 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
1192 I !=
E &&
I->isPHI(); ++
I) {
1193 for (
unsigned ni = 1, ne =
I->getNumOperands(); ni != ne; ni += 2) {
1194 if (
I->getOperand(ni+1).getMBB() == NMBB) {
1204 "PHI sources should be live out of their predecessors.");
1211 for (
unsigned i = 0, e =
MRI->getNumVirtRegs(); i != e; ++i) {
1217 if (!LI.
liveAt(PrevIndex))
1223 assert(VNI &&
"LiveInterval should have VNInfo where it is live.");
1237 MDT->recordSplitCriticalEdge(
this, Succ, NMBB);
1243 if (
MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
1244 if (TIL == DestLoop) {
1246 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1247 }
else if (TIL->contains(DestLoop)) {
1249 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
1250 }
else if (DestLoop->contains(TIL)) {
1252 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1258 assert(DestLoop->getHeader() == Succ &&
1259 "Should not create irreducible loops!");
1261 P->addBasicBlockToLoop(NMBB, MLI->getBase());
1302 LLVM_DEBUG(
dbgs() <<
"Won't split critical edge after degenerate "
1313 if (
MI->isBundledWithSucc() && !
MI->isBundledWithPred())
1314 MI->unbundleFromSucc();
1316 if (
MI->isBundledWithPred() && !
MI->isBundledWithSucc())
1317 MI->unbundleFromPred();
1337 assert(!
MI->isBundledWithPred() && !
MI->isBundledWithSucc() &&
1338 "Cannot insert instruction with bundle flags");
1365 assert(Old != New &&
"Cannot replace self with self!");
1370 if (!
I->isTerminator())
break;
1374 for (
unsigned i = 0, e =
I->getNumOperands(); i != e; ++i)
1375 if (
I->getOperand(i).isMBB() &&
1376 I->getOperand(i).getMBB() == Old)
1377 I->getOperand(i).setMBB(New);
1387 for (
unsigned i = 2, e =
MI.getNumOperands() + 1; i != e; i += 2) {
1401 return MBBI->getDebugLoc();
1408 if (!
MBBI->isDebugInstr())
1409 return MBBI->getDebugLoc();
1419 if (!
MBBI->isDebugInstr())
return MBBI->getDebugLoc();
1429 return MBBI->getDebugLoc();
1439 while (TI !=
end() && !TI->isBranch())
1443 DL = TI->getDebugLoc();
1444 for (++TI ; TI !=
end() ; ++TI)
1457 const auto &Prob = *getProbabilityIterator(Succ);
1458 if (Prob.isUnknown()) {
1461 unsigned KnownProbNum = 0;
1463 for (
const auto &
P : Probs) {
1464 if (!
P.isUnknown()) {
1469 return Sum.getCompl() / (Probs.size() - KnownProbNum);
1480 *getProbabilityIterator(
I) = Prob;
1484MachineBasicBlock::const_probability_iterator
1485MachineBasicBlock::getProbabilityIterator(
1487 assert(Probs.size() == Successors.size() &&
"Async probability list!");
1488 const size_t index = std::distance(Successors.begin(),
I);
1489 assert(index < Probs.size() &&
"Not a current successor!");
1490 return Probs.begin() + index;
1494MachineBasicBlock::probability_iterator
1496 assert(Probs.size() == Successors.size() &&
"Async probability list!");
1497 const size_t index = std::distance(Successors.begin(),
I);
1498 assert(index < Probs.size() &&
"Not a current successor!");
1499 return Probs.begin() + index;
1511 unsigned Neighborhood)
const {
1512 unsigned N = Neighborhood;
1516 for (;
I !=
end() &&
N > 0; ++
I) {
1517 if (
I->isDebugOrPseudoInstr())
1528 if (
Info.FullyDefined ||
Info.Clobbered)
1537 if (
TRI->regsOverlap(LI.PhysReg, Reg))
1555 if (
I->isDebugOrPseudoInstr())
1569 if (!
Info.PartialDeadDef)
1584 }
while (
I !=
begin() &&
N > 0);
1589 while (
I !=
begin() && std::prev(
I)->isDebugOrPseudoInstr())
1596 if (
TRI->regsOverlap(LI.PhysReg, Reg))
1627 "Liveness information is accurate");
1628 return LiveIns.begin();
1635 "Liveness information is accurate");
1638 MCPhysReg ExceptionPointer = 0, ExceptionSelector = 0;
1645 return liveout_iterator(*
this, ExceptionPointer, ExceptionSelector,
false);
1651 for (
auto I = R.begin(),
E = R.end();
I !=
E; ++
I) {
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
SmallVector< MachineOperand, 4 > Cond
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Analysis containing CSE Info
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
const HexagonInstrInfo * TII
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
static void unbundleSingleMI(MachineInstr *MI)
Prepare MI to be removed from its bundle.
static cl::opt< bool > PrintSlotIndexes("print-slotindexes", cl::desc("When printing machine IR, annotate instructions and blocks with " "SlotIndexes when available"), cl::init(true), cl::Hidden)
unsigned const TargetRegisterInfo * TRI
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isLiveOut(const MachineBasicBlock &MBB, unsigned Reg)
This file describes how to lower LLVM code to machine code.
LLVM Basic Block Representation.
static uint32_t getDenominator()
static BranchProbability getUnknown()
uint32_t getNumerator() const
static BranchProbability getZero()
static const DILocation * getMergedLocation(const DILocation *LocA, const DILocation *LocB)
When two instructions are combined into a single instruction we also need to combine the original loc...
bool hasPersonalityFn() const
Check whether this function has a personality function.
Constant * getPersonalityFn() const
Get the personality function associated with this function.
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
Remove the branching code at the end of the specific MBB.
bool isPredicated(const MachineInstr &MI) const override
Returns true if the instruction is already predicated.
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Reverses the branch condition of the specified condition list, returning false on success and true if...
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
Insert branch code into the end of the specified MachineBasicBlock.
LiveInterval - This class represents the liveness of a register, or stack slot.
void repairIntervalsInRange(MachineBasicBlock *MBB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, ArrayRef< Register > OrigRegs)
Update live intervals for instructions in a range of iterators.
bool hasInterval(Register Reg) const
SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const
Return the first index in the given basic block.
void insertMBBInMaps(MachineBasicBlock *MBB)
LiveInterval & getInterval(Register Reg)
A set of physical registers with utility functions to track liveness when walking backward/forward th...
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
iterator addSegment(Segment S)
Add the specified Segment to this range, merging segments as appropriate.
bool liveAt(SlotIndex index) const
void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)
Remove the specified segment from this range.
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
VarInfo & getVarInfo(Register Reg)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
StringRef getPrivateLabelPrefix() const
Context object for machine code objects.
uint8_t getBBAddrMapVersion() const
const MCAsmInfo * getAsmInfo() const
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Wrapper class representing physical registers. Should be passed by value.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
DebugLoc rfindPrevDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findPrevDebugLoc (it also searches from the last to the first MI of this M...
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
bool hasEHPadSuccessor() const
iterator SkipPHIsLabelsAndDebug(iterator I, bool SkipPseudoOp=true)
Return the first instruction in MBB after I that is not a PHI, label or debug.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
livein_iterator livein_end() const
iterator getFirstTerminatorForward()
Finds the first terminator in a block by scanning forward.
bool isEHPad() const
Returns true if the block is a landing pad.
void replacePhiUsesWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Update all phi nodes in this basic block to refer to basic block New instead of basic block Old.
MachineInstr * remove_instr(MachineInstr *I)
Remove the possibly bundled instruction from the instruction list without deleting it.
instr_iterator instr_begin()
MachineInstrBundleIterator< const MachineInstr > const_iterator
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
MCSymbol * getEHCatchretSymbol() const
Return the EHCatchret Symbol for this basic block.
void moveBefore(MachineBasicBlock *NewAfter)
Move 'this' block before or after the specified block.
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
Replace successor OLD with NEW and update probability info.
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
BranchProbability getSuccProbability(const_succ_iterator Succ) const
Return probability of the edge from this block to MBB.
iterator_range< livein_iterator > liveins() const
iterator_range< iterator > phis()
Returns a range that iterates over the phis in the basic block.
reverse_instr_iterator instr_rbegin()
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
void addSuccessorWithoutProb(MachineBasicBlock *Succ)
Add Succ as a successor of this MachineBasicBlock.
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
void splitSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New, bool NormalizeSuccProbs=false)
Split the old successor into old plus new and updates the probability info.
@ PrintNameIr
Add IR name where available.
@ PrintNameAttributes
Print attributes.
void updateTerminator(MachineBasicBlock *PreviousLayoutSuccessor)
Update the terminator instructions in block to account for changes to block layout which may have bee...
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
iterator getFirstNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the first non-debug instruction in the basic block, or end().
succ_iterator succ_begin()
bool livein_empty() const
std::optional< unsigned > getBBID() const
void printAsOperand(raw_ostream &OS, bool PrintType=true) const
void validateSuccProbs() const
Validate successors' probabilities and check if the sum of them is approximate one.
bool isIRBlockAddressTaken() const
Test whether this block is the target of an IR BlockAddress.
LiveInVector::const_iterator livein_iterator
MCSymbol * getEndSymbol() const
Returns the MCSymbol marking the end of this basic block.
MachineBasicBlock * getFallThrough(bool JumpToFallThrough=false)
Return the fallthrough block if the block can implicitly transfer control to the block after it by fa...
void clearLiveIns()
Clear live in list.
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, MCRegister Reg, const_iterator Before, unsigned Neighborhood=10) const
Return whether (physical) register Reg has been defined and not killed as of just before Before.
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
livein_iterator livein_begin() const
unsigned succ_size() const
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
const uint32_t * getBeginClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the start of this basic block.
MBBSectionID getSectionID() const
Returns the section ID of this basic block.
unsigned getBBIDOrNumber() const
Returns the BBID of the block when BBAddrMapVersion >= 2, otherwise returns MachineBasicBlock::Number...
std::vector< MachineBasicBlock * >::iterator succ_iterator
bool isEntryBlock() const
Returns true if this is the entry block of the function.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
BasicBlock * getAddressTakenIRBlock() const
Retrieves the BasicBlock which corresponds to this MachineBasicBlock.
void sortUniqueLiveIns()
Sorts and uniques the LiveIns vector.
const MachineBasicBlock * getSingleSuccessor() const
Return the successor of this block if it has a single successor.
liveout_iterator liveout_begin() const
Iterator scanning successor basic blocks' liveins to determine the registers potentially live at the ...
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
bool isPredecessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a predecessor of this block.
DebugLoc rfindDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findDebugLoc (it also searches from the first to the last MI of this MBB) ...
void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const
reverse_instr_iterator instr_rend()
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE and DBG_LABEL instructions.
Instructions::iterator instr_iterator
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to 'Old', change the code and CFG so that it branches to 'N...
MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P, std::vector< SparseBitVector<> > *LiveInSets=nullptr)
Split the critical edge from this block to the given successor block, and return the newly created bl...
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
DebugLoc findPrevDebugLoc(instr_iterator MBBI)
Find the previous valid DebugLoc preceding MBBI, skipping and DBG_VALUE instructions.
MachineBasicBlock * splitAt(MachineInstr &SplitInst, bool UpdateLiveIns=true, LiveIntervals *LIS=nullptr)
Split a basic block into 2 pieces at SplitPoint.
void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
instr_iterator instr_end()
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
std::string getFullName() const
Return a formatted string to identify this block and its parent function.
bool isBeginSection() const
Returns true if this block begins any section.
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
iterator_range< succ_iterator > successors()
instr_iterator getFirstInstrTerminator()
Same getFirstTerminator but it ignores bundles and return an instr_iterator instead.
reverse_iterator rbegin()
bool isMachineBlockAddressTaken() const
Test whether this block is used as something other than the target of a terminator,...
void printName(raw_ostream &os, unsigned printNameFlags=PrintNameIr, ModuleSlotTracker *moduleSlotTracker=nullptr) const
Print the basic block's name as:
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
iterator_range< pred_iterator > predecessors()
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
Align getAlignment() const
Return alignment of the basic block.
bool canSplitCriticalEdge(const MachineBasicBlock *Succ) const
Check if the edge between this block and the given successor Succ, can be split.
bool isLegalToHoistInto() const
Returns true if it is legal to hoist instructions into this block.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
void copySuccessor(MachineBasicBlock *Orig, succ_iterator I)
Copy a successor (and any probability info) from original block to this block's.
bool mayHaveInlineAsmBr() const
Returns true if this block may have an INLINEASM_BR (overestimate, by checking if any of the successo...
void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Remove the specified register from the live in set.
LivenessQueryResult
Possible outcome of a register liveness query to computeRegisterLiveness()
@ LQR_Dead
Register is known to be fully dead.
@ LQR_Live
Register is known to be (at least partially) live.
@ LQR_Unknown
Register liveness not decidable from local neighborhood.
void moveAfter(MachineBasicBlock *NewBefore)
const uint32_t * getEndClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the end of the basic block.
bool sizeWithoutDebugLargerThan(unsigned Limit) const
MachineBasicBlock * removeFromParent()
This method unlinks 'this' from the containing function, and returns it, but does not delete it.
Instructions::reverse_iterator reverse_instr_iterator
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
bool hasProperty(Property P) const
unsigned addToMBBNumbering(MachineBasicBlock *MBB)
Adds the MBB to the internal numbering.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
unsigned getFunctionNumber() const
getFunctionNumber - Return a unique ID for the current function.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
bool hasBBSections() const
Returns true if this function has basic block sections enabled.
MCContext & getContext() const
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
void remove(iterator MBBI)
const MachineFunctionProperties & getProperties() const
Get the function properties.
void splice(iterator InsertPt, iterator MBBI)
void erase(iterator MBBI)
void insert(iterator MBBI, MachineBasicBlock *MBB)
BasicBlockListType::const_iterator const_iterator
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
reverse_iterator getReverse() const
Get a reverse iterator to the same node.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
MachineBasicBlock * getMBB() const
void setMBB(MachineBasicBlock *MBB)
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Manage lifetime of a slot tracker for printing IR.
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Pass interface - Implemented by all 'passes'.
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
Simple wrapper around std::function<void(raw_ostream&)>.
Wrapper class representing virtual and physical registers.
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
SlotIndex - An opaque wrapper around machine indexes.
SlotIndex getPrevSlot() const
Returns the previous slot in the index list.
SlotIndex getInstructionIndex(const MachineInstr &MI, bool IgnoreBundle=false) const
Returns the base index for the given instruction.
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
bool hasIndex(const MachineInstr &instr) const
Returns true if the given machine instr is mapped to an index, otherwise returns false.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
std::pair< const_iterator, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
TargetInstrInfo - Interface to description of machine instruction set.
virtual Register getExceptionPointerRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception address on entry to an ...
virtual Register getExceptionSelectorRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception typeid on entry to a la...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
bool requiresStructuredCFG() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetLowering * getTargetLowering() const
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
VNInfo - Value Number Information.
StringRef getName() const
Return a constant reference to the value's name.
Iterator for intrusive lists based on ilist_node.
self_iterator getIterator()
MachineBasicBlock * getNextNode()
Get the next node, or nullptr for the list tail.
iterator erase(iterator where)
pointer remove(iterator &IT)
iterator insert(iterator where, pointer New)
This class implements an extremely fast bulk output stream that can only output to a stream.
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
A raw_ostream that writes to an SmallVector or SmallString.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ Kill
The last use of a register.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It, then continue incrementing it while it points to a debug instruction.
auto find(R &&Range, const T &Val)
Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, const TargetRegisterInfo *TRI)
AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses a physical register.
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator.
void sort(IteratorTy Start, IteratorTy End)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
auto instructionsWithoutDebug(IterT It, IterT End, bool SkipPseudoOp=true)
Construct a range iterator which begins at It and moves forwards until End is reached,...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
IterT prev_nodbg(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It, then continue decrementing it while it points to a debug instruction.
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
This struct is a compact representation of a valid (non-zero power of two) alignment.
uint64_t value() const
This is a hole in the type system and should not be abused.
This represents a simple continuous liveness interval for a value.
bool removeKill(MachineInstr &MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...
static const MBBSectionID ExceptionSectionID
static const MBBSectionID ColdSectionID
enum llvm::MBBSectionID::SectionType Type
Pair of physical register and lane mask.
Information about how a physical register Reg is used by a set of operands.
static void deleteNode(NodeTy *V)
void removeNodeFromList(NodeTy *)
void addNodeToList(NodeTy *)
void transferNodesFromList(ilist_callback_traits &OldList, Iterator, Iterator)
Callback before transferring nodes to this list.
Template traits for intrusive list.