LLVM  13.0.0git
MachineBasicBlock.cpp
Go to the documentation of this file.
1 //===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Collect the sequence of machine instructions for a basic block.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/Config/llvm-config.h"
28 #include "llvm/IR/BasicBlock.h"
29 #include "llvm/IR/DataLayout.h"
32 #include "llvm/MC/MCAsmInfo.h"
33 #include "llvm/MC/MCContext.h"
34 #include "llvm/Support/DataTypes.h"
35 #include "llvm/Support/Debug.h"
38 #include <algorithm>
39 using namespace llvm;
40 
41 #define DEBUG_TYPE "codegen"
42 
44  "print-slotindexes",
45  cl::desc("When printing machine IR, annotate instructions and blocks with "
46  "SlotIndexes when available"),
47  cl::init(true), cl::Hidden);
48 
49 MachineBasicBlock::MachineBasicBlock(MachineFunction &MF, const BasicBlock *B)
50  : BB(B), Number(-1), xParent(&MF) {
51  Insts.Parent = this;
52  if (B)
53  IrrLoopHeaderWeight = B->getIrrLoopHeaderWeight();
54 }
55 
56 MachineBasicBlock::~MachineBasicBlock() {
57 }
58 
59 /// Return the MCSymbol for this basic block.
61  if (!CachedMCSymbol) {
62  const MachineFunction *MF = getParent();
63  MCContext &Ctx = MF->getContext();
64 
65  // We emit a non-temporary symbol -- with a descriptive name -- if it begins
66  // a section (with basic block sections). Otherwise we fall back to use temp
67  // label.
68  if (MF->hasBBSections() && isBeginSection()) {
69  SmallString<5> Suffix;
70  if (SectionID == MBBSectionID::ColdSectionID) {
71  Suffix += ".cold";
72  } else if (SectionID == MBBSectionID::ExceptionSectionID) {
73  Suffix += ".eh";
74  } else {
75  // For symbols that represent basic block sections, we add ".__part." to
76  // allow tools like symbolizers to know that this represents a part of
77  // the original function.
78  Suffix = (Suffix + Twine(".__part.") + Twine(SectionID.Number)).str();
79  }
80  CachedMCSymbol = Ctx.getOrCreateSymbol(MF->getName() + Suffix);
81  } else {
83  CachedMCSymbol = Ctx.getOrCreateSymbol(Twine(Prefix) + "BB" +
84  Twine(MF->getFunctionNumber()) +
85  "_" + Twine(getNumber()));
86  }
87  }
88  return CachedMCSymbol;
89 }
90 
92  if (!CachedEHCatchretMCSymbol) {
93  const MachineFunction *MF = getParent();
96  << "$ehgcr_" << MF->getFunctionNumber() << '_' << getNumber();
97  CachedEHCatchretMCSymbol = MF->getContext().getOrCreateSymbol(SymbolName);
98  }
99  return CachedEHCatchretMCSymbol;
100 }
101 
103  if (!CachedEndMCSymbol) {
104  const MachineFunction *MF = getParent();
105  MCContext &Ctx = MF->getContext();
106  auto Prefix = Ctx.getAsmInfo()->getPrivateLabelPrefix();
107  CachedEndMCSymbol = Ctx.getOrCreateSymbol(Twine(Prefix) + "BB_END" +
108  Twine(MF->getFunctionNumber()) +
109  "_" + Twine(getNumber()));
110  }
111  return CachedEndMCSymbol;
112 }
113 
115  MBB.print(OS);
116  return OS;
117 }
118 
120  return Printable([&MBB](raw_ostream &OS) { return MBB.printAsOperand(OS); });
121 }
122 
123 /// When an MBB is added to an MF, we need to update the parent pointer of the
124 /// MBB, the MBB numbering, and any instructions in the MBB to be on the right
125 /// operand list for registers.
126 ///
127 /// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
128 /// gets the next available unique MBB number. If it is removed from a
129 /// MachineFunction, it goes back to being #-1.
131  MachineBasicBlock *N) {
132  MachineFunction &MF = *N->getParent();
133  N->Number = MF.addToMBBNumbering(N);
134 
135  // Make sure the instructions have their operands in the reginfo lists.
136  MachineRegisterInfo &RegInfo = MF.getRegInfo();
138  I = N->instr_begin(), E = N->instr_end(); I != E; ++I)
139  I->AddRegOperandsToUseLists(RegInfo);
140 }
141 
143  MachineBasicBlock *N) {
144  N->getParent()->removeFromMBBNumbering(N->Number);
145  N->Number = -1;
146 }
147 
148 /// When we add an instruction to a basic block list, we update its parent
149 /// pointer and add its operands from reg use/def lists if appropriate.
151  assert(!N->getParent() && "machine instruction already in a basic block");
152  N->setParent(Parent);
153 
154  // Add the instruction's register operands to their corresponding
155  // use/def lists.
156  MachineFunction *MF = Parent->getParent();
157  N->AddRegOperandsToUseLists(MF->getRegInfo());
158  MF->handleInsertion(*N);
159 }
160 
161 /// When we remove an instruction from a basic block list, we update its parent
162 /// pointer and remove its operands from reg use/def lists if appropriate.
164  assert(N->getParent() && "machine instruction not in a basic block");
165 
166  // Remove from the use/def lists.
167  if (MachineFunction *MF = N->getMF()) {
168  MF->handleRemoval(*N);
169  N->RemoveRegOperandsFromUseLists(MF->getRegInfo());
170  }
171 
172  N->setParent(nullptr);
173 }
174 
175 /// When moving a range of instructions from one MBB list to another, we need to
176 /// update the parent pointers and the use/def lists.
178  instr_iterator First,
179  instr_iterator Last) {
180  assert(Parent->getParent() == FromList.Parent->getParent() &&
181  "cannot transfer MachineInstrs between MachineFunctions");
182 
183  // If it's within the same BB, there's nothing to do.
184  if (this == &FromList)
185  return;
186 
187  assert(Parent != FromList.Parent && "Two lists have the same parent?");
188 
189  // If splicing between two blocks within the same function, just update the
190  // parent pointers.
191  for (; First != Last; ++First)
192  First->setParent(Parent);
193 }
194 
196  assert(!MI->getParent() && "MI is still in a block!");
197  Parent->getParent()->DeleteMachineInstr(MI);
198 }
199 
202  while (I != E && I->isPHI())
203  ++I;
204  assert((I == E || !I->isInsideBundle()) &&
205  "First non-phi MI cannot be inside a bundle!");
206  return I;
207 }
208 
212 
213  iterator E = end();
214  while (I != E && (I->isPHI() || I->isPosition() ||
215  TII->isBasicBlockPrologue(*I)))
216  ++I;
217  // FIXME: This needs to change if we wish to bundle labels
218  // inside the bundle.
219  assert((I == E || !I->isInsideBundle()) &&
220  "First non-phi / non-label instruction is inside a bundle!");
221  return I;
222 }
223 
226  bool SkipPseudoOp) {
228 
229  iterator E = end();
230  while (I != E && (I->isPHI() || I->isPosition() || I->isDebugInstr() ||
231  (SkipPseudoOp && I->isPseudoProbe()) ||
232  TII->isBasicBlockPrologue(*I)))
233  ++I;
234  // FIXME: This needs to change if we wish to bundle labels / dbg_values
235  // inside the bundle.
236  assert((I == E || !I->isInsideBundle()) &&
237  "First non-phi / non-label / non-debug "
238  "instruction is inside a bundle!");
239  return I;
240 }
241 
243  iterator B = begin(), E = end(), I = E;
244  while (I != B && ((--I)->isTerminator() || I->isDebugInstr()))
245  ; /*noop */
246  while (I != E && !I->isTerminator())
247  ++I;
248  return I;
249 }
250 
252  instr_iterator B = instr_begin(), E = instr_end(), I = E;
253  while (I != B && ((--I)->isTerminator() || I->isDebugInstr()))
254  ; /*noop */
255  while (I != E && !I->isTerminator())
256  ++I;
257  return I;
258 }
259 
262  // Skip over begin-of-block dbg_value instructions.
263  return skipDebugInstructionsForward(begin(), end(), SkipPseudoOp);
264 }
265 
268  // Skip over end-of-block dbg_value instructions.
270  while (I != B) {
271  --I;
272  // Return instruction that starts a bundle.
273  if (I->isDebugInstr() || I->isInsideBundle())
274  continue;
275  if (SkipPseudoOp && I->isPseudoProbe())
276  continue;
277  return I;
278  }
279  // The block is all debug values.
280  return end();
281 }
282 
284  for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I)
285  if ((*I)->isEHPad())
286  return true;
287  return false;
288 }
289 
291  return getParent()->begin() == getIterator();
292 }
293 
294 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
296  print(dbgs());
297 }
298 #endif
299 
301  for (const MachineBasicBlock *Succ : successors()) {
302  if (Succ->isInlineAsmBrIndirectTarget())
303  return true;
304  }
305  return false;
306 }
307 
310  return false;
311  return true;
312 }
313 
315  if (const BasicBlock *LBB = getBasicBlock())
316  return LBB->getName();
317  else
318  return StringRef("", 0);
319 }
320 
321 /// Return a hopefully unique identifier for this block.
322 std::string MachineBasicBlock::getFullName() const {
323  std::string Name;
324  if (getParent())
325  Name = (getParent()->getName() + ":").str();
326  if (getBasicBlock())
327  Name += getBasicBlock()->getName();
328  else
329  Name += ("BB" + Twine(getNumber())).str();
330  return Name;
331 }
332 
334  bool IsStandalone) const {
335  const MachineFunction *MF = getParent();
336  if (!MF) {
337  OS << "Can't print out MachineBasicBlock because parent MachineFunction"
338  << " is null\n";
339  return;
340  }
341  const Function &F = MF->getFunction();
342  const Module *M = F.getParent();
343  ModuleSlotTracker MST(M);
344  MST.incorporateFunction(F);
345  print(OS, MST, Indexes, IsStandalone);
346 }
347 
349  const SlotIndexes *Indexes,
350  bool IsStandalone) const {
351  const MachineFunction *MF = getParent();
352  if (!MF) {
353  OS << "Can't print out MachineBasicBlock because parent MachineFunction"
354  << " is null\n";
355  return;
356  }
357 
358  if (Indexes && PrintSlotIndexes)
359  OS << Indexes->getMBBStartIdx(this) << '\t';
360 
362  OS << ":\n";
363 
365  const MachineRegisterInfo &MRI = MF->getRegInfo();
367  bool HasLineAttributes = false;
368 
369  // Print the preds of this block according to the CFG.
370  if (!pred_empty() && IsStandalone) {
371  if (Indexes) OS << '\t';
372  // Don't indent(2), align with previous line attributes.
373  OS << "; predecessors: ";
374  ListSeparator LS;
375  for (auto *Pred : predecessors())
376  OS << LS << printMBBReference(*Pred);
377  OS << '\n';
378  HasLineAttributes = true;
379  }
380 
381  if (!succ_empty()) {
382  if (Indexes) OS << '\t';
383  // Print the successors
384  OS.indent(2) << "successors: ";
385  ListSeparator LS;
386  for (auto I = succ_begin(), E = succ_end(); I != E; ++I) {
387  OS << LS << printMBBReference(**I);
388  if (!Probs.empty())
389  OS << '('
390  << format("0x%08" PRIx32, getSuccProbability(I).getNumerator())
391  << ')';
392  }
393  if (!Probs.empty() && IsStandalone) {
394  // Print human readable probabilities as comments.
395  OS << "; ";
396  ListSeparator LS;
397  for (auto I = succ_begin(), E = succ_end(); I != E; ++I) {
398  const BranchProbability &BP = getSuccProbability(I);
399  OS << LS << printMBBReference(**I) << '('
400  << format("%.2f%%",
401  rint(((double)BP.getNumerator() / BP.getDenominator()) *
402  100.0 * 100.0) /
403  100.0)
404  << ')';
405  }
406  }
407 
408  OS << '\n';
409  HasLineAttributes = true;
410  }
411 
412  if (!livein_empty() && MRI.tracksLiveness()) {
413  if (Indexes) OS << '\t';
414  OS.indent(2) << "liveins: ";
415 
416  ListSeparator LS;
417  for (const auto &LI : liveins()) {
418  OS << LS << printReg(LI.PhysReg, TRI);
419  if (!LI.LaneMask.all())
420  OS << ":0x" << PrintLaneMask(LI.LaneMask);
421  }
422  HasLineAttributes = true;
423  }
424 
425  if (HasLineAttributes)
426  OS << '\n';
427 
428  bool IsInBundle = false;
429  for (const MachineInstr &MI : instrs()) {
430  if (Indexes && PrintSlotIndexes) {
431  if (Indexes->hasIndex(MI))
432  OS << Indexes->getInstructionIndex(MI);
433  OS << '\t';
434  }
435 
436  if (IsInBundle && !MI.isInsideBundle()) {
437  OS.indent(2) << "}\n";
438  IsInBundle = false;
439  }
440 
441  OS.indent(IsInBundle ? 4 : 2);
442  MI.print(OS, MST, IsStandalone, /*SkipOpers=*/false, /*SkipDebugLoc=*/false,
443  /*AddNewLine=*/false, &TII);
444 
445  if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
446  OS << " {";
447  IsInBundle = true;
448  }
449  OS << '\n';
450  }
451 
452  if (IsInBundle)
453  OS.indent(2) << "}\n";
454 
455  if (IrrLoopHeaderWeight && IsStandalone) {
456  if (Indexes) OS << '\t';
457  OS.indent(2) << "; Irreducible loop header weight: "
458  << IrrLoopHeaderWeight.getValue() << '\n';
459  }
460 }
461 
462 /// Print the basic block's name as:
463 ///
464 /// bb.{number}[.{ir-name}] [(attributes...)]
465 ///
466 /// The {ir-name} is only printed when the \ref PrintNameIr flag is passed
467 /// (which is the default). If the IR block has no name, it is identified
468 /// numerically using the attribute syntax as "(%ir-block.{ir-slot})".
469 ///
470 /// When the \ref PrintNameAttributes flag is passed, additional attributes
471 /// of the block are printed when set.
472 ///
473 /// \param printNameFlags Combination of \ref PrintNameFlag flags indicating
474 /// the parts to print.
475 /// \param moduleSlotTracker Optional ModuleSlotTracker. This method will
476 /// incorporate its own tracker when necessary to
477 /// determine the block's IR name.
478 void MachineBasicBlock::printName(raw_ostream &os, unsigned printNameFlags,
479  ModuleSlotTracker *moduleSlotTracker) const {
480  os << "bb." << getNumber();
481  bool hasAttributes = false;
482 
483  if (printNameFlags & PrintNameIr) {
484  if (const auto *bb = getBasicBlock()) {
485  if (bb->hasName()) {
486  os << '.' << bb->getName();
487  } else {
488  hasAttributes = true;
489  os << " (";
490 
491  int slot = -1;
492 
493  if (moduleSlotTracker) {
494  slot = moduleSlotTracker->getLocalSlot(bb);
495  } else if (bb->getParent()) {
496  ModuleSlotTracker tmpTracker(bb->getModule(), false);
497  tmpTracker.incorporateFunction(*bb->getParent());
498  slot = tmpTracker.getLocalSlot(bb);
499  }
500 
501  if (slot == -1)
502  os << "<ir-block badref>";
503  else
504  os << (Twine("%ir-block.") + Twine(slot)).str();
505  }
506  }
507  }
508 
509  if (printNameFlags & PrintNameAttributes) {
510  if (hasAddressTaken()) {
511  os << (hasAttributes ? ", " : " (");
512  os << "address-taken";
513  hasAttributes = true;
514  }
515  if (isEHPad()) {
516  os << (hasAttributes ? ", " : " (");
517  os << "landing-pad";
518  hasAttributes = true;
519  }
520  if (isEHFuncletEntry()) {
521  os << (hasAttributes ? ", " : " (");
522  os << "ehfunclet-entry";
523  hasAttributes = true;
524  }
525  if (getAlignment() != Align(1)) {
526  os << (hasAttributes ? ", " : " (");
527  os << "align " << getAlignment().value();
528  hasAttributes = true;
529  }
530  if (getSectionID() != MBBSectionID(0)) {
531  os << (hasAttributes ? ", " : " (");
532  os << "bbsections ";
533  switch (getSectionID().Type) {
534  case MBBSectionID::SectionType::Exception:
535  os << "Exception";
536  break;
538  os << "Cold";
539  break;
540  default:
541  os << getSectionID().Number;
542  }
543  hasAttributes = true;
544  }
545  }
546 
547  if (hasAttributes)
548  os << ')';
549 }
550 
552  bool /*PrintType*/) const {
553  OS << '%';
554  printName(OS, 0);
555 }
556 
558  LiveInVector::iterator I = find_if(
559  LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
560  if (I == LiveIns.end())
561  return;
562 
563  I->LaneMask &= ~LaneMask;
564  if (I->LaneMask.none())
565  LiveIns.erase(I);
566 }
567 
570  // Get non-const version of iterator.
571  LiveInVector::iterator LI = LiveIns.begin() + (I - LiveIns.begin());
572  return LiveIns.erase(LI);
573 }
574 
577  LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
578  return I != livein_end() && (I->LaneMask & LaneMask).any();
579 }
580 
582  llvm::sort(LiveIns,
583  [](const RegisterMaskPair &LI0, const RegisterMaskPair &LI1) {
584  return LI0.PhysReg < LI1.PhysReg;
585  });
586  // Liveins are sorted by physreg now we can merge their lanemasks.
587  LiveInVector::const_iterator I = LiveIns.begin();
588  LiveInVector::const_iterator J;
589  LiveInVector::iterator Out = LiveIns.begin();
590  for (; I != LiveIns.end(); ++Out, I = J) {
591  MCRegister PhysReg = I->PhysReg;
592  LaneBitmask LaneMask = I->LaneMask;
593  for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
594  LaneMask |= J->LaneMask;
595  Out->PhysReg = PhysReg;
596  Out->LaneMask = LaneMask;
597  }
598  LiveIns.erase(Out, LiveIns.end());
599 }
600 
601 Register
603  assert(getParent() && "MBB must be inserted in function");
604  assert(Register::isPhysicalRegister(PhysReg) && "Expected physreg");
605  assert(RC && "Register class is required");
606  assert((isEHPad() || this == &getParent()->front()) &&
607  "Only the entry block and landing pads can have physreg live ins");
608 
609  bool LiveIn = isLiveIn(PhysReg);
613 
614  // Look for an existing copy.
615  if (LiveIn)
616  for (;I != E && I->isCopy(); ++I)
617  if (I->getOperand(1).getReg() == PhysReg) {
618  Register VirtReg = I->getOperand(0).getReg();
619  if (!MRI.constrainRegClass(VirtReg, RC))
620  llvm_unreachable("Incompatible live-in register class.");
621  return VirtReg;
622  }
623 
624  // No luck, create a virtual register.
625  Register VirtReg = MRI.createVirtualRegister(RC);
626  BuildMI(*this, I, DebugLoc(), TII.get(TargetOpcode::COPY), VirtReg)
627  .addReg(PhysReg, RegState::Kill);
628  if (!LiveIn)
629  addLiveIn(PhysReg);
630  return VirtReg;
631 }
632 
634  getParent()->splice(NewAfter->getIterator(), getIterator());
635 }
636 
638  getParent()->splice(++NewBefore->getIterator(), getIterator());
639 }
640 
642  MachineBasicBlock *PreviousLayoutSuccessor) {
643  LLVM_DEBUG(dbgs() << "Updating terminators on " << printMBBReference(*this)
644  << "\n");
645 
647  // A block with no successors has no concerns with fall-through edges.
648  if (this->succ_empty())
649  return;
650 
651  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
654  bool B = TII->analyzeBranch(*this, TBB, FBB, Cond);
655  (void) B;
656  assert(!B && "UpdateTerminators requires analyzable predecessors!");
657  if (Cond.empty()) {
658  if (TBB) {
659  // The block has an unconditional branch. If its successor is now its
660  // layout successor, delete the branch.
661  if (isLayoutSuccessor(TBB))
662  TII->removeBranch(*this);
663  } else {
664  // The block has an unconditional fallthrough, or the end of the block is
665  // unreachable.
666 
667  // Unfortunately, whether the end of the block is unreachable is not
668  // immediately obvious; we must fall back to checking the successor list,
669  // and assuming that if the passed in block is in the succesor list and
670  // not an EHPad, it must be the intended target.
671  if (!PreviousLayoutSuccessor || !isSuccessor(PreviousLayoutSuccessor) ||
672  PreviousLayoutSuccessor->isEHPad())
673  return;
674 
675  // If the unconditional successor block is not the current layout
676  // successor, insert a branch to jump to it.
677  if (!isLayoutSuccessor(PreviousLayoutSuccessor))
678  TII->insertBranch(*this, PreviousLayoutSuccessor, nullptr, Cond, DL);
679  }
680  return;
681  }
682 
683  if (FBB) {
684  // The block has a non-fallthrough conditional branch. If one of its
685  // successors is its layout successor, rewrite it to a fallthrough
686  // conditional branch.
687  if (isLayoutSuccessor(TBB)) {
689  return;
690  TII->removeBranch(*this);
691  TII->insertBranch(*this, FBB, nullptr, Cond, DL);
692  } else if (isLayoutSuccessor(FBB)) {
693  TII->removeBranch(*this);
694  TII->insertBranch(*this, TBB, nullptr, Cond, DL);
695  }
696  return;
697  }
698 
699  // We now know we're going to fallthrough to PreviousLayoutSuccessor.
700  assert(PreviousLayoutSuccessor);
701  assert(!PreviousLayoutSuccessor->isEHPad());
702  assert(isSuccessor(PreviousLayoutSuccessor));
703 
704  if (PreviousLayoutSuccessor == TBB) {
705  // We had a fallthrough to the same basic block as the conditional jump
706  // targets. Remove the conditional jump, leaving an unconditional
707  // fallthrough or an unconditional jump.
708  TII->removeBranch(*this);
709  if (!isLayoutSuccessor(TBB)) {
710  Cond.clear();
711  TII->insertBranch(*this, TBB, nullptr, Cond, DL);
712  }
713  return;
714  }
715 
716  // The block has a fallthrough conditional branch.
717  if (isLayoutSuccessor(TBB)) {
719  // We can't reverse the condition, add an unconditional branch.
720  Cond.clear();
721  TII->insertBranch(*this, PreviousLayoutSuccessor, nullptr, Cond, DL);
722  return;
723  }
724  TII->removeBranch(*this);
725  TII->insertBranch(*this, PreviousLayoutSuccessor, nullptr, Cond, DL);
726  } else if (!isLayoutSuccessor(PreviousLayoutSuccessor)) {
727  TII->removeBranch(*this);
728  TII->insertBranch(*this, TBB, PreviousLayoutSuccessor, Cond, DL);
729  }
730 }
731 
733 #ifndef NDEBUG
734  int64_t Sum = 0;
735  for (auto Prob : Probs)
736  Sum += Prob.getNumerator();
737  // Due to precision issue, we assume that the sum of probabilities is one if
738  // the difference between the sum of their numerators and the denominator is
739  // no greater than the number of successors.
741  Probs.size() &&
742  "The sum of successors's probabilities exceeds one.");
743 #endif // NDEBUG
744 }
745 
747  BranchProbability Prob) {
748  // Probability list is either empty (if successor list isn't empty, this means
749  // disabled optimization) or has the same size as successor list.
750  if (!(Probs.empty() && !Successors.empty()))
751  Probs.push_back(Prob);
752  Successors.push_back(Succ);
753  Succ->addPredecessor(this);
754 }
755 
757  // We need to make sure probability list is either empty or has the same size
758  // of successor list. When this function is called, we can safely delete all
759  // probability in the list.
760  Probs.clear();
761  Successors.push_back(Succ);
762  Succ->addPredecessor(this);
763 }
764 
766  MachineBasicBlock *New,
767  bool NormalizeSuccProbs) {
768  succ_iterator OldI = llvm::find(successors(), Old);
769  assert(OldI != succ_end() && "Old is not a successor of this block!");
771  "New is already a successor of this block!");
772 
773  // Add a new successor with equal probability as the original one. Note
774  // that we directly copy the probability using the iterator rather than
775  // getting a potentially synthetic probability computed when unknown. This
776  // preserves the probabilities as-is and then we can renormalize them and
777  // query them effectively afterward.
778  addSuccessor(New, Probs.empty() ? BranchProbability::getUnknown()
779  : *getProbabilityIterator(OldI));
780  if (NormalizeSuccProbs)
782 }
783 
785  bool NormalizeSuccProbs) {
786  succ_iterator I = find(Successors, Succ);
787  removeSuccessor(I, NormalizeSuccProbs);
788 }
789 
792  assert(I != Successors.end() && "Not a current successor!");
793 
794  // If probability list is empty it means we don't use it (disabled
795  // optimization).
796  if (!Probs.empty()) {
797  probability_iterator WI = getProbabilityIterator(I);
798  Probs.erase(WI);
799  if (NormalizeSuccProbs)
801  }
802 
803  (*I)->removePredecessor(this);
804  return Successors.erase(I);
805 }
806 
808  MachineBasicBlock *New) {
809  if (Old == New)
810  return;
811 
813  succ_iterator NewI = E;
814  succ_iterator OldI = E;
815  for (succ_iterator I = succ_begin(); I != E; ++I) {
816  if (*I == Old) {
817  OldI = I;
818  if (NewI != E)
819  break;
820  }
821  if (*I == New) {
822  NewI = I;
823  if (OldI != E)
824  break;
825  }
826  }
827  assert(OldI != E && "Old is not a successor of this block");
828 
829  // If New isn't already a successor, let it take Old's place.
830  if (NewI == E) {
831  Old->removePredecessor(this);
832  New->addPredecessor(this);
833  *OldI = New;
834  return;
835  }
836 
837  // New is already a successor.
838  // Update its probability instead of adding a duplicate edge.
839  if (!Probs.empty()) {
840  auto ProbIter = getProbabilityIterator(NewI);
841  if (!ProbIter->isUnknown())
842  *ProbIter += *getProbabilityIterator(OldI);
843  }
844  removeSuccessor(OldI);
845 }
846 
848  succ_iterator I) {
849  if (!Orig->Probs.empty())
850  addSuccessor(*I, Orig->getSuccProbability(I));
851  else
853 }
854 
855 void MachineBasicBlock::addPredecessor(MachineBasicBlock *Pred) {
856  Predecessors.push_back(Pred);
857 }
858 
859 void MachineBasicBlock::removePredecessor(MachineBasicBlock *Pred) {
860  pred_iterator I = find(Predecessors, Pred);
861  assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");
862  Predecessors.erase(I);
863 }
864 
866  if (this == FromMBB)
867  return;
868 
869  while (!FromMBB->succ_empty()) {
870  MachineBasicBlock *Succ = *FromMBB->succ_begin();
871 
872  // If probability list is empty it means we don't use it (disabled
873  // optimization).
874  if (!FromMBB->Probs.empty()) {
875  auto Prob = *FromMBB->Probs.begin();
876  addSuccessor(Succ, Prob);
877  } else
879 
880  FromMBB->removeSuccessor(Succ);
881  }
882 }
883 
884 void
886  if (this == FromMBB)
887  return;
888 
889  while (!FromMBB->succ_empty()) {
890  MachineBasicBlock *Succ = *FromMBB->succ_begin();
891  if (!FromMBB->Probs.empty()) {
892  auto Prob = *FromMBB->Probs.begin();
893  addSuccessor(Succ, Prob);
894  } else
896  FromMBB->removeSuccessor(Succ);
897 
898  // Fix up any PHI nodes in the successor.
899  Succ->replacePhiUsesWith(FromMBB, this);
900  }
902 }
903 
904 /// A block emptied (i.e., with all instructions moved out of it) won't be
905 /// sampled at run time. In such cases, AutoFDO will be informed of zero samples
906 /// collected for the block. This is not accurate and could lead to misleading
907 /// weights assigned for the block. A way to mitigate that is to treat such
908 /// block as having unknown counts in the AutoFDO profile loader and allow the
909 /// counts inference tool a chance to calculate a relatively reasonable weight
910 /// for it. This can be done by moving all pseudo probes in the emptied block
911 /// i.e, /c this, to before /c ToMBB and tag them dangling. Note that this is
912 /// not needed for dead blocks which really have a zero weight. It's per
913 /// transforms to decide whether to call this function or not.
916  for (MachineInstr &MI : instrs()) {
917  if (MI.isPseudoProbe()) {
918  MI.addPseudoProbeAttribute(PseudoProbeAttributes::Dangling);
919  ToBeMoved.push_back(&MI);
920  }
921  }
922 
924  for (MachineInstr *MI : ToBeMoved) {
925  MI->removeFromParent();
926  ToMBB->insert(I, MI);
927  }
928 }
929 
931  return is_contained(predecessors(), MBB);
932 }
933 
935  return is_contained(successors(), MBB);
936 }
937 
940  return std::next(I) == MachineFunction::const_iterator(MBB);
941 }
942 
944  MachineFunction::iterator Fallthrough = getIterator();
945  ++Fallthrough;
946  // If FallthroughBlock is off the end of the function, it can't fall through.
947  if (Fallthrough == getParent()->end())
948  return nullptr;
949 
950  // If FallthroughBlock isn't a successor, no fallthrough is possible.
951  if (!isSuccessor(&*Fallthrough))
952  return nullptr;
953 
954  // Analyze the branches, if any, at the end of the block.
955  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
958  if (TII->analyzeBranch(*this, TBB, FBB, Cond)) {
959  // If we couldn't analyze the branch, examine the last instruction.
960  // If the block doesn't end in a known control barrier, assume fallthrough
961  // is possible. The isPredicated check is needed because this code can be
962  // called during IfConversion, where an instruction which is normally a
963  // Barrier is predicated and thus no longer an actual control barrier.
964  return (empty() || !back().isBarrier() || TII->isPredicated(back()))
965  ? &*Fallthrough
966  : nullptr;
967  }
968 
969  // If there is no branch, control always falls through.
970  if (!TBB) return &*Fallthrough;
971 
972  // If there is some explicit branch to the fallthrough block, it can obviously
973  // reach, even though the branch should get folded to fall through implicitly.
974  if (MachineFunction::iterator(TBB) == Fallthrough ||
975  MachineFunction::iterator(FBB) == Fallthrough)
976  return &*Fallthrough;
977 
978  // If it's an unconditional branch to some block not the fall through, it
979  // doesn't fall through.
980  if (Cond.empty()) return nullptr;
981 
982  // Otherwise, if it is conditional and has no explicit false block, it falls
983  // through.
984  return (FBB == nullptr) ? &*Fallthrough : nullptr;
985 }
986 
988  return getFallThrough() != nullptr;
989 }
990 
992  bool UpdateLiveIns,
993  LiveIntervals *LIS) {
994  MachineBasicBlock::iterator SplitPoint(&MI);
995  ++SplitPoint;
996 
997  if (SplitPoint == end()) {
998  // Don't bother with a new block.
999  return this;
1000  }
1001 
1002  MachineFunction *MF = getParent();
1003 
1004  LivePhysRegs LiveRegs;
1005  if (UpdateLiveIns) {
1006  // Make sure we add any physregs we define in the block as liveins to the
1007  // new block.
1009  LiveRegs.init(*MF->getSubtarget().getRegisterInfo());
1010  LiveRegs.addLiveOuts(*this);
1011  for (auto I = rbegin(), E = Prev.getReverse(); I != E; ++I)
1012  LiveRegs.stepBackward(*I);
1013  }
1014 
1016 
1017  MF->insert(++MachineFunction::iterator(this), SplitBB);
1018  SplitBB->splice(SplitBB->begin(), this, SplitPoint, end());
1019 
1020  SplitBB->transferSuccessorsAndUpdatePHIs(this);
1021  addSuccessor(SplitBB);
1022 
1023  if (UpdateLiveIns)
1024  addLiveIns(*SplitBB, LiveRegs);
1025 
1026  if (LIS)
1027  LIS->insertMBBInMaps(SplitBB);
1028 
1029  return SplitBB;
1030 }
1031 
1033  MachineBasicBlock *Succ, Pass &P,
1034  std::vector<SparseBitVector<>> *LiveInSets) {
1035  if (!canSplitCriticalEdge(Succ))
1036  return nullptr;
1037 
1038  MachineFunction *MF = getParent();
1039  MachineBasicBlock *PrevFallthrough = getNextNode();
1040  DebugLoc DL; // FIXME: this is nowhere
1041 
1043  MF->insert(std::next(MachineFunction::iterator(this)), NMBB);
1044  LLVM_DEBUG(dbgs() << "Splitting critical edge: " << printMBBReference(*this)
1045  << " -- " << printMBBReference(*NMBB) << " -- "
1046  << printMBBReference(*Succ) << '\n');
1047 
1048  LiveIntervals *LIS = P.getAnalysisIfAvailable<LiveIntervals>();
1049  SlotIndexes *Indexes = P.getAnalysisIfAvailable<SlotIndexes>();
1050  if (LIS)
1051  LIS->insertMBBInMaps(NMBB);
1052  else if (Indexes)
1053  Indexes->insertMBBInMaps(NMBB);
1054 
1055  // On some targets like Mips, branches may kill virtual registers. Make sure
1056  // that LiveVariables is properly updated after updateTerminator replaces the
1057  // terminators.
1058  LiveVariables *LV = P.getAnalysisIfAvailable<LiveVariables>();
1059 
1060  // Collect a list of virtual registers killed by the terminators.
1061  SmallVector<Register, 4> KilledRegs;
1062  if (LV)
1064  I != E; ++I) {
1065  MachineInstr *MI = &*I;
1066  for (MachineInstr::mop_iterator OI = MI->operands_begin(),
1067  OE = MI->operands_end(); OI != OE; ++OI) {
1068  if (!OI->isReg() || OI->getReg() == 0 ||
1069  !OI->isUse() || !OI->isKill() || OI->isUndef())
1070  continue;
1071  Register Reg = OI->getReg();
1073  LV->getVarInfo(Reg).removeKill(*MI)) {
1074  KilledRegs.push_back(Reg);
1075  LLVM_DEBUG(dbgs() << "Removing terminator kill: " << *MI);
1076  OI->setIsKill(false);
1077  }
1078  }
1079  }
1080 
1081  SmallVector<Register, 4> UsedRegs;
1082  if (LIS) {
1084  I != E; ++I) {
1085  MachineInstr *MI = &*I;
1086 
1087  for (MachineInstr::mop_iterator OI = MI->operands_begin(),
1088  OE = MI->operands_end(); OI != OE; ++OI) {
1089  if (!OI->isReg() || OI->getReg() == 0)
1090  continue;
1091 
1092  Register Reg = OI->getReg();
1093  if (!is_contained(UsedRegs, Reg))
1094  UsedRegs.push_back(Reg);
1095  }
1096  }
1097  }
1098 
1099  ReplaceUsesOfBlockWith(Succ, NMBB);
1100 
1101  // If updateTerminator() removes instructions, we need to remove them from
1102  // SlotIndexes.
1103  SmallVector<MachineInstr*, 4> Terminators;
1104  if (Indexes) {
1106  I != E; ++I)
1107  Terminators.push_back(&*I);
1108  }
1109 
1110  // Since we replaced all uses of Succ with NMBB, that should also be treated
1111  // as the fallthrough successor
1112  if (Succ == PrevFallthrough)
1113  PrevFallthrough = NMBB;
1114  updateTerminator(PrevFallthrough);
1115 
1116  if (Indexes) {
1117  SmallVector<MachineInstr*, 4> NewTerminators;
1119  I != E; ++I)
1120  NewTerminators.push_back(&*I);
1121 
1122  for (MachineInstr *Terminator : Terminators) {
1123  if (!is_contained(NewTerminators, Terminator))
1124  Indexes->removeMachineInstrFromMaps(*Terminator);
1125  }
1126  }
1127 
1128  // Insert unconditional "jump Succ" instruction in NMBB if necessary.
1129  NMBB->addSuccessor(Succ);
1130  if (!NMBB->isLayoutSuccessor(Succ)) {
1133  TII->insertBranch(*NMBB, Succ, nullptr, Cond, DL);
1134 
1135  if (Indexes) {
1136  for (MachineInstr &MI : NMBB->instrs()) {
1137  // Some instructions may have been moved to NMBB by updateTerminator(),
1138  // so we first remove any instruction that already has an index.
1139  if (Indexes->hasIndex(MI))
1140  Indexes->removeMachineInstrFromMaps(MI);
1141  Indexes->insertMachineInstrInMaps(MI);
1142  }
1143  }
1144  }
1145 
1146  // Fix PHI nodes in Succ so they refer to NMBB instead of this.
1147  Succ->replacePhiUsesWith(this, NMBB);
1148 
1149  // Inherit live-ins from the successor
1150  for (const auto &LI : Succ->liveins())
1151  NMBB->addLiveIn(LI);
1152 
1153  // Update LiveVariables.
1155  if (LV) {
1156  // Restore kills of virtual registers that were killed by the terminators.
1157  while (!KilledRegs.empty()) {
1158  Register Reg = KilledRegs.pop_back_val();
1159  for (instr_iterator I = instr_end(), E = instr_begin(); I != E;) {
1160  if (!(--I)->addRegisterKilled(Reg, TRI, /* AddIfNotFound= */ false))
1161  continue;
1163  LV->getVarInfo(Reg).Kills.push_back(&*I);
1164  LLVM_DEBUG(dbgs() << "Restored terminator kill: " << *I);
1165  break;
1166  }
1167  }
1168  // Update relevant live-through information.
1169  if (LiveInSets != nullptr)
1170  LV->addNewBlock(NMBB, this, Succ, *LiveInSets);
1171  else
1172  LV->addNewBlock(NMBB, this, Succ);
1173  }
1174 
1175  if (LIS) {
1176  // After splitting the edge and updating SlotIndexes, live intervals may be
1177  // in one of two situations, depending on whether this block was the last in
1178  // the function. If the original block was the last in the function, all
1179  // live intervals will end prior to the beginning of the new split block. If
1180  // the original block was not at the end of the function, all live intervals
1181  // will extend to the end of the new split block.
1182 
1183  bool isLastMBB =
1184  std::next(MachineFunction::iterator(NMBB)) == getParent()->end();
1185 
1186  SlotIndex StartIndex = Indexes->getMBBEndIdx(this);
1187  SlotIndex PrevIndex = StartIndex.getPrevSlot();
1188  SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
1189 
1190  // Find the registers used from NMBB in PHIs in Succ.
1191  SmallSet<Register, 8> PHISrcRegs;
1193  I = Succ->instr_begin(), E = Succ->instr_end();
1194  I != E && I->isPHI(); ++I) {
1195  for (unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {
1196  if (I->getOperand(ni+1).getMBB() == NMBB) {
1197  MachineOperand &MO = I->getOperand(ni);
1198  Register Reg = MO.getReg();
1199  PHISrcRegs.insert(Reg);
1200  if (MO.isUndef())
1201  continue;
1202 
1203  LiveInterval &LI = LIS->getInterval(Reg);
1204  VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
1205  assert(VNI &&
1206  "PHI sources should be live out of their predecessors.");
1207  LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
1208  }
1209  }
1210  }
1211 
1213  for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
1215  if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg))
1216  continue;
1217 
1218  LiveInterval &LI = LIS->getInterval(Reg);
1219  if (!LI.liveAt(PrevIndex))
1220  continue;
1221 
1222  bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ));
1223  if (isLiveOut && isLastMBB) {
1224  VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
1225  assert(VNI && "LiveInterval should have VNInfo where it is live.");
1226  LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
1227  } else if (!isLiveOut && !isLastMBB) {
1228  LI.removeSegment(StartIndex, EndIndex);
1229  }
1230  }
1231 
1232  // Update all intervals for registers whose uses may have been modified by
1233  // updateTerminator().
1234  LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs);
1235  }
1236 
1237  if (MachineDominatorTree *MDT =
1238  P.getAnalysisIfAvailable<MachineDominatorTree>())
1239  MDT->recordSplitCriticalEdge(this, Succ, NMBB);
1240 
1241  if (MachineLoopInfo *MLI = P.getAnalysisIfAvailable<MachineLoopInfo>())
1242  if (MachineLoop *TIL = MLI->getLoopFor(this)) {
1243  // If one or the other blocks were not in a loop, the new block is not
1244  // either, and thus LI doesn't need to be updated.
1245  if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
1246  if (TIL == DestLoop) {
1247  // Both in the same loop, the NMBB joins loop.
1248  DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1249  } else if (TIL->contains(DestLoop)) {
1250  // Edge from an outer loop to an inner loop. Add to the outer loop.
1251  TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
1252  } else if (DestLoop->contains(TIL)) {
1253  // Edge from an inner loop to an outer loop. Add to the outer loop.
1254  DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1255  } else {
1256  // Edge from two loops with no containment relation. Because these
1257  // are natural loops, we know that the destination block must be the
1258  // header of its loop (adding a branch into a loop elsewhere would
1259  // create an irreducible loop).
1260  assert(DestLoop->getHeader() == Succ &&
1261  "Should not create irreducible loops!");
1262  if (MachineLoop *P = DestLoop->getParentLoop())
1263  P->addBasicBlockToLoop(NMBB, MLI->getBase());
1264  }
1265  }
1266  }
1267 
1268  return NMBB;
1269 }
1270 
1272  const MachineBasicBlock *Succ) const {
1273  // Splitting the critical edge to a landing pad block is non-trivial. Don't do
1274  // it in this generic function.
1275  if (Succ->isEHPad())
1276  return false;
1277 
1278  // Splitting the critical edge to a callbr's indirect block isn't advised.
1279  // Don't do it in this generic function.
1280  if (Succ->isInlineAsmBrIndirectTarget())
1281  return false;
1282 
1283  const MachineFunction *MF = getParent();
1284  // Performance might be harmed on HW that implements branching using exec mask
1285  // where both sides of the branches are always executed.
1286  if (MF->getTarget().requiresStructuredCFG())
1287  return false;
1288 
1289  // We may need to update this's terminator, but we can't do that if
1290  // analyzeBranch fails. If this uses a jump table, we won't touch it.
1291  const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
1292  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1294  // AnalyzeBanch should modify this, since we did not allow modification.
1295  if (TII->analyzeBranch(*const_cast<MachineBasicBlock *>(this), TBB, FBB, Cond,
1296  /*AllowModify*/ false))
1297  return false;
1298 
1299  // Avoid bugpoint weirdness: A block may end with a conditional branch but
1300  // jumps to the same MBB is either case. We have duplicate CFG edges in that
1301  // case that we can't handle. Since this never happens in properly optimized
1302  // code, just skip those edges.
1303  if (TBB && TBB == FBB) {
1304  LLVM_DEBUG(dbgs() << "Won't split critical edge after degenerate "
1305  << printMBBReference(*this) << '\n');
1306  return false;
1307  }
1308  return true;
1309 }
1310 
1311 /// Prepare MI to be removed from its bundle. This fixes bundle flags on MI's
1312 /// neighboring instructions so the bundle won't be broken by removing MI.
1314  // Removing the first instruction in a bundle.
1315  if (MI->isBundledWithSucc() && !MI->isBundledWithPred())
1316  MI->unbundleFromSucc();
1317  // Removing the last instruction in a bundle.
1318  if (MI->isBundledWithPred() && !MI->isBundledWithSucc())
1319  MI->unbundleFromPred();
1320  // If MI is not bundled, or if it is internal to a bundle, the neighbor flags
1321  // are already fine.
1322 }
1323 
1326  unbundleSingleMI(&*I);
1327  return Insts.erase(I);
1328 }
1329 
1332  MI->clearFlag(MachineInstr::BundledPred);
1333  MI->clearFlag(MachineInstr::BundledSucc);
1334  return Insts.remove(MI);
1335 }
1336 
1339  assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&
1340  "Cannot insert instruction with bundle flags");
1341  // Set the bundle flags when inserting inside a bundle.
1342  if (I != instr_end() && I->isBundledWithPred()) {
1343  MI->setFlag(MachineInstr::BundledPred);
1344  MI->setFlag(MachineInstr::BundledSucc);
1345  }
1346  return Insts.insert(I, MI);
1347 }
1348 
1349 /// This method unlinks 'this' from the containing function, and returns it, but
1350 /// does not delete it.
1352  assert(getParent() && "Not embedded in a function!");
1353  getParent()->remove(this);
1354  return this;
1355 }
1356 
1357 /// This method unlinks 'this' from the containing function, and deletes it.
1359  assert(getParent() && "Not embedded in a function!");
1360  getParent()->erase(this);
1361 }
1362 
1363 /// Given a machine basic block that branched to 'Old', change the code and CFG
1364 /// so that it branches to 'New' instead.
1366  MachineBasicBlock *New) {
1367  assert(Old != New && "Cannot replace self with self!");
1368 
1370  while (I != instr_begin()) {
1371  --I;
1372  if (!I->isTerminator()) break;
1373 
1374  // Scan the operands of this machine instruction, replacing any uses of Old
1375  // with New.
1376  for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
1377  if (I->getOperand(i).isMBB() &&
1378  I->getOperand(i).getMBB() == Old)
1379  I->getOperand(i).setMBB(New);
1380  }
1381 
1382  // Update the successor information.
1383  replaceSuccessor(Old, New);
1384 }
1385 
1387  MachineBasicBlock *New) {
1388  for (MachineInstr &MI : phis())
1389  for (unsigned i = 2, e = MI.getNumOperands() + 1; i != e; i += 2) {
1390  MachineOperand &MO = MI.getOperand(i);
1391  if (MO.getMBB() == Old)
1392  MO.setMBB(New);
1393  }
1394 }
1395 
1396 /// Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE
1397 /// instructions. Return UnknownLoc if there is none.
1398 DebugLoc
1400  // Skip debug declarations, we don't want a DebugLoc from them.
1402  if (MBBI != instr_end())
1403  return MBBI->getDebugLoc();
1404  return {};
1405 }
1406 
1408  // Skip debug declarations, we don't want a DebugLoc from them.
1410  if (!MBBI->isDebugInstr())
1411  return MBBI->getDebugLoc();
1412  return {};
1413 }
1414 
1415 /// Find the previous valid DebugLoc preceding MBBI, skipping and DBG_VALUE
1416 /// instructions. Return UnknownLoc if there is none.
1418  if (MBBI == instr_begin()) return {};
1419  // Skip debug instructions, we don't want a DebugLoc from them.
1421  if (!MBBI->isDebugInstr()) return MBBI->getDebugLoc();
1422  return {};
1423 }
1424 
1426  if (MBBI == instr_rend())
1427  return {};
1428  // Skip debug declarations, we don't want a DebugLoc from them.
1430  if (MBBI != instr_rend())
1431  return MBBI->getDebugLoc();
1432  return {};
1433 }
1434 
1435 /// Find and return the merged DebugLoc of the branch instructions of the block.
1436 /// Return UnknownLoc if there is none.
1437 DebugLoc
1439  DebugLoc DL;
1440  auto TI = getFirstTerminator();
1441  while (TI != end() && !TI->isBranch())
1442  ++TI;
1443 
1444  if (TI != end()) {
1445  DL = TI->getDebugLoc();
1446  for (++TI ; TI != end() ; ++TI)
1447  if (TI->isBranch())
1448  DL = DILocation::getMergedLocation(DL, TI->getDebugLoc());
1449  }
1450  return DL;
1451 }
1452 
1453 /// Return probability of the edge from this block to MBB.
1455 MachineBasicBlock::getSuccProbability(const_succ_iterator Succ) const {
1456  if (Probs.empty())
1457  return BranchProbability(1, succ_size());
1458 
1459  const auto &Prob = *getProbabilityIterator(Succ);
1460  if (Prob.isUnknown()) {
1461  // For unknown probabilities, collect the sum of all known ones, and evenly
1462  // ditribute the complemental of the sum to each unknown probability.
1463  unsigned KnownProbNum = 0;
1464  auto Sum = BranchProbability::getZero();
1465  for (auto &P : Probs) {
1466  if (!P.isUnknown()) {
1467  Sum += P;
1468  KnownProbNum++;
1469  }
1470  }
1471  return Sum.getCompl() / (Probs.size() - KnownProbNum);
1472  } else
1473  return Prob;
1474 }
1475 
1476 /// Set successor probability of a given iterator.
1478  BranchProbability Prob) {
1479  assert(!Prob.isUnknown());
1480  if (Probs.empty())
1481  return;
1482  *getProbabilityIterator(I) = Prob;
1483 }
1484 
1485 /// Return probability iterator corresonding to the I successor iterator
1486 MachineBasicBlock::const_probability_iterator
1487 MachineBasicBlock::getProbabilityIterator(
1489  assert(Probs.size() == Successors.size() && "Async probability list!");
1490  const size_t index = std::distance(Successors.begin(), I);
1491  assert(index < Probs.size() && "Not a current successor!");
1492  return Probs.begin() + index;
1493 }
1494 
1495 /// Return probability iterator corresonding to the I successor iterator.
1496 MachineBasicBlock::probability_iterator
1497 MachineBasicBlock::getProbabilityIterator(MachineBasicBlock::succ_iterator I) {
1498  assert(Probs.size() == Successors.size() && "Async probability list!");
1499  const size_t index = std::distance(Successors.begin(), I);
1500  assert(index < Probs.size() && "Not a current successor!");
1501  return Probs.begin() + index;
1502 }
1503 
1504 /// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed
1505 /// as of just before "MI".
1506 ///
1507 /// Search is localised to a neighborhood of
1508 /// Neighborhood instructions before (searching for defs or kills) and N
1509 /// instructions after (searching just for defs) MI.
1512  MCRegister Reg, const_iterator Before,
1513  unsigned Neighborhood) const {
1514  unsigned N = Neighborhood;
1515 
1516  // Try searching forwards from Before, looking for reads or defs.
1517  const_iterator I(Before);
1518  for (; I != end() && N > 0; ++I) {
1519  if (I->isDebugOrPseudoInstr())
1520  continue;
1521 
1522  --N;
1523 
1525 
1526  // Register is live when we read it here.
1527  if (Info.Read)
1528  return LQR_Live;
1529  // Register is dead if we can fully overwrite or clobber it here.
1530  if (Info.FullyDefined || Info.Clobbered)
1531  return LQR_Dead;
1532  }
1533 
1534  // If we reached the end, it is safe to clobber Reg at the end of a block of
1535  // no successor has it live in.
1536  if (I == end()) {
1537  for (MachineBasicBlock *S : successors()) {
1538  for (const MachineBasicBlock::RegisterMaskPair &LI : S->liveins()) {
1539  if (TRI->regsOverlap(LI.PhysReg, Reg))
1540  return LQR_Live;
1541  }
1542  }
1543 
1544  return LQR_Dead;
1545  }
1546 
1547 
1548  N = Neighborhood;
1549 
1550  // Start by searching backwards from Before, looking for kills, reads or defs.
1551  I = const_iterator(Before);
1552  // If this is the first insn in the block, don't search backwards.
1553  if (I != begin()) {
1554  do {
1555  --I;
1556 
1557  if (I->isDebugOrPseudoInstr())
1558  continue;
1559 
1560  --N;
1561 
1563 
1564  // Defs happen after uses so they take precedence if both are present.
1565 
1566  // Register is dead after a dead def of the full register.
1567  if (Info.DeadDef)
1568  return LQR_Dead;
1569  // Register is (at least partially) live after a def.
1570  if (Info.Defined) {
1571  if (!Info.PartialDeadDef)
1572  return LQR_Live;
1573  // As soon as we saw a partial definition (dead or not),
1574  // we cannot tell if the value is partial live without
1575  // tracking the lanemasks. We are not going to do this,
1576  // so fall back on the remaining of the analysis.
1577  break;
1578  }
1579  // Register is dead after a full kill or clobber and no def.
1580  if (Info.Killed || Info.Clobbered)
1581  return LQR_Dead;
1582  // Register must be live if we read it.
1583  if (Info.Read)
1584  return LQR_Live;
1585 
1586  } while (I != begin() && N > 0);
1587  }
1588 
1589  // If all the instructions before this in the block are debug instructions,
1590  // skip over them.
1591  while (I != begin() && std::prev(I)->isDebugOrPseudoInstr())
1592  --I;
1593 
1594  // Did we get to the start of the block?
1595  if (I == begin()) {
1596  // If so, the register's state is definitely defined by the live-in state.
1597  for (const MachineBasicBlock::RegisterMaskPair &LI : liveins())
1598  if (TRI->regsOverlap(LI.PhysReg, Reg))
1599  return LQR_Live;
1600 
1601  return LQR_Dead;
1602  }
1603 
1604  // At this point we have no idea of the liveness of the register.
1605  return LQR_Unknown;
1606 }
1607 
1608 const uint32_t *
1610  // EH funclet entry does not preserve any registers.
1611  return isEHFuncletEntry() ? TRI->getNoPreservedMask() : nullptr;
1612 }
1613 
1614 const uint32_t *
1616  // If we see a return block with successors, this must be a funclet return,
1617  // which does not preserve any registers. If there are no successors, we don't
1618  // care what kind of return it is, putting a mask after it is a no-op.
1619  return isReturnBlock() && !succ_empty() ? TRI->getNoPreservedMask() : nullptr;
1620 }
1621 
1623  LiveIns.clear();
1624 }
1625 
1627  assert(getParent()->getProperties().hasProperty(
1629  "Liveness information is accurate");
1630  return LiveIns.begin();
1631 }
1632 
1634  const MachineFunction &MF = *getParent();
1637  "Liveness information is accurate");
1638 
1639  const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
1640  MCPhysReg ExceptionPointer = 0, ExceptionSelector = 0;
1641  if (MF.getFunction().hasPersonalityFn()) {
1642  auto PersonalityFn = MF.getFunction().getPersonalityFn();
1643  ExceptionPointer = TLI.getExceptionPointerRegister(PersonalityFn);
1644  ExceptionSelector = TLI.getExceptionSelectorRegister(PersonalityFn);
1645  }
1646 
1647  return liveout_iterator(*this, ExceptionPointer, ExceptionSelector, false);
1648 }
1649 
1651 const MBBSectionID
1652  MBBSectionID::ExceptionSectionID(MBBSectionID::SectionType::Exception);
llvm::TargetMachine::requiresStructuredCFG
bool requiresStructuredCFG() const
Definition: TargetMachine.h:213
llvm::LaneBitmask
Definition: LaneBitmask.h:40
llvm::SuccIterator
Definition: CFG.h:139
i
i
Definition: README.txt:29
llvm::next_nodbg
IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It, then continue incrementing it while it points to a debug instruction.
Definition: MachineBasicBlock.h:1234
llvm::MachineBasicBlock::RegisterMaskPair::PhysReg
MCPhysReg PhysReg
Definition: MachineBasicBlock.h:103
llvm::MachineFunction::remove
void remove(iterator MBBI)
Definition: MachineFunction.h:790
llvm::MachineBasicBlock::succ_size
unsigned succ_size() const
Definition: MachineBasicBlock.h:344
llvm::MachineFunctionProperties::hasProperty
bool hasProperty(Property P) const
Definition: MachineFunction.h:165
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:102
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition: Compiler.h:499
llvm::ModuleSlotTracker::getLocalSlot
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:913
llvm
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::MachineBasicBlock::isLiveIn
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
Definition: MachineBasicBlock.cpp:575
llvm::MachineBasicBlock::LivenessQueryResult
LivenessQueryResult
Possible outcome of a register liveness query to computeRegisterLiveness()
Definition: MachineBasicBlock.h:1021
llvm::MachineBasicBlock::getBasicBlock
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
Definition: MachineBasicBlock.h:202
llvm::MachineRegisterInfo::createVirtualRegister
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:158
llvm::HexagonInstrInfo::removeBranch
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
Remove the branching code at the end of the specific MBB.
Definition: HexagonInstrInfo.cpp:561
llvm::DILocation::getMergedLocation
static const DILocation * getMergedLocation(const DILocation *LocA, const DILocation *LocB)
When two instructions are combined into a single instruction we also need to combine the original loc...
Definition: DebugInfoMetadata.cpp:100
DebugInfoMetadata.h
llvm::cl::Prefix
@ Prefix
Definition: CommandLine.h:164
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::MachineBasicBlock::ReplaceUsesOfBlockWith
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to 'Old', change the code and CFG so that it branches to 'N...
Definition: MachineBasicBlock.cpp:1365
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:71
llvm::Function
Definition: Function.h:61
llvm::MachineFunction::getContext
MCContext & getContext() const
Definition: MachineFunction.h:528
llvm::BranchProbability::getNumerator
uint32_t getNumerator() const
Definition: BranchProbability.h:65
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::HexagonInstrInfo::analyzeBranch
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....
Definition: HexagonInstrInfo.cpp:391
llvm::MachineBasicBlock::instrs
instr_range instrs()
Definition: MachineBasicBlock.h:263
llvm::MachineBasicBlock::isEHFuncletEntry
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
Definition: MachineBasicBlock.h:552
llvm::LiveVariables::VarInfo::Kills
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...
Definition: LiveVariables.h:89
llvm::ilist_node_with_parent< MachineBasicBlock, MachineFunction >::getNextNode
MachineBasicBlock * getNextNode()
Get the next node, or nullptr for the list tail.
Definition: ilist_node.h:288
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1167
llvm::MachineFunction::end
iterator end()
Definition: MachineFunction.h:760
llvm::printMBBReference
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Definition: MachineBasicBlock.cpp:119
llvm::LiveRange::Segment
This represents a simple continuous liveness interval for a value.
Definition: LiveInterval.h:162
llvm::MachineBasicBlock::isEntryBlock
bool isEntryBlock() const
Returns true if this is the entry block of the function.
Definition: MachineBasicBlock.cpp:290
llvm::MachineBasicBlock::setSuccProbability
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
Definition: MachineBasicBlock.cpp:1477
llvm::MachineFunction::getFunctionNumber
unsigned getFunctionNumber() const
getFunctionNumber - Return a unique ID for the current function.
Definition: MachineFunction.h:551
llvm::MachineBasicBlock::getEHCatchretSymbol
MCSymbol * getEHCatchretSymbol() const
Return the EHCatchret Symbol for this basic block.
Definition: MachineBasicBlock.cpp:91
MachineBasicBlock.h
llvm::LivePhysRegs
A set of physical registers with utility functions to track liveness when walking backward/forward th...
Definition: LivePhysRegs.h:48
llvm::MachineBasicBlock::isReturnBlock
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
Definition: MachineBasicBlock.h:809
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:143
llvm::MachineBasicBlock::findDebugLoc
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE and DBG_LABEL instructions.
Definition: MachineBasicBlock.cpp:1399
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
llvm::MachineBasicBlock::livein_iterator
LiveInVector::const_iterator livein_iterator
Definition: MachineBasicBlock.h:398
llvm::MachineBasicBlock::moveBefore
void moveBefore(MachineBasicBlock *NewAfter)
Move 'this' block before or after the specified block.
Definition: MachineBasicBlock.cpp:633
llvm::BranchProbability::getZero
static BranchProbability getZero()
Definition: BranchProbability.h:49
llvm::MachineBasicBlock::liveins
iterator_range< livein_iterator > liveins() const
Definition: MachineBasicBlock.h:412
TargetInstrInfo.h
llvm::MBBSectionID::Number
unsigned Number
Definition: MachineBasicBlock.h:59
llvm::HexagonInstrInfo::isPredicated
bool isPredicated(const MachineInstr &MI) const override
Returns true if the instruction is already predicated.
Definition: HexagonInstrInfo.cpp:1580
llvm::TargetLoweringBase::getExceptionPointerRegister
virtual Register getExceptionPointerRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception address on entry to an ...
Definition: TargetLowering.h:1732
llvm::MachineFunction::insert
void insert(iterator MBBI, MachineBasicBlock *MBB)
Definition: MachineFunction.h:777
llvm::SmallSet
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:134
slot
Since we know that Vector is byte aligned and we know the element offset of we should change the load into a lve *x instead of doing a load store lve *x sequence Implement passing vectors by value into calls and receiving them as arguments GCC apparently tries to then a load and vperm of Variable We need a way to teach tblgen that some operands of an intrinsic are required to be constants The verifier should enforce this constraint We currently codegen SCALAR_TO_VECTOR as a store of the scalar to a byte aligned stack slot
Definition: README_ALTIVEC.txt:57
llvm::MachineRegisterInfo::getNumVirtRegs
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
Definition: MachineRegisterInfo.h:757
llvm::iplist_impl::remove
pointer remove(iterator &IT)
Definition: ilist.h:251
llvm::Register::index2VirtReg
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:84
llvm::addLiveIns
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
Definition: LivePhysRegs.cpp:253
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:899
llvm::MachineBasicBlock::back
MachineInstr & back()
Definition: MachineBasicBlock.h:248
llvm::MachineBasicBlock::addSuccessorWithoutProb
void addSuccessorWithoutProb(MachineBasicBlock *Succ)
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:756
llvm::MBBSectionID
Definition: MachineBasicBlock.h:52
llvm::MachineBasicBlock::copySuccessor
void copySuccessor(MachineBasicBlock *Orig, succ_iterator I)
Copy a successor (and any probability info) from original block to this block's.
Definition: MachineBasicBlock.cpp:847
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition: ModuleSlotTracker.h:29
llvm::LegalityPredicates::any
Predicate any(Predicate P0, Predicate P1)
True iff P0 or P1 are true.
Definition: LegalizerInfo.h:232
llvm::AnalyzePhysRegInBundle
PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, const TargetRegisterInfo *TRI)
AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses a physical register.
Definition: MachineInstrBundle.cpp:308
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:122
F
#define F(x, y, z)
Definition: MD5.cpp:56
llvm::MachineLoopInfo
Definition: MachineLoopInfo.h:90
MachineRegisterInfo.h
llvm::iplist_impl::erase
iterator erase(iterator where)
Definition: ilist.h:267
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
llvm::MachineBasicBlock::dump
void dump() const
Definition: MachineBasicBlock.cpp:295
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1325
llvm::MachineBasicBlock::isBeginSection
bool isBeginSection() const
Returns true if this block begins any section.
Definition: MachineBasicBlock.h:564
llvm::MachineRegisterInfo::tracksLiveness
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
Definition: MachineRegisterInfo.h:197
llvm::MachineBasicBlock::const_iterator
MachineInstrBundleIterator< const MachineInstr > const_iterator
Definition: MachineBasicBlock.h:234
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
llvm::MachineBasicBlock::printName
void printName(raw_ostream &os, unsigned printNameFlags=PrintNameIr, ModuleSlotTracker *moduleSlotTracker=nullptr) const
Print the basic block's name as:
Definition: MachineBasicBlock.cpp:478
isLiveOut
static bool isLiveOut(const MachineBasicBlock &MBB, unsigned Reg)
Definition: SIOptimizeExecMasking.cpp:286
llvm::MachineBasicBlock::addSuccessor
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:746
PrintSlotIndexes
static cl::opt< bool > PrintSlotIndexes("print-slotindexes", cl::desc("When printing machine IR, annotate instructions and blocks with " "SlotIndexes when available"), cl::init(true), cl::Hidden)
llvm::MachineBasicBlock::getSymbol
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
Definition: MachineBasicBlock.cpp:60
TargetLowering.h
llvm::SparseBitVector
Definition: SparseBitVector.h:255
bb
< i1 > br i1 label label bb bb
Definition: README.txt:978
llvm::MachineBasicBlock::getFirstInstrTerminator
instr_iterator getFirstInstrTerminator()
Same getFirstTerminator but it ignores bundles and return an instr_iterator instead.
Definition: MachineBasicBlock.cpp:251
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:586
llvm::MCContext::getOrCreateSymbol
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:187
llvm::LiveVariables::VarInfo::removeKill
bool removeKill(MachineInstr &MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
Definition: LiveVariables.h:94
llvm::SlotIndexes::hasIndex
bool hasIndex(const MachineInstr &instr) const
Returns true if the given machine instr is mapped to an index, otherwise returns false.
Definition: SlotIndexes.h:380
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::MachineBasicBlock::removeFromParent
MachineBasicBlock * removeFromParent()
This method unlinks 'this' from the containing function, and returns it, but does not delete it.
Definition: MachineBasicBlock.cpp:1351
MachineLoopInfo.h
llvm::LiveRange::liveAt
bool liveAt(SlotIndex index) const
Definition: LiveInterval.h:393
TargetMachine.h
llvm::BranchProbability::getDenominator
static uint32_t getDenominator()
Definition: BranchProbability.h:66
llvm::LiveIntervals::getMBBStartIdx
SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const
Return the first index in the given basic block.
Definition: LiveIntervals.h:236
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::PseudoProbeAttributes::Dangling
@ Dangling
llvm::MachineBasicBlock::succ_end
succ_iterator succ_end()
Definition: MachineBasicBlock.h:334
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3158
llvm::LiveRange::addSegment
iterator addSegment(Segment S)
Add the specified Segment to this range, merging segments as appropriate.
Definition: LiveInterval.cpp:548
MCContext.h
llvm::MachineBasicBlock::isSuccessor
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Definition: MachineBasicBlock.cpp:934
llvm::Register::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:65
llvm::MachineBasicBlock::eraseFromParent
void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
Definition: MachineBasicBlock.cpp:1358
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::MachineFunction::getProperties
const MachineFunctionProperties & getProperties() const
Get the function properties.
Definition: MachineFunction.h:667
llvm::LivePhysRegs::addLiveOuts
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
Definition: LivePhysRegs.cpp:230
LiveVariables.h
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
First
into llvm powi allowing the code generator to produce balanced multiplication trees First
Definition: README.txt:54
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::MachineBasicBlock::isLegalToHoistInto
bool isLegalToHoistInto() const
Returns true if it is legal to hoist instructions into this block.
Definition: MachineBasicBlock.cpp:308
llvm::MachineBasicBlock::RegisterMaskPair
Pair of physical register and lane mask.
Definition: MachineBasicBlock.h:101
llvm::MachineBasicBlock::splitAt
MachineBasicBlock * splitAt(MachineInstr &SplitInst, bool UpdateLiveIns=true, LiveIntervals *LIS=nullptr)
Split a basic block into 2 pieces at SplitPoint.
Definition: MachineBasicBlock.cpp:991
llvm::SlotIndexes::getInstructionIndex
SlotIndex getInstructionIndex(const MachineInstr &MI, bool IgnoreBundle=false) const
Returns the base index for the given instruction.
Definition: SlotIndexes.h:385
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:50
llvm::PrintLaneMask
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:94
llvm::Function::hasPersonalityFn
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:830
llvm::HexagonInstrInfo::insertBranch
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
Insert branch code into the end of the specified MachineBasicBlock.
Definition: HexagonInstrInfo.cpp:584
llvm::operator<<
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
Definition: APFixedPoint.h:230
llvm::TargetRegisterInfo::regsOverlap
bool regsOverlap(Register regA, Register regB) const
Returns true if the two registers are equal or alias each other.
Definition: TargetRegisterInfo.h:416
llvm::MachineFunction::addToMBBNumbering
unsigned addToMBBNumbering(MachineBasicBlock *MBB)
Adds the MBB to the internal numbering.
Definition: MachineFunction.h:813
llvm::MachineFunction::begin
iterator begin()
Definition: MachineFunction.h:758
llvm::SlotIndexes
SlotIndexes pass.
Definition: SlotIndexes.h:314
llvm::MachineBasicBlock::moveAndDanglePseudoProbes
void moveAndDanglePseudoProbes(MachineBasicBlock *ToMBB)
move all pseudo probes in this block to the end of /c ToMBB To and tag them dangling.
Definition: MachineBasicBlock.cpp:914
SmallPtrSet.h
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::LiveInterval
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:680
llvm::SlotIndex
SlotIndex - An opaque wrapper around machine indexes.
Definition: SlotIndexes.h:83
llvm::BranchProbability::getUnknown
static BranchProbability getUnknown()
Definition: BranchProbability.h:51
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::MachineBasicBlock::findPrevDebugLoc
DebugLoc findPrevDebugLoc(instr_iterator MBBI)
Find the previous valid DebugLoc preceding MBBI, skipping and DBG_VALUE instructions.
Definition: MachineBasicBlock.cpp:1417
llvm::SmallString
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
Definition: SmallString.h:25
llvm::Pass::print
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
Definition: Pass.cpp:125
llvm::LiveIntervals::insertMBBInMaps
void insertMBBInMaps(MachineBasicBlock *MBB)
Definition: LiveIntervals.h:259
llvm::ilist_traits
Template traits for intrusive list.
Definition: ilist.h:89
llvm::MachineBasicBlock::succ_iterator
std::vector< MachineBasicBlock * >::iterator succ_iterator
Definition: MachineBasicBlock.h:306
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:576
BasicBlock.h
llvm::cl::opt< bool >
llvm::MachineBasicBlock::mayHaveInlineAsmBr
bool mayHaveInlineAsmBr() const
Returns true if this block may have an INLINEASM_BR (overestimate, by checking if any of the successo...
Definition: MachineBasicBlock.cpp:300
llvm::LiveVariables::addNewBlock
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
Definition: LiveVariables.cpp:757
llvm::MachineLoop
Definition: MachineLoopInfo.h:45
llvm::LivePhysRegs::stepBackward
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
Definition: LivePhysRegs.cpp:68
llvm::MachineBasicBlock::printAsOperand
void printAsOperand(raw_ostream &OS, bool PrintType=true) const
Definition: MachineBasicBlock.cpp:551
llvm::MachineOperand::isUndef
bool isUndef() const
Definition: MachineOperand.h:395
llvm::SmallSet::count
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:164
llvm::MachineInstrBundleIterator::getReverse
reverse_iterator getReverse() const
Get a reverse iterator to the same node.
Definition: MachineInstrBundleIterator.h:283
llvm::SlotIndexes::getMBBStartIdx
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
Definition: SlotIndexes.h:466
llvm::MachineBasicBlock::instr_rend
reverse_instr_iterator instr_rend()
Definition: MachineBasicBlock.h:258
llvm::MachineFunctionProperties::Property::TracksLiveness
@ TracksLiveness
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
index
splat index
Definition: README_ALTIVEC.txt:181
LiveIntervals.h
llvm::MCContext::getAsmInfo
const MCAsmInfo * getAsmInfo() const
Definition: MCContext.h:420
llvm::MachineBasicBlock::hasAddressTaken
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
Definition: MachineBasicBlock.h:211
llvm::find
auto find(R &&Range, const T &Val)
Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1502
llvm::MachineFunction::splice
void splice(iterator InsertPt, iterator MBBI)
Definition: MachineFunction.h:780
llvm::MachineBasicBlock::SkipPHIsAndLabels
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
Definition: MachineBasicBlock.cpp:210
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
llvm::MachineBasicBlock::instr_rbegin
reverse_instr_iterator instr_rbegin()
Definition: MachineBasicBlock.h:256
llvm::MachineBasicBlock::LQR_Live
@ LQR_Live
Register is known to be (at least partially) live.
Definition: MachineBasicBlock.h:1022
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:443
llvm::MachineBasicBlock::getFirstNonPHI
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
Definition: MachineBasicBlock.cpp:200
llvm::is_contained
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1547
llvm::MachineFunction::CreateMachineBasicBlock
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
Definition: MachineFunction.cpp:414
llvm::prev_nodbg
IterT prev_nodbg(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It, then continue decrementing it while it points to a debug instruction.
Definition: MachineBasicBlock.h:1241
llvm::MachineBasicBlock::getLastNonDebugInstr
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:267
llvm::MachineBasicBlock::getAlignment
Align getAlignment() const
Return alignment of the basic block.
Definition: MachineBasicBlock.h:519
llvm::Register::isVirtualRegister
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:71
llvm::MachineFunction::getName
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
Definition: MachineFunction.cpp:522
llvm::MBBSectionID::ExceptionSectionID
const static MBBSectionID ExceptionSectionID
Definition: MachineBasicBlock.h:65
llvm::BranchProbability::isUnknown
bool isUnknown() const
Definition: BranchProbability.h:47
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineBasicBlock::canFallThrough
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
Definition: MachineBasicBlock.cpp:987
llvm::MachineBasicBlock::succ_begin
succ_iterator succ_begin()
Definition: MachineBasicBlock.h:332
llvm::IndexedInstrProf::HashT::Last
@ Last
llvm::PhysRegInfo
Information about how a physical register Reg is used by a set of operands.
Definition: MachineInstrBundle.h:246
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:225
llvm::MachineFunction::const_iterator
BasicBlockListType::const_iterator const_iterator
Definition: MachineFunction.h:741
llvm::MachineFunction::erase
void erase(iterator MBBI)
Definition: MachineFunction.h:792
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::MachineBasicBlock::livein_end
livein_iterator livein_end() const
Definition: MachineBasicBlock.h:410
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:360
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:67
llvm::MachineBasicBlock::predecessors
iterator_range< pred_iterator > predecessors()
Definition: MachineBasicBlock.h:349
llvm::MachineBasicBlock::reverse_instr_iterator
Instructions::reverse_iterator reverse_instr_iterator
Definition: MachineBasicBlock.h:230
llvm::MachineBasicBlock::LQR_Dead
@ LQR_Dead
Register is known to be fully dead.
Definition: MachineBasicBlock.h:1023
llvm::MachineBasicBlock::instr_begin
instr_iterator instr_begin()
Definition: MachineBasicBlock.h:252
llvm::MachineBasicBlock::pred_empty
bool pred_empty() const
Definition: MachineBasicBlock.h:331
llvm::LiveIntervals::getInterval
LiveInterval & getInterval(Register Reg)
Definition: LiveIntervals.h:114
llvm::MachineBasicBlock::instr_end
instr_iterator instr_end()
Definition: MachineBasicBlock.h:254
llvm::MachineFunction
Definition: MachineFunction.h:230
llvm::MachineBasicBlock::moveAfter
void moveAfter(MachineBasicBlock *NewBefore)
Definition: MachineBasicBlock.cpp:637
llvm::MachineBasicBlock::succ_empty
bool succ_empty() const
Definition: MachineBasicBlock.h:347
llvm::MachineBasicBlock::PrintNameIr
@ PrintNameIr
Add IR name where available.
Definition: MachineBasicBlock.h:1048
llvm::MachineBasicBlock::getFirstTerminator
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
Definition: MachineBasicBlock.cpp:242
llvm::skipDebugInstructionsForward
IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator.
Definition: MachineBasicBlock.h:1210
llvm::MachineBasicBlock::getBeginClobberMask
const uint32_t * getBeginClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the start of this basic block.
Definition: MachineBasicBlock.cpp:1609
llvm::MachineBasicBlock::phis
iterator_range< iterator > phis()
Returns a range that iterates over the phis in the basic block.
Definition: MachineBasicBlock.h:296
llvm::MachineOperand::getMBB
MachineBasicBlock * getMBB() const
Definition: MachineOperand.h:552
llvm::MachineBasicBlock::getNumber
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
Definition: MachineBasicBlock.h:1060
MCAsmInfo.h
DataLayout.h
Cond
SmallVector< MachineOperand, 4 > Cond
Definition: BasicBlockSections.cpp:167
llvm::MachineBasicBlock::PrintNameAttributes
@ PrintNameAttributes
Print attributes.
Definition: MachineBasicBlock.h:1049
llvm::MachineBasicBlock::successors
iterator_range< succ_iterator > successors()
Definition: MachineBasicBlock.h:355
llvm::MachineBasicBlock::getFirstNonDebugInstr
iterator getFirstNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the first non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:261
llvm::MachineBasicBlock::isEHPad
bool isEHPad() const
Returns true if the block is a landing pad.
Definition: MachineBasicBlock.h:526
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::MachineBasicBlock::rbegin
reverse_iterator rbegin()
Definition: MachineBasicBlock.h:272
llvm::MachineBasicBlock::splice
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
Definition: MachineBasicBlock.h:954
llvm::MachineBasicBlock::hasEHPadSuccessor
bool hasEHPadSuccessor() const
Definition: MachineBasicBlock.cpp:283
llvm::LivePhysRegs::init
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
Definition: LivePhysRegs.h:66
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm::MachineBasicBlock::getFullName
std::string getFullName() const
Return a formatted string to identify this block and its parent function.
Definition: MachineBasicBlock.cpp:322
llvm::CallingConv::Cold
@ Cold
Definition: CallingConv.h:48
llvm::MachineBasicBlock::findBranchDebugLoc
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
Definition: MachineBasicBlock.cpp:1438
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
llvm::MachineBasicBlock::removeLiveIn
void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Remove the specified register from the live in set.
Definition: MachineBasicBlock.cpp:557
llvm::MBBSectionID::Type
enum llvm::MBBSectionID::SectionType Type
llvm::MachineBasicBlock::rfindDebugLoc
DebugLoc rfindDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findDebugLoc (it also searches from the first to the last MI of this MBB) ...
Definition: MachineBasicBlock.cpp:1407
Number
uint32_t Number
Definition: Profile.cpp:47
llvm::ilist_callback_traits::addNodeToList
void addNodeToList(NodeTy *)
When an MBB is added to an MF, we need to update the parent pointer of the MBB, the MBB numbering,...
Definition: ilist.h:65
uint32_t
llvm::BranchProbability
Definition: BranchProbability.h:30
llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineBasicBlock, Options... >::type >::getIterator
self_iterator getIterator()
Definition: ilist_node.h:81
TargetSubtargetInfo.h
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::MachineFunction::hasBBSections
bool hasBBSections() const
Returns true if this function has basic block sections enabled.
Definition: MachineFunction.h:554
llvm::MachineBasicBlock::splitSuccessor
void splitSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New, bool NormalizeSuccProbs=false)
Split the old successor into old plus new and updates the probability info.
Definition: MachineBasicBlock.cpp:765
llvm::format
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
llvm::SmallSet::insert
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
Definition: SmallSet.h:180
llvm::MachineBasicBlock::liveout_begin
liveout_iterator liveout_begin() const
Iterator scanning successor basic blocks' liveins to determine the registers potentially live at the ...
Definition: MachineBasicBlock.cpp:1633
llvm::PredIterator
Definition: CFG.h:43
llvm::Value::getName
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:294
llvm::MachineBasicBlock::transferSuccessors
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
Definition: MachineBasicBlock.cpp:865
llvm::MachineBasicBlock::getSectionID
MBBSectionID getSectionID() const
Returns the section ID of this basic block.
Definition: MachineBasicBlock.h:574
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:367
llvm::MachineBasicBlock::isPredecessor
bool isPredecessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a predecessor of this block.
Definition: MachineBasicBlock.cpp:930
llvm::find_if
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1509
llvm::MachineBasicBlock::getEndSymbol
MCSymbol * getEndSymbol() const
Returns the MCSymbol marking the end of this basic block.
Definition: MachineBasicBlock.cpp:102
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MachineBasicBlock::canSplitCriticalEdge
bool canSplitCriticalEdge(const MachineBasicBlock *Succ) const
Check if the edge between this block and the given successor Succ, can be split.
Definition: MachineBasicBlock.cpp:1271
llvm::AMDGPU::HSAMD::Kernel::Key::SymbolName
constexpr char SymbolName[]
Key for Kernel::Metadata::mSymbolName.
Definition: AMDGPUMetadata.h:381
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
llvm::TargetLoweringBase::getExceptionSelectorRegister
virtual Register getExceptionSelectorRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception typeid on entry to a la...
Definition: TargetLowering.h:1739
llvm::MachineBasicBlock::replaceSuccessor
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
Replace successor OLD with NEW and update probability info.
Definition: MachineBasicBlock.cpp:807
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:52
llvm::MachineBasicBlock::replacePhiUsesWith
void replacePhiUsesWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Update all phi nodes in this basic block to refer to basic block New instead of basic block Old.
Definition: MachineBasicBlock.cpp:1386
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:542
llvm::MachineBasicBlock::sortUniqueLiveIns
void sortUniqueLiveIns()
Sorts and uniques the LiveIns vector.
Definition: MachineBasicBlock.cpp:581
uint16_t
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:572
llvm::MachineBasicBlock::removeSuccessor
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:784
llvm::MBBSectionID::ColdSectionID
const static MBBSectionID ColdSectionID
Definition: MachineBasicBlock.h:64
llvm::MachineBasicBlock::insert
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
Definition: MachineBasicBlock.cpp:1338
llvm::ilist_iterator
Iterator for intrusive lists based on ilist_node.
Definition: ilist_iterator.h:57
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
llvm::MachineBasicBlock::computeRegisterLiveness
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, MCRegister Reg, const_iterator Before, unsigned Neighborhood=10) const
Return whether (physical) register Reg has been defined and not killed as of just before Before.
Definition: MachineBasicBlock.cpp:1511
llvm::SlotIndex::getPrevSlot
SlotIndex getPrevSlot() const
Returns the previous slot in the index list.
Definition: SlotIndexes.h:289
llvm::MachineBasicBlock::liveout_iterator
Definition: MachineBasicBlock.h:419
llvm::MachineBasicBlock::instr_iterator
Instructions::iterator instr_iterator
Definition: MachineBasicBlock.h:228
llvm::AArch64CC::LS
@ LS
Definition: AArch64BaseInfo.h:245
llvm::MCAsmInfo::getPrivateLabelPrefix
StringRef getPrivateLabelPrefix() const
Definition: MCAsmInfo.h:644
llvm::ilist_callback_traits::removeNodeFromList
void removeNodeFromList(NodeTy *)
Definition: ilist.h:66
llvm::MachineBasicBlock::front
MachineInstr & front()
Definition: MachineBasicBlock.h:247
llvm::sort
void sort(IteratorTy Start, IteratorTy End)
Definition: STLExtras.h:1423
llvm::MachineBasicBlock::livein_begin
livein_iterator livein_begin() const
Definition: MachineBasicBlock.cpp:1626
llvm::LiveIntervals
Definition: LiveIntervals.h:54
llvm::VNInfo
VNInfo - Value Number Information.
Definition: LiveInterval.h:53
llvm::LiveRange::getVNInfoAt
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
Definition: LiveInterval.h:413
unbundleSingleMI
static void unbundleSingleMI(MachineInstr *MI)
Prepare MI to be removed from its bundle.
Definition: MachineBasicBlock.cpp:1313
llvm::MachineBasicBlock::isLayoutSuccessor
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
Definition: MachineBasicBlock.cpp:938
llvm::MachineBasicBlock::rfindPrevDebugLoc
DebugLoc rfindPrevDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findPrevDebugLoc (it also searches from the last to the first MI of this M...
Definition: MachineBasicBlock.cpp:1425
llvm::MachineBasicBlock::normalizeSuccProbs
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
Definition: MachineBasicBlock.h:654
llvm::TargetRegisterInfo::getNoPreservedMask
virtual const uint32_t * getNoPreservedMask() const
Return a register mask that clobbers everything.
Definition: TargetRegisterInfo.h:499
llvm::Function::getPersonalityFn
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1743
llvm::MachineBasicBlock::livein_empty
bool livein_empty() const
Definition: MachineBasicBlock.h:411
llvm::MachineBasicBlock::getFallThrough
MachineBasicBlock * getFallThrough()
Return the fallthrough block if the block can implicitly transfer control to the block after it by fa...
Definition: MachineBasicBlock.cpp:943
llvm::LiveRange::removeSegment
void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)
Remove the specified segment from this range.
Definition: LiveInterval.cpp:583
llvm::iplist_impl::insert
iterator insert(iterator where, pointer New)
Definition: ilist.h:228
llvm::MachineBasicBlock::validateSuccProbs
void validateSuccProbs() const
Validate successors' probabilities and check if the sum of them is approximate one.
Definition: MachineBasicBlock.cpp:732
llvm::MachineBasicBlock::getEndClobberMask
const uint32_t * getEndClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the end of the basic block.
Definition: MachineBasicBlock.cpp:1615
llvm::Pass
Pass interface - Implemented by all 'passes'.
Definition: Pass.h:91
llvm::HexagonInstrInfo::reverseBranchCondition
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Reverses the branch condition of the specified condition list, returning false on success and true if...
Definition: HexagonInstrInfo.cpp:1547
llvm::TargetSubtargetInfo::getTargetLowering
virtual const TargetLowering * getTargetLowering() const
Definition: TargetSubtargetInfo.h:96
llvm::skipDebugInstructionsBackward
IterT skipDebugInstructionsBackward(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
Definition: MachineBasicBlock.h:1223
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:268
MachineInstrBuilder.h
llvm::MachineBasicBlock::isInlineAsmBrIndirectTarget
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
Definition: MachineBasicBlock.h:594
llvm::raw_ostream::indent
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
Definition: raw_ostream.cpp:497
llvm::ilist_alloc_traits::deleteNode
static void deleteNode(NodeTy *V)
Definition: ilist.h:41
llvm::Printable
Simple wrapper around std::function<void(raw_ostream&)>.
Definition: Printable.h:37
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
N
#define N
llvm::MachineInstr::BundledSucc
@ BundledSucc
Definition: MachineInstr.h:87
llvm::LiveVariables::getVarInfo
VarInfo & getVarInfo(Register Reg)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
Definition: LiveVariables.cpp:84
llvm::MachineOperand::setMBB
void setMBB(MachineBasicBlock *MBB)
Definition: MachineOperand.h:689
llvm::MachineBasicBlock::const_succ_iterator
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
Definition: MachineBasicBlock.h:307
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:240
llvm::raw_svector_ostream
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:647
llvm::MachineBasicBlock::clearLiveIns
void clearLiveIns()
Clear live in list.
Definition: MachineBasicBlock.cpp:1622
llvm::MachineRegisterInfo::constrainRegClass
const TargetRegisterClass * constrainRegClass(Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...
Definition: MachineRegisterInfo.cpp:85
ModuleSlotTracker.h
llvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
Definition: MachineBasicBlock.cpp:885
DataTypes.h
llvm::LiveIntervals::repairIntervalsInRange
void repairIntervalsInRange(MachineBasicBlock *MBB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, ArrayRef< Register > OrigRegs)
Update live intervals for instructions in a range of iterators.
Definition: LiveIntervals.cpp:1657
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::LiveVariables
Definition: LiveVariables.h:46
llvm::MachineBasicBlock::LQR_Unknown
@ LQR_Unknown
Register liveness not decidable from local neighborhood.
Definition: MachineBasicBlock.h:1024
llvm::MachineBasicBlock::SkipPHIsLabelsAndDebug
iterator SkipPHIsLabelsAndDebug(iterator I, bool SkipPseudoOp=true)
Return the first instruction in MBB after I that is not a PHI, label or debug.
Definition: MachineBasicBlock.cpp:225
llvm::LiveIntervals::hasInterval
bool hasInterval(Register Reg) const
Definition: LiveIntervals.h:125
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MachineBasicBlock::print
void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const
Definition: MachineBasicBlock.cpp:333
SlotIndexes.h
llvm::cl::desc
Definition: CommandLine.h:414
llvm::ilist_callback_traits::transferNodesFromList
void transferNodesFromList(ilist_callback_traits &OldList, Iterator, Iterator)
Callback before transferring nodes to this list.
Definition: ilist.h:71
llvm::MachineBasicBlock::updateTerminator
void updateTerminator(MachineBasicBlock *PreviousLayoutSuccessor)
Update the terminator instructions in block to account for changes to block layout which may have bee...
Definition: MachineBasicBlock.cpp:641
raw_ostream.h
llvm::MachineDominatorTree
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
Definition: MachineDominators.h:45
MachineFunction.h
llvm::printReg
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition: TargetRegisterInfo.cpp:110
llvm::MachineInstr::BundledPred
@ BundledPred
Definition: MachineInstr.h:86
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::abs
APFloat abs(APFloat X)
Returns the absolute value of the argument.
Definition: APFloat.h:1284
llvm::MachineBasicBlock::SplitCriticalEdge
MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P, std::vector< SparseBitVector<>> *LiveInSets=nullptr)
Split the critical edge from this block to the given successor block, and return the newly created bl...
Definition: MachineBasicBlock.cpp:1032
llvm::MCID::Terminator
@ Terminator
Definition: MCInstrDesc.h:155
llvm::MachineBasicBlock::remove_instr
MachineInstr * remove_instr(MachineInstr *I)
Remove the possibly bundled instruction from the instruction list without deleting it.
Definition: MachineBasicBlock.cpp:1330
TargetRegisterInfo.h
llvm::MachineBasicBlock::getName
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
Definition: MachineBasicBlock.cpp:314
Debug.h
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
llvm::Optional::getValue
constexpr const T & getValue() const LLVM_LVALUE_FUNCTION
Definition: Optional.h:282
MachineDominators.h
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:23