LLVM  15.0.0git
MachineBasicBlock.cpp
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1 //===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Collect the sequence of machine instructions for a basic block.
10 //
11 //===----------------------------------------------------------------------===//
12 
27 #include "llvm/Config/llvm-config.h"
28 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/MC/MCAsmInfo.h"
32 #include "llvm/MC/MCContext.h"
33 #include "llvm/Support/Debug.h"
36 #include <algorithm>
37 using namespace llvm;
38 
39 #define DEBUG_TYPE "codegen"
40 
42  "print-slotindexes",
43  cl::desc("When printing machine IR, annotate instructions and blocks with "
44  "SlotIndexes when available"),
45  cl::init(true), cl::Hidden);
46 
47 MachineBasicBlock::MachineBasicBlock(MachineFunction &MF, const BasicBlock *B)
48  : BB(B), Number(-1), xParent(&MF) {
49  Insts.Parent = this;
50  if (B)
51  IrrLoopHeaderWeight = B->getIrrLoopHeaderWeight();
52 }
53 
54 MachineBasicBlock::~MachineBasicBlock() = default;
55 
56 /// Return the MCSymbol for this basic block.
57 MCSymbol *MachineBasicBlock::getSymbol() const {
58  if (!CachedMCSymbol) {
59  const MachineFunction *MF = getParent();
60  MCContext &Ctx = MF->getContext();
61 
62  // We emit a non-temporary symbol -- with a descriptive name -- if it begins
63  // a section (with basic block sections). Otherwise we fall back to use temp
64  // label.
65  if (MF->hasBBSections() && isBeginSection()) {
66  SmallString<5> Suffix;
67  if (SectionID == MBBSectionID::ColdSectionID) {
68  Suffix += ".cold";
69  } else if (SectionID == MBBSectionID::ExceptionSectionID) {
70  Suffix += ".eh";
71  } else {
72  // For symbols that represent basic block sections, we add ".__part." to
73  // allow tools like symbolizers to know that this represents a part of
74  // the original function.
75  Suffix = (Suffix + Twine(".__part.") + Twine(SectionID.Number)).str();
76  }
77  CachedMCSymbol = Ctx.getOrCreateSymbol(MF->getName() + Suffix);
78  } else {
80  CachedMCSymbol = Ctx.getOrCreateSymbol(Twine(Prefix) + "BB" +
81  Twine(MF->getFunctionNumber()) +
82  "_" + Twine(getNumber()));
83  }
84  }
85  return CachedMCSymbol;
86 }
87 
89  if (!CachedEHCatchretMCSymbol) {
90  const MachineFunction *MF = getParent();
93  << "$ehgcr_" << MF->getFunctionNumber() << '_' << getNumber();
94  CachedEHCatchretMCSymbol = MF->getContext().getOrCreateSymbol(SymbolName);
95  }
96  return CachedEHCatchretMCSymbol;
97 }
98 
100  if (!CachedEndMCSymbol) {
101  const MachineFunction *MF = getParent();
102  MCContext &Ctx = MF->getContext();
103  auto Prefix = Ctx.getAsmInfo()->getPrivateLabelPrefix();
104  CachedEndMCSymbol = Ctx.getOrCreateSymbol(Twine(Prefix) + "BB_END" +
105  Twine(MF->getFunctionNumber()) +
106  "_" + Twine(getNumber()));
107  }
108  return CachedEndMCSymbol;
109 }
110 
112  MBB.print(OS);
113  return OS;
114 }
115 
117  return Printable([&MBB](raw_ostream &OS) { return MBB.printAsOperand(OS); });
118 }
119 
120 /// When an MBB is added to an MF, we need to update the parent pointer of the
121 /// MBB, the MBB numbering, and any instructions in the MBB to be on the right
122 /// operand list for registers.
123 ///
124 /// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
125 /// gets the next available unique MBB number. If it is removed from a
126 /// MachineFunction, it goes back to being #-1.
128  MachineBasicBlock *N) {
129  MachineFunction &MF = *N->getParent();
130  N->Number = MF.addToMBBNumbering(N);
131 
132  // Make sure the instructions have their operands in the reginfo lists.
133  MachineRegisterInfo &RegInfo = MF.getRegInfo();
134  for (MachineInstr &MI : N->instrs())
135  MI.addRegOperandsToUseLists(RegInfo);
136 }
137 
139  MachineBasicBlock *N) {
140  N->getParent()->removeFromMBBNumbering(N->Number);
141  N->Number = -1;
142 }
143 
144 /// When we add an instruction to a basic block list, we update its parent
145 /// pointer and add its operands from reg use/def lists if appropriate.
147  assert(!N->getParent() && "machine instruction already in a basic block");
148  N->setParent(Parent);
149 
150  // Add the instruction's register operands to their corresponding
151  // use/def lists.
152  MachineFunction *MF = Parent->getParent();
153  N->addRegOperandsToUseLists(MF->getRegInfo());
154  MF->handleInsertion(*N);
155 }
156 
157 /// When we remove an instruction from a basic block list, we update its parent
158 /// pointer and remove its operands from reg use/def lists if appropriate.
160  assert(N->getParent() && "machine instruction not in a basic block");
161 
162  // Remove from the use/def lists.
163  if (MachineFunction *MF = N->getMF()) {
164  MF->handleRemoval(*N);
165  N->removeRegOperandsFromUseLists(MF->getRegInfo());
166  }
167 
168  N->setParent(nullptr);
169 }
170 
171 /// When moving a range of instructions from one MBB list to another, we need to
172 /// update the parent pointers and the use/def lists.
174  instr_iterator First,
175  instr_iterator Last) {
176  assert(Parent->getParent() == FromList.Parent->getParent() &&
177  "cannot transfer MachineInstrs between MachineFunctions");
178 
179  // If it's within the same BB, there's nothing to do.
180  if (this == &FromList)
181  return;
182 
183  assert(Parent != FromList.Parent && "Two lists have the same parent?");
184 
185  // If splicing between two blocks within the same function, just update the
186  // parent pointers.
187  for (; First != Last; ++First)
188  First->setParent(Parent);
189 }
190 
192  assert(!MI->getParent() && "MI is still in a block!");
193  Parent->getParent()->deleteMachineInstr(MI);
194 }
195 
198  while (I != E && I->isPHI())
199  ++I;
200  assert((I == E || !I->isInsideBundle()) &&
201  "First non-phi MI cannot be inside a bundle!");
202  return I;
203 }
204 
208 
209  iterator E = end();
210  while (I != E && (I->isPHI() || I->isPosition() ||
211  TII->isBasicBlockPrologue(*I)))
212  ++I;
213  // FIXME: This needs to change if we wish to bundle labels
214  // inside the bundle.
215  assert((I == E || !I->isInsideBundle()) &&
216  "First non-phi / non-label instruction is inside a bundle!");
217  return I;
218 }
219 
222  bool SkipPseudoOp) {
224 
225  iterator E = end();
226  while (I != E && (I->isPHI() || I->isPosition() || I->isDebugInstr() ||
227  (SkipPseudoOp && I->isPseudoProbe()) ||
228  TII->isBasicBlockPrologue(*I)))
229  ++I;
230  // FIXME: This needs to change if we wish to bundle labels / dbg_values
231  // inside the bundle.
232  assert((I == E || !I->isInsideBundle()) &&
233  "First non-phi / non-label / non-debug "
234  "instruction is inside a bundle!");
235  return I;
236 }
237 
239  iterator B = begin(), E = end(), I = E;
240  while (I != B && ((--I)->isTerminator() || I->isDebugInstr()))
241  ; /*noop */
242  while (I != E && !I->isTerminator())
243  ++I;
244  return I;
245 }
246 
248  instr_iterator B = instr_begin(), E = instr_end(), I = E;
249  while (I != B && ((--I)->isTerminator() || I->isDebugInstr()))
250  ; /*noop */
251  while (I != E && !I->isTerminator())
252  ++I;
253  return I;
254 }
255 
258  // Skip over begin-of-block dbg_value instructions.
259  return skipDebugInstructionsForward(begin(), end(), SkipPseudoOp);
260 }
261 
264  // Skip over end-of-block dbg_value instructions.
266  while (I != B) {
267  --I;
268  // Return instruction that starts a bundle.
269  if (I->isDebugInstr() || I->isInsideBundle())
270  continue;
271  if (SkipPseudoOp && I->isPseudoProbe())
272  continue;
273  return I;
274  }
275  // The block is all debug values.
276  return end();
277 }
278 
280  for (const MachineBasicBlock *Succ : successors())
281  if (Succ->isEHPad())
282  return true;
283  return false;
284 }
285 
287  return getParent()->begin() == getIterator();
288 }
289 
290 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
292  print(dbgs());
293 }
294 #endif
295 
297  for (const MachineBasicBlock *Succ : successors()) {
298  if (Succ->isInlineAsmBrIndirectTarget())
299  return true;
300  }
301  return false;
302 }
303 
306  return false;
307  return true;
308 }
309 
311  if (const BasicBlock *LBB = getBasicBlock())
312  return LBB->getName();
313  else
314  return StringRef("", 0);
315 }
316 
317 /// Return a hopefully unique identifier for this block.
318 std::string MachineBasicBlock::getFullName() const {
319  std::string Name;
320  if (getParent())
321  Name = (getParent()->getName() + ":").str();
322  if (getBasicBlock())
323  Name += getBasicBlock()->getName();
324  else
325  Name += ("BB" + Twine(getNumber())).str();
326  return Name;
327 }
328 
330  bool IsStandalone) const {
331  const MachineFunction *MF = getParent();
332  if (!MF) {
333  OS << "Can't print out MachineBasicBlock because parent MachineFunction"
334  << " is null\n";
335  return;
336  }
337  const Function &F = MF->getFunction();
338  const Module *M = F.getParent();
339  ModuleSlotTracker MST(M);
340  MST.incorporateFunction(F);
341  print(OS, MST, Indexes, IsStandalone);
342 }
343 
345  const SlotIndexes *Indexes,
346  bool IsStandalone) const {
347  const MachineFunction *MF = getParent();
348  if (!MF) {
349  OS << "Can't print out MachineBasicBlock because parent MachineFunction"
350  << " is null\n";
351  return;
352  }
353 
354  if (Indexes && PrintSlotIndexes)
355  OS << Indexes->getMBBStartIdx(this) << '\t';
356 
358  OS << ":\n";
359 
361  const MachineRegisterInfo &MRI = MF->getRegInfo();
363  bool HasLineAttributes = false;
364 
365  // Print the preds of this block according to the CFG.
366  if (!pred_empty() && IsStandalone) {
367  if (Indexes) OS << '\t';
368  // Don't indent(2), align with previous line attributes.
369  OS << "; predecessors: ";
370  ListSeparator LS;
371  for (auto *Pred : predecessors())
372  OS << LS << printMBBReference(*Pred);
373  OS << '\n';
374  HasLineAttributes = true;
375  }
376 
377  if (!succ_empty()) {
378  if (Indexes) OS << '\t';
379  // Print the successors
380  OS.indent(2) << "successors: ";
381  ListSeparator LS;
382  for (auto I = succ_begin(), E = succ_end(); I != E; ++I) {
383  OS << LS << printMBBReference(**I);
384  if (!Probs.empty())
385  OS << '('
386  << format("0x%08" PRIx32, getSuccProbability(I).getNumerator())
387  << ')';
388  }
389  if (!Probs.empty() && IsStandalone) {
390  // Print human readable probabilities as comments.
391  OS << "; ";
392  ListSeparator LS;
393  for (auto I = succ_begin(), E = succ_end(); I != E; ++I) {
395  OS << LS << printMBBReference(**I) << '('
396  << format("%.2f%%",
397  rint(((double)BP.getNumerator() / BP.getDenominator()) *
398  100.0 * 100.0) /
399  100.0)
400  << ')';
401  }
402  }
403 
404  OS << '\n';
405  HasLineAttributes = true;
406  }
407 
408  if (!livein_empty() && MRI.tracksLiveness()) {
409  if (Indexes) OS << '\t';
410  OS.indent(2) << "liveins: ";
411 
412  ListSeparator LS;
413  for (const auto &LI : liveins()) {
414  OS << LS << printReg(LI.PhysReg, TRI);
415  if (!LI.LaneMask.all())
416  OS << ":0x" << PrintLaneMask(LI.LaneMask);
417  }
418  HasLineAttributes = true;
419  }
420 
421  if (HasLineAttributes)
422  OS << '\n';
423 
424  bool IsInBundle = false;
425  for (const MachineInstr &MI : instrs()) {
426  if (Indexes && PrintSlotIndexes) {
427  if (Indexes->hasIndex(MI))
428  OS << Indexes->getInstructionIndex(MI);
429  OS << '\t';
430  }
431 
432  if (IsInBundle && !MI.isInsideBundle()) {
433  OS.indent(2) << "}\n";
434  IsInBundle = false;
435  }
436 
437  OS.indent(IsInBundle ? 4 : 2);
438  MI.print(OS, MST, IsStandalone, /*SkipOpers=*/false, /*SkipDebugLoc=*/false,
439  /*AddNewLine=*/false, &TII);
440 
441  if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
442  OS << " {";
443  IsInBundle = true;
444  }
445  OS << '\n';
446  }
447 
448  if (IsInBundle)
449  OS.indent(2) << "}\n";
450 
451  if (IrrLoopHeaderWeight && IsStandalone) {
452  if (Indexes) OS << '\t';
453  OS.indent(2) << "; Irreducible loop header weight: "
454  << IrrLoopHeaderWeight.getValue() << '\n';
455  }
456 }
457 
458 /// Print the basic block's name as:
459 ///
460 /// bb.{number}[.{ir-name}] [(attributes...)]
461 ///
462 /// The {ir-name} is only printed when the \ref PrintNameIr flag is passed
463 /// (which is the default). If the IR block has no name, it is identified
464 /// numerically using the attribute syntax as "(%ir-block.{ir-slot})".
465 ///
466 /// When the \ref PrintNameAttributes flag is passed, additional attributes
467 /// of the block are printed when set.
468 ///
469 /// \param printNameFlags Combination of \ref PrintNameFlag flags indicating
470 /// the parts to print.
471 /// \param moduleSlotTracker Optional ModuleSlotTracker. This method will
472 /// incorporate its own tracker when necessary to
473 /// determine the block's IR name.
474 void MachineBasicBlock::printName(raw_ostream &os, unsigned printNameFlags,
475  ModuleSlotTracker *moduleSlotTracker) const {
476  os << "bb." << getNumber();
477  bool hasAttributes = false;
478 
479  if (printNameFlags & PrintNameIr) {
480  if (const auto *bb = getBasicBlock()) {
481  if (bb->hasName()) {
482  os << '.' << bb->getName();
483  } else {
484  hasAttributes = true;
485  os << " (";
486 
487  int slot = -1;
488 
489  if (moduleSlotTracker) {
490  slot = moduleSlotTracker->getLocalSlot(bb);
491  } else if (bb->getParent()) {
492  ModuleSlotTracker tmpTracker(bb->getModule(), false);
493  tmpTracker.incorporateFunction(*bb->getParent());
494  slot = tmpTracker.getLocalSlot(bb);
495  }
496 
497  if (slot == -1)
498  os << "<ir-block badref>";
499  else
500  os << (Twine("%ir-block.") + Twine(slot)).str();
501  }
502  }
503  }
504 
505  if (printNameFlags & PrintNameAttributes) {
506  if (hasAddressTaken()) {
507  os << (hasAttributes ? ", " : " (");
508  os << "address-taken";
509  hasAttributes = true;
510  }
511  if (isEHPad()) {
512  os << (hasAttributes ? ", " : " (");
513  os << "landing-pad";
514  hasAttributes = true;
515  }
517  os << (hasAttributes ? ", " : " (");
518  os << "inlineasm-br-indirect-target";
519  hasAttributes = true;
520  }
521  if (isEHFuncletEntry()) {
522  os << (hasAttributes ? ", " : " (");
523  os << "ehfunclet-entry";
524  hasAttributes = true;
525  }
526  if (getAlignment() != Align(1)) {
527  os << (hasAttributes ? ", " : " (");
528  os << "align " << getAlignment().value();
529  hasAttributes = true;
530  }
531  if (getSectionID() != MBBSectionID(0)) {
532  os << (hasAttributes ? ", " : " (");
533  os << "bbsections ";
534  switch (getSectionID().Type) {
535  case MBBSectionID::SectionType::Exception:
536  os << "Exception";
537  break;
539  os << "Cold";
540  break;
541  default:
542  os << getSectionID().Number;
543  }
544  hasAttributes = true;
545  }
546  }
547 
548  if (hasAttributes)
549  os << ')';
550 }
551 
553  bool /*PrintType*/) const {
554  OS << '%';
555  printName(OS, 0);
556 }
557 
559  LiveInVector::iterator I = find_if(
560  LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
561  if (I == LiveIns.end())
562  return;
563 
564  I->LaneMask &= ~LaneMask;
565  if (I->LaneMask.none())
566  LiveIns.erase(I);
567 }
568 
571  // Get non-const version of iterator.
572  LiveInVector::iterator LI = LiveIns.begin() + (I - LiveIns.begin());
573  return LiveIns.erase(LI);
574 }
575 
578  LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
579  return I != livein_end() && (I->LaneMask & LaneMask).any();
580 }
581 
583  llvm::sort(LiveIns,
584  [](const RegisterMaskPair &LI0, const RegisterMaskPair &LI1) {
585  return LI0.PhysReg < LI1.PhysReg;
586  });
587  // Liveins are sorted by physreg now we can merge their lanemasks.
588  LiveInVector::const_iterator I = LiveIns.begin();
589  LiveInVector::const_iterator J;
590  LiveInVector::iterator Out = LiveIns.begin();
591  for (; I != LiveIns.end(); ++Out, I = J) {
592  MCRegister PhysReg = I->PhysReg;
593  LaneBitmask LaneMask = I->LaneMask;
594  for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
595  LaneMask |= J->LaneMask;
596  Out->PhysReg = PhysReg;
597  Out->LaneMask = LaneMask;
598  }
599  LiveIns.erase(Out, LiveIns.end());
600 }
601 
602 Register
604  assert(getParent() && "MBB must be inserted in function");
605  assert(Register::isPhysicalRegister(PhysReg) && "Expected physreg");
606  assert(RC && "Register class is required");
607  assert((isEHPad() || this == &getParent()->front()) &&
608  "Only the entry block and landing pads can have physreg live ins");
609 
610  bool LiveIn = isLiveIn(PhysReg);
614 
615  // Look for an existing copy.
616  if (LiveIn)
617  for (;I != E && I->isCopy(); ++I)
618  if (I->getOperand(1).getReg() == PhysReg) {
619  Register VirtReg = I->getOperand(0).getReg();
620  if (!MRI.constrainRegClass(VirtReg, RC))
621  llvm_unreachable("Incompatible live-in register class.");
622  return VirtReg;
623  }
624 
625  // No luck, create a virtual register.
626  Register VirtReg = MRI.createVirtualRegister(RC);
627  BuildMI(*this, I, DebugLoc(), TII.get(TargetOpcode::COPY), VirtReg)
628  .addReg(PhysReg, RegState::Kill);
629  if (!LiveIn)
630  addLiveIn(PhysReg);
631  return VirtReg;
632 }
633 
635  getParent()->splice(NewAfter->getIterator(), getIterator());
636 }
637 
639  getParent()->splice(++NewBefore->getIterator(), getIterator());
640 }
641 
643  MachineBasicBlock *PreviousLayoutSuccessor) {
644  LLVM_DEBUG(dbgs() << "Updating terminators on " << printMBBReference(*this)
645  << "\n");
646 
648  // A block with no successors has no concerns with fall-through edges.
649  if (this->succ_empty())
650  return;
651 
652  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
655  bool B = TII->analyzeBranch(*this, TBB, FBB, Cond);
656  (void) B;
657  assert(!B && "UpdateTerminators requires analyzable predecessors!");
658  if (Cond.empty()) {
659  if (TBB) {
660  // The block has an unconditional branch. If its successor is now its
661  // layout successor, delete the branch.
662  if (isLayoutSuccessor(TBB))
663  TII->removeBranch(*this);
664  } else {
665  // The block has an unconditional fallthrough, or the end of the block is
666  // unreachable.
667 
668  // Unfortunately, whether the end of the block is unreachable is not
669  // immediately obvious; we must fall back to checking the successor list,
670  // and assuming that if the passed in block is in the succesor list and
671  // not an EHPad, it must be the intended target.
672  if (!PreviousLayoutSuccessor || !isSuccessor(PreviousLayoutSuccessor) ||
673  PreviousLayoutSuccessor->isEHPad())
674  return;
675 
676  // If the unconditional successor block is not the current layout
677  // successor, insert a branch to jump to it.
678  if (!isLayoutSuccessor(PreviousLayoutSuccessor))
679  TII->insertBranch(*this, PreviousLayoutSuccessor, nullptr, Cond, DL);
680  }
681  return;
682  }
683 
684  if (FBB) {
685  // The block has a non-fallthrough conditional branch. If one of its
686  // successors is its layout successor, rewrite it to a fallthrough
687  // conditional branch.
688  if (isLayoutSuccessor(TBB)) {
690  return;
691  TII->removeBranch(*this);
692  TII->insertBranch(*this, FBB, nullptr, Cond, DL);
693  } else if (isLayoutSuccessor(FBB)) {
694  TII->removeBranch(*this);
695  TII->insertBranch(*this, TBB, nullptr, Cond, DL);
696  }
697  return;
698  }
699 
700  // We now know we're going to fallthrough to PreviousLayoutSuccessor.
701  assert(PreviousLayoutSuccessor);
702  assert(!PreviousLayoutSuccessor->isEHPad());
703  assert(isSuccessor(PreviousLayoutSuccessor));
704 
705  if (PreviousLayoutSuccessor == TBB) {
706  // We had a fallthrough to the same basic block as the conditional jump
707  // targets. Remove the conditional jump, leaving an unconditional
708  // fallthrough or an unconditional jump.
709  TII->removeBranch(*this);
710  if (!isLayoutSuccessor(TBB)) {
711  Cond.clear();
712  TII->insertBranch(*this, TBB, nullptr, Cond, DL);
713  }
714  return;
715  }
716 
717  // The block has a fallthrough conditional branch.
718  if (isLayoutSuccessor(TBB)) {
720  // We can't reverse the condition, add an unconditional branch.
721  Cond.clear();
722  TII->insertBranch(*this, PreviousLayoutSuccessor, nullptr, Cond, DL);
723  return;
724  }
725  TII->removeBranch(*this);
726  TII->insertBranch(*this, PreviousLayoutSuccessor, nullptr, Cond, DL);
727  } else if (!isLayoutSuccessor(PreviousLayoutSuccessor)) {
728  TII->removeBranch(*this);
729  TII->insertBranch(*this, TBB, PreviousLayoutSuccessor, Cond, DL);
730  }
731 }
732 
734 #ifndef NDEBUG
735  int64_t Sum = 0;
736  for (auto Prob : Probs)
737  Sum += Prob.getNumerator();
738  // Due to precision issue, we assume that the sum of probabilities is one if
739  // the difference between the sum of their numerators and the denominator is
740  // no greater than the number of successors.
742  Probs.size() &&
743  "The sum of successors's probabilities exceeds one.");
744 #endif // NDEBUG
745 }
746 
748  BranchProbability Prob) {
749  // Probability list is either empty (if successor list isn't empty, this means
750  // disabled optimization) or has the same size as successor list.
751  if (!(Probs.empty() && !Successors.empty()))
752  Probs.push_back(Prob);
753  Successors.push_back(Succ);
754  Succ->addPredecessor(this);
755 }
756 
758  // We need to make sure probability list is either empty or has the same size
759  // of successor list. When this function is called, we can safely delete all
760  // probability in the list.
761  Probs.clear();
762  Successors.push_back(Succ);
763  Succ->addPredecessor(this);
764 }
765 
767  MachineBasicBlock *New,
768  bool NormalizeSuccProbs) {
769  succ_iterator OldI = llvm::find(successors(), Old);
770  assert(OldI != succ_end() && "Old is not a successor of this block!");
772  "New is already a successor of this block!");
773 
774  // Add a new successor with equal probability as the original one. Note
775  // that we directly copy the probability using the iterator rather than
776  // getting a potentially synthetic probability computed when unknown. This
777  // preserves the probabilities as-is and then we can renormalize them and
778  // query them effectively afterward.
779  addSuccessor(New, Probs.empty() ? BranchProbability::getUnknown()
780  : *getProbabilityIterator(OldI));
781  if (NormalizeSuccProbs)
783 }
784 
786  bool NormalizeSuccProbs) {
787  succ_iterator I = find(Successors, Succ);
788  removeSuccessor(I, NormalizeSuccProbs);
789 }
790 
793  assert(I != Successors.end() && "Not a current successor!");
794 
795  // If probability list is empty it means we don't use it (disabled
796  // optimization).
797  if (!Probs.empty()) {
798  probability_iterator WI = getProbabilityIterator(I);
799  Probs.erase(WI);
800  if (NormalizeSuccProbs)
802  }
803 
804  (*I)->removePredecessor(this);
805  return Successors.erase(I);
806 }
807 
809  MachineBasicBlock *New) {
810  if (Old == New)
811  return;
812 
814  succ_iterator NewI = E;
815  succ_iterator OldI = E;
816  for (succ_iterator I = succ_begin(); I != E; ++I) {
817  if (*I == Old) {
818  OldI = I;
819  if (NewI != E)
820  break;
821  }
822  if (*I == New) {
823  NewI = I;
824  if (OldI != E)
825  break;
826  }
827  }
828  assert(OldI != E && "Old is not a successor of this block");
829 
830  // If New isn't already a successor, let it take Old's place.
831  if (NewI == E) {
832  Old->removePredecessor(this);
833  New->addPredecessor(this);
834  *OldI = New;
835  return;
836  }
837 
838  // New is already a successor.
839  // Update its probability instead of adding a duplicate edge.
840  if (!Probs.empty()) {
841  auto ProbIter = getProbabilityIterator(NewI);
842  if (!ProbIter->isUnknown())
843  *ProbIter += *getProbabilityIterator(OldI);
844  }
845  removeSuccessor(OldI);
846 }
847 
849  succ_iterator I) {
850  if (!Orig->Probs.empty())
852  else
854 }
855 
856 void MachineBasicBlock::addPredecessor(MachineBasicBlock *Pred) {
857  Predecessors.push_back(Pred);
858 }
859 
860 void MachineBasicBlock::removePredecessor(MachineBasicBlock *Pred) {
861  pred_iterator I = find(Predecessors, Pred);
862  assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");
863  Predecessors.erase(I);
864 }
865 
867  if (this == FromMBB)
868  return;
869 
870  while (!FromMBB->succ_empty()) {
871  MachineBasicBlock *Succ = *FromMBB->succ_begin();
872 
873  // If probability list is empty it means we don't use it (disabled
874  // optimization).
875  if (!FromMBB->Probs.empty()) {
876  auto Prob = *FromMBB->Probs.begin();
877  addSuccessor(Succ, Prob);
878  } else
880 
881  FromMBB->removeSuccessor(Succ);
882  }
883 }
884 
885 void
887  if (this == FromMBB)
888  return;
889 
890  while (!FromMBB->succ_empty()) {
891  MachineBasicBlock *Succ = *FromMBB->succ_begin();
892  if (!FromMBB->Probs.empty()) {
893  auto Prob = *FromMBB->Probs.begin();
894  addSuccessor(Succ, Prob);
895  } else
897  FromMBB->removeSuccessor(Succ);
898 
899  // Fix up any PHI nodes in the successor.
900  Succ->replacePhiUsesWith(FromMBB, this);
901  }
903 }
904 
906  return is_contained(predecessors(), MBB);
907 }
908 
910  return is_contained(successors(), MBB);
911 }
912 
915  return std::next(I) == MachineFunction::const_iterator(MBB);
916 }
917 
919  MachineFunction::iterator Fallthrough = getIterator();
920  ++Fallthrough;
921  // If FallthroughBlock is off the end of the function, it can't fall through.
922  if (Fallthrough == getParent()->end())
923  return nullptr;
924 
925  // If FallthroughBlock isn't a successor, no fallthrough is possible.
926  if (!isSuccessor(&*Fallthrough))
927  return nullptr;
928 
929  // Analyze the branches, if any, at the end of the block.
930  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
933  if (TII->analyzeBranch(*this, TBB, FBB, Cond)) {
934  // If we couldn't analyze the branch, examine the last instruction.
935  // If the block doesn't end in a known control barrier, assume fallthrough
936  // is possible. The isPredicated check is needed because this code can be
937  // called during IfConversion, where an instruction which is normally a
938  // Barrier is predicated and thus no longer an actual control barrier.
939  return (empty() || !back().isBarrier() || TII->isPredicated(back()))
940  ? &*Fallthrough
941  : nullptr;
942  }
943 
944  // If there is no branch, control always falls through.
945  if (!TBB) return &*Fallthrough;
946 
947  // If there is some explicit branch to the fallthrough block, it can obviously
948  // reach, even though the branch should get folded to fall through implicitly.
949  if (MachineFunction::iterator(TBB) == Fallthrough ||
950  MachineFunction::iterator(FBB) == Fallthrough)
951  return &*Fallthrough;
952 
953  // If it's an unconditional branch to some block not the fall through, it
954  // doesn't fall through.
955  if (Cond.empty()) return nullptr;
956 
957  // Otherwise, if it is conditional and has no explicit false block, it falls
958  // through.
959  return (FBB == nullptr) ? &*Fallthrough : nullptr;
960 }
961 
963  return getFallThrough() != nullptr;
964 }
965 
967  bool UpdateLiveIns,
968  LiveIntervals *LIS) {
969  MachineBasicBlock::iterator SplitPoint(&MI);
970  ++SplitPoint;
971 
972  if (SplitPoint == end()) {
973  // Don't bother with a new block.
974  return this;
975  }
976 
977  MachineFunction *MF = getParent();
978 
979  LivePhysRegs LiveRegs;
980  if (UpdateLiveIns) {
981  // Make sure we add any physregs we define in the block as liveins to the
982  // new block.
984  LiveRegs.init(*MF->getSubtarget().getRegisterInfo());
985  LiveRegs.addLiveOuts(*this);
986  for (auto I = rbegin(), E = Prev.getReverse(); I != E; ++I)
987  LiveRegs.stepBackward(*I);
988  }
989 
991 
992  MF->insert(++MachineFunction::iterator(this), SplitBB);
993  SplitBB->splice(SplitBB->begin(), this, SplitPoint, end());
994 
995  SplitBB->transferSuccessorsAndUpdatePHIs(this);
996  addSuccessor(SplitBB);
997 
998  if (UpdateLiveIns)
999  addLiveIns(*SplitBB, LiveRegs);
1000 
1001  if (LIS)
1002  LIS->insertMBBInMaps(SplitBB);
1003 
1004  return SplitBB;
1005 }
1006 
1008  MachineBasicBlock *Succ, Pass &P,
1009  std::vector<SparseBitVector<>> *LiveInSets) {
1010  if (!canSplitCriticalEdge(Succ))
1011  return nullptr;
1012 
1013  MachineFunction *MF = getParent();
1014  MachineBasicBlock *PrevFallthrough = getNextNode();
1015  DebugLoc DL; // FIXME: this is nowhere
1016 
1018  MF->insert(std::next(MachineFunction::iterator(this)), NMBB);
1019  LLVM_DEBUG(dbgs() << "Splitting critical edge: " << printMBBReference(*this)
1020  << " -- " << printMBBReference(*NMBB) << " -- "
1021  << printMBBReference(*Succ) << '\n');
1022 
1023  LiveIntervals *LIS = P.getAnalysisIfAvailable<LiveIntervals>();
1024  SlotIndexes *Indexes = P.getAnalysisIfAvailable<SlotIndexes>();
1025  if (LIS)
1026  LIS->insertMBBInMaps(NMBB);
1027  else if (Indexes)
1028  Indexes->insertMBBInMaps(NMBB);
1029 
1030  // On some targets like Mips, branches may kill virtual registers. Make sure
1031  // that LiveVariables is properly updated after updateTerminator replaces the
1032  // terminators.
1033  LiveVariables *LV = P.getAnalysisIfAvailable<LiveVariables>();
1034 
1035  // Collect a list of virtual registers killed by the terminators.
1036  SmallVector<Register, 4> KilledRegs;
1037  if (LV)
1038  for (MachineInstr &MI :
1040  for (MachineOperand &MO : MI.operands()) {
1041  if (!MO.isReg() || MO.getReg() == 0 || !MO.isUse() || !MO.isKill() ||
1042  MO.isUndef())
1043  continue;
1044  Register Reg = MO.getReg();
1046  LV->getVarInfo(Reg).removeKill(MI)) {
1047  KilledRegs.push_back(Reg);
1048  LLVM_DEBUG(dbgs() << "Removing terminator kill: " << MI);
1049  MO.setIsKill(false);
1050  }
1051  }
1052  }
1053 
1054  SmallVector<Register, 4> UsedRegs;
1055  if (LIS) {
1056  for (MachineInstr &MI :
1058  for (const MachineOperand &MO : MI.operands()) {
1059  if (!MO.isReg() || MO.getReg() == 0)
1060  continue;
1061 
1062  Register Reg = MO.getReg();
1063  if (!is_contained(UsedRegs, Reg))
1064  UsedRegs.push_back(Reg);
1065  }
1066  }
1067  }
1068 
1069  ReplaceUsesOfBlockWith(Succ, NMBB);
1070 
1071  // If updateTerminator() removes instructions, we need to remove them from
1072  // SlotIndexes.
1073  SmallVector<MachineInstr*, 4> Terminators;
1074  if (Indexes) {
1075  for (MachineInstr &MI :
1077  Terminators.push_back(&MI);
1078  }
1079 
1080  // Since we replaced all uses of Succ with NMBB, that should also be treated
1081  // as the fallthrough successor
1082  if (Succ == PrevFallthrough)
1083  PrevFallthrough = NMBB;
1084  updateTerminator(PrevFallthrough);
1085 
1086  if (Indexes) {
1087  SmallVector<MachineInstr*, 4> NewTerminators;
1088  for (MachineInstr &MI :
1090  NewTerminators.push_back(&MI);
1091 
1092  for (MachineInstr *Terminator : Terminators) {
1093  if (!is_contained(NewTerminators, Terminator))
1094  Indexes->removeMachineInstrFromMaps(*Terminator);
1095  }
1096  }
1097 
1098  // Insert unconditional "jump Succ" instruction in NMBB if necessary.
1099  NMBB->addSuccessor(Succ);
1100  if (!NMBB->isLayoutSuccessor(Succ)) {
1103  TII->insertBranch(*NMBB, Succ, nullptr, Cond, DL);
1104 
1105  if (Indexes) {
1106  for (MachineInstr &MI : NMBB->instrs()) {
1107  // Some instructions may have been moved to NMBB by updateTerminator(),
1108  // so we first remove any instruction that already has an index.
1109  if (Indexes->hasIndex(MI))
1110  Indexes->removeMachineInstrFromMaps(MI);
1111  Indexes->insertMachineInstrInMaps(MI);
1112  }
1113  }
1114  }
1115 
1116  // Fix PHI nodes in Succ so they refer to NMBB instead of this.
1117  Succ->replacePhiUsesWith(this, NMBB);
1118 
1119  // Inherit live-ins from the successor
1120  for (const auto &LI : Succ->liveins())
1121  NMBB->addLiveIn(LI);
1122 
1123  // Update LiveVariables.
1125  if (LV) {
1126  // Restore kills of virtual registers that were killed by the terminators.
1127  while (!KilledRegs.empty()) {
1128  Register Reg = KilledRegs.pop_back_val();
1129  for (instr_iterator I = instr_end(), E = instr_begin(); I != E;) {
1130  if (!(--I)->addRegisterKilled(Reg, TRI, /* AddIfNotFound= */ false))
1131  continue;
1133  LV->getVarInfo(Reg).Kills.push_back(&*I);
1134  LLVM_DEBUG(dbgs() << "Restored terminator kill: " << *I);
1135  break;
1136  }
1137  }
1138  // Update relevant live-through information.
1139  if (LiveInSets != nullptr)
1140  LV->addNewBlock(NMBB, this, Succ, *LiveInSets);
1141  else
1142  LV->addNewBlock(NMBB, this, Succ);
1143  }
1144 
1145  if (LIS) {
1146  // After splitting the edge and updating SlotIndexes, live intervals may be
1147  // in one of two situations, depending on whether this block was the last in
1148  // the function. If the original block was the last in the function, all
1149  // live intervals will end prior to the beginning of the new split block. If
1150  // the original block was not at the end of the function, all live intervals
1151  // will extend to the end of the new split block.
1152 
1153  bool isLastMBB =
1154  std::next(MachineFunction::iterator(NMBB)) == getParent()->end();
1155 
1156  SlotIndex StartIndex = Indexes->getMBBEndIdx(this);
1157  SlotIndex PrevIndex = StartIndex.getPrevSlot();
1158  SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
1159 
1160  // Find the registers used from NMBB in PHIs in Succ.
1161  SmallSet<Register, 8> PHISrcRegs;
1163  I = Succ->instr_begin(), E = Succ->instr_end();
1164  I != E && I->isPHI(); ++I) {
1165  for (unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {
1166  if (I->getOperand(ni+1).getMBB() == NMBB) {
1167  MachineOperand &MO = I->getOperand(ni);
1168  Register Reg = MO.getReg();
1169  PHISrcRegs.insert(Reg);
1170  if (MO.isUndef())
1171  continue;
1172 
1173  LiveInterval &LI = LIS->getInterval(Reg);
1174  VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
1175  assert(VNI &&
1176  "PHI sources should be live out of their predecessors.");
1177  LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
1178  }
1179  }
1180  }
1181 
1183  for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
1185  if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg))
1186  continue;
1187 
1188  LiveInterval &LI = LIS->getInterval(Reg);
1189  if (!LI.liveAt(PrevIndex))
1190  continue;
1191 
1192  bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ));
1193  if (isLiveOut && isLastMBB) {
1194  VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
1195  assert(VNI && "LiveInterval should have VNInfo where it is live.");
1196  LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
1197  } else if (!isLiveOut && !isLastMBB) {
1198  LI.removeSegment(StartIndex, EndIndex);
1199  }
1200  }
1201 
1202  // Update all intervals for registers whose uses may have been modified by
1203  // updateTerminator().
1204  LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs);
1205  }
1206 
1207  if (MachineDominatorTree *MDT =
1208  P.getAnalysisIfAvailable<MachineDominatorTree>())
1209  MDT->recordSplitCriticalEdge(this, Succ, NMBB);
1210 
1211  if (MachineLoopInfo *MLI = P.getAnalysisIfAvailable<MachineLoopInfo>())
1212  if (MachineLoop *TIL = MLI->getLoopFor(this)) {
1213  // If one or the other blocks were not in a loop, the new block is not
1214  // either, and thus LI doesn't need to be updated.
1215  if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
1216  if (TIL == DestLoop) {
1217  // Both in the same loop, the NMBB joins loop.
1218  DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1219  } else if (TIL->contains(DestLoop)) {
1220  // Edge from an outer loop to an inner loop. Add to the outer loop.
1221  TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
1222  } else if (DestLoop->contains(TIL)) {
1223  // Edge from an inner loop to an outer loop. Add to the outer loop.
1224  DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1225  } else {
1226  // Edge from two loops with no containment relation. Because these
1227  // are natural loops, we know that the destination block must be the
1228  // header of its loop (adding a branch into a loop elsewhere would
1229  // create an irreducible loop).
1230  assert(DestLoop->getHeader() == Succ &&
1231  "Should not create irreducible loops!");
1232  if (MachineLoop *P = DestLoop->getParentLoop())
1233  P->addBasicBlockToLoop(NMBB, MLI->getBase());
1234  }
1235  }
1236  }
1237 
1238  return NMBB;
1239 }
1240 
1242  const MachineBasicBlock *Succ) const {
1243  // Splitting the critical edge to a landing pad block is non-trivial. Don't do
1244  // it in this generic function.
1245  if (Succ->isEHPad())
1246  return false;
1247 
1248  // Splitting the critical edge to a callbr's indirect block isn't advised.
1249  // Don't do it in this generic function.
1250  if (Succ->isInlineAsmBrIndirectTarget())
1251  return false;
1252 
1253  const MachineFunction *MF = getParent();
1254  // Performance might be harmed on HW that implements branching using exec mask
1255  // where both sides of the branches are always executed.
1256  if (MF->getTarget().requiresStructuredCFG())
1257  return false;
1258 
1259  // We may need to update this's terminator, but we can't do that if
1260  // analyzeBranch fails. If this uses a jump table, we won't touch it.
1261  const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
1262  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1264  // AnalyzeBanch should modify this, since we did not allow modification.
1265  if (TII->analyzeBranch(*const_cast<MachineBasicBlock *>(this), TBB, FBB, Cond,
1266  /*AllowModify*/ false))
1267  return false;
1268 
1269  // Avoid bugpoint weirdness: A block may end with a conditional branch but
1270  // jumps to the same MBB is either case. We have duplicate CFG edges in that
1271  // case that we can't handle. Since this never happens in properly optimized
1272  // code, just skip those edges.
1273  if (TBB && TBB == FBB) {
1274  LLVM_DEBUG(dbgs() << "Won't split critical edge after degenerate "
1275  << printMBBReference(*this) << '\n');
1276  return false;
1277  }
1278  return true;
1279 }
1280 
1281 /// Prepare MI to be removed from its bundle. This fixes bundle flags on MI's
1282 /// neighboring instructions so the bundle won't be broken by removing MI.
1284  // Removing the first instruction in a bundle.
1285  if (MI->isBundledWithSucc() && !MI->isBundledWithPred())
1286  MI->unbundleFromSucc();
1287  // Removing the last instruction in a bundle.
1288  if (MI->isBundledWithPred() && !MI->isBundledWithSucc())
1289  MI->unbundleFromPred();
1290  // If MI is not bundled, or if it is internal to a bundle, the neighbor flags
1291  // are already fine.
1292 }
1293 
1296  unbundleSingleMI(&*I);
1297  return Insts.erase(I);
1298 }
1299 
1302  MI->clearFlag(MachineInstr::BundledPred);
1303  MI->clearFlag(MachineInstr::BundledSucc);
1304  return Insts.remove(MI);
1305 }
1306 
1309  assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&
1310  "Cannot insert instruction with bundle flags");
1311  // Set the bundle flags when inserting inside a bundle.
1312  if (I != instr_end() && I->isBundledWithPred()) {
1313  MI->setFlag(MachineInstr::BundledPred);
1314  MI->setFlag(MachineInstr::BundledSucc);
1315  }
1316  return Insts.insert(I, MI);
1317 }
1318 
1319 /// This method unlinks 'this' from the containing function, and returns it, but
1320 /// does not delete it.
1322  assert(getParent() && "Not embedded in a function!");
1323  getParent()->remove(this);
1324  return this;
1325 }
1326 
1327 /// This method unlinks 'this' from the containing function, and deletes it.
1329  assert(getParent() && "Not embedded in a function!");
1330  getParent()->erase(this);
1331 }
1332 
1333 /// Given a machine basic block that branched to 'Old', change the code and CFG
1334 /// so that it branches to 'New' instead.
1336  MachineBasicBlock *New) {
1337  assert(Old != New && "Cannot replace self with self!");
1338 
1340  while (I != instr_begin()) {
1341  --I;
1342  if (!I->isTerminator()) break;
1343 
1344  // Scan the operands of this machine instruction, replacing any uses of Old
1345  // with New.
1346  for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
1347  if (I->getOperand(i).isMBB() &&
1348  I->getOperand(i).getMBB() == Old)
1349  I->getOperand(i).setMBB(New);
1350  }
1351 
1352  // Update the successor information.
1353  replaceSuccessor(Old, New);
1354 }
1355 
1357  MachineBasicBlock *New) {
1358  for (MachineInstr &MI : phis())
1359  for (unsigned i = 2, e = MI.getNumOperands() + 1; i != e; i += 2) {
1360  MachineOperand &MO = MI.getOperand(i);
1361  if (MO.getMBB() == Old)
1362  MO.setMBB(New);
1363  }
1364 }
1365 
1366 /// Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE
1367 /// instructions. Return UnknownLoc if there is none.
1368 DebugLoc
1370  // Skip debug declarations, we don't want a DebugLoc from them.
1372  if (MBBI != instr_end())
1373  return MBBI->getDebugLoc();
1374  return {};
1375 }
1376 
1378  // Skip debug declarations, we don't want a DebugLoc from them.
1380  if (!MBBI->isDebugInstr())
1381  return MBBI->getDebugLoc();
1382  return {};
1383 }
1384 
1385 /// Find the previous valid DebugLoc preceding MBBI, skipping and DBG_VALUE
1386 /// instructions. Return UnknownLoc if there is none.
1388  if (MBBI == instr_begin()) return {};
1389  // Skip debug instructions, we don't want a DebugLoc from them.
1391  if (!MBBI->isDebugInstr()) return MBBI->getDebugLoc();
1392  return {};
1393 }
1394 
1396  if (MBBI == instr_rend())
1397  return {};
1398  // Skip debug declarations, we don't want a DebugLoc from them.
1400  if (MBBI != instr_rend())
1401  return MBBI->getDebugLoc();
1402  return {};
1403 }
1404 
1405 /// Find and return the merged DebugLoc of the branch instructions of the block.
1406 /// Return UnknownLoc if there is none.
1407 DebugLoc
1409  DebugLoc DL;
1410  auto TI = getFirstTerminator();
1411  while (TI != end() && !TI->isBranch())
1412  ++TI;
1413 
1414  if (TI != end()) {
1415  DL = TI->getDebugLoc();
1416  for (++TI ; TI != end() ; ++TI)
1417  if (TI->isBranch())
1418  DL = DILocation::getMergedLocation(DL, TI->getDebugLoc());
1419  }
1420  return DL;
1421 }
1422 
1423 /// Return probability of the edge from this block to MBB.
1426  if (Probs.empty())
1427  return BranchProbability(1, succ_size());
1428 
1429  const auto &Prob = *getProbabilityIterator(Succ);
1430  if (Prob.isUnknown()) {
1431  // For unknown probabilities, collect the sum of all known ones, and evenly
1432  // ditribute the complemental of the sum to each unknown probability.
1433  unsigned KnownProbNum = 0;
1434  auto Sum = BranchProbability::getZero();
1435  for (auto &P : Probs) {
1436  if (!P.isUnknown()) {
1437  Sum += P;
1438  KnownProbNum++;
1439  }
1440  }
1441  return Sum.getCompl() / (Probs.size() - KnownProbNum);
1442  } else
1443  return Prob;
1444 }
1445 
1446 /// Set successor probability of a given iterator.
1448  BranchProbability Prob) {
1449  assert(!Prob.isUnknown());
1450  if (Probs.empty())
1451  return;
1452  *getProbabilityIterator(I) = Prob;
1453 }
1454 
1455 /// Return probability iterator corresonding to the I successor iterator
1456 MachineBasicBlock::const_probability_iterator
1457 MachineBasicBlock::getProbabilityIterator(
1459  assert(Probs.size() == Successors.size() && "Async probability list!");
1460  const size_t index = std::distance(Successors.begin(), I);
1461  assert(index < Probs.size() && "Not a current successor!");
1462  return Probs.begin() + index;
1463 }
1464 
1465 /// Return probability iterator corresonding to the I successor iterator.
1466 MachineBasicBlock::probability_iterator
1467 MachineBasicBlock::getProbabilityIterator(MachineBasicBlock::succ_iterator I) {
1468  assert(Probs.size() == Successors.size() && "Async probability list!");
1469  const size_t index = std::distance(Successors.begin(), I);
1470  assert(index < Probs.size() && "Not a current successor!");
1471  return Probs.begin() + index;
1472 }
1473 
1474 /// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed
1475 /// as of just before "MI".
1476 ///
1477 /// Search is localised to a neighborhood of
1478 /// Neighborhood instructions before (searching for defs or kills) and N
1479 /// instructions after (searching just for defs) MI.
1482  MCRegister Reg, const_iterator Before,
1483  unsigned Neighborhood) const {
1484  unsigned N = Neighborhood;
1485 
1486  // Try searching forwards from Before, looking for reads or defs.
1487  const_iterator I(Before);
1488  for (; I != end() && N > 0; ++I) {
1489  if (I->isDebugOrPseudoInstr())
1490  continue;
1491 
1492  --N;
1493 
1495 
1496  // Register is live when we read it here.
1497  if (Info.Read)
1498  return LQR_Live;
1499  // Register is dead if we can fully overwrite or clobber it here.
1500  if (Info.FullyDefined || Info.Clobbered)
1501  return LQR_Dead;
1502  }
1503 
1504  // If we reached the end, it is safe to clobber Reg at the end of a block of
1505  // no successor has it live in.
1506  if (I == end()) {
1507  for (MachineBasicBlock *S : successors()) {
1508  for (const MachineBasicBlock::RegisterMaskPair &LI : S->liveins()) {
1509  if (TRI->regsOverlap(LI.PhysReg, Reg))
1510  return LQR_Live;
1511  }
1512  }
1513 
1514  return LQR_Dead;
1515  }
1516 
1517 
1518  N = Neighborhood;
1519 
1520  // Start by searching backwards from Before, looking for kills, reads or defs.
1521  I = const_iterator(Before);
1522  // If this is the first insn in the block, don't search backwards.
1523  if (I != begin()) {
1524  do {
1525  --I;
1526 
1527  if (I->isDebugOrPseudoInstr())
1528  continue;
1529 
1530  --N;
1531 
1533 
1534  // Defs happen after uses so they take precedence if both are present.
1535 
1536  // Register is dead after a dead def of the full register.
1537  if (Info.DeadDef)
1538  return LQR_Dead;
1539  // Register is (at least partially) live after a def.
1540  if (Info.Defined) {
1541  if (!Info.PartialDeadDef)
1542  return LQR_Live;
1543  // As soon as we saw a partial definition (dead or not),
1544  // we cannot tell if the value is partial live without
1545  // tracking the lanemasks. We are not going to do this,
1546  // so fall back on the remaining of the analysis.
1547  break;
1548  }
1549  // Register is dead after a full kill or clobber and no def.
1550  if (Info.Killed || Info.Clobbered)
1551  return LQR_Dead;
1552  // Register must be live if we read it.
1553  if (Info.Read)
1554  return LQR_Live;
1555 
1556  } while (I != begin() && N > 0);
1557  }
1558 
1559  // If all the instructions before this in the block are debug instructions,
1560  // skip over them.
1561  while (I != begin() && std::prev(I)->isDebugOrPseudoInstr())
1562  --I;
1563 
1564  // Did we get to the start of the block?
1565  if (I == begin()) {
1566  // If so, the register's state is definitely defined by the live-in state.
1567  for (const MachineBasicBlock::RegisterMaskPair &LI : liveins())
1568  if (TRI->regsOverlap(LI.PhysReg, Reg))
1569  return LQR_Live;
1570 
1571  return LQR_Dead;
1572  }
1573 
1574  // At this point we have no idea of the liveness of the register.
1575  return LQR_Unknown;
1576 }
1577 
1578 const uint32_t *
1580  // EH funclet entry does not preserve any registers.
1581  return isEHFuncletEntry() ? TRI->getNoPreservedMask() : nullptr;
1582 }
1583 
1584 const uint32_t *
1586  // If we see a return block with successors, this must be a funclet return,
1587  // which does not preserve any registers. If there are no successors, we don't
1588  // care what kind of return it is, putting a mask after it is a no-op.
1589  return isReturnBlock() && !succ_empty() ? TRI->getNoPreservedMask() : nullptr;
1590 }
1591 
1593  LiveIns.clear();
1594 }
1595 
1597  assert(getParent()->getProperties().hasProperty(
1599  "Liveness information is accurate");
1600  return LiveIns.begin();
1601 }
1602 
1604  const MachineFunction &MF = *getParent();
1607  "Liveness information is accurate");
1608 
1609  const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
1610  MCPhysReg ExceptionPointer = 0, ExceptionSelector = 0;
1611  if (MF.getFunction().hasPersonalityFn()) {
1612  auto PersonalityFn = MF.getFunction().getPersonalityFn();
1613  ExceptionPointer = TLI.getExceptionPointerRegister(PersonalityFn);
1614  ExceptionSelector = TLI.getExceptionSelectorRegister(PersonalityFn);
1615  }
1616 
1617  return liveout_iterator(*this, ExceptionPointer, ExceptionSelector, false);
1618 }
1619 
1621 const MBBSectionID
1622  MBBSectionID::ExceptionSectionID(MBBSectionID::SectionType::Exception);
llvm::TargetMachine::requiresStructuredCFG
bool requiresStructuredCFG() const
Definition: TargetMachine.h:216
llvm::LaneBitmask
Definition: LaneBitmask.h:40
i
i
Definition: README.txt:29
llvm::next_nodbg
IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It, then continue incrementing it while it points to a debug instruction.
Definition: MachineBasicBlock.h:1252
llvm::MachineBasicBlock::RegisterMaskPair::PhysReg
MCPhysReg PhysReg
Definition: MachineBasicBlock.h:102
llvm::MachineFunction::remove
void remove(iterator MBBI)
Definition: MachineFunction.h:854
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unsigned succ_size() const
Definition: MachineBasicBlock.h:353
llvm::MachineFunctionProperties::hasProperty
bool hasProperty(Property P) const
Definition: MachineFunction.h:176
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:104
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition: Compiler.h:494
llvm::ModuleSlotTracker::getLocalSlot
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:868
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This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::make_range
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Convenience function for iterating over sub-ranges.
Definition: iterator_range.h:53
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bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
Definition: MachineBasicBlock.cpp:576
llvm::MachineBasicBlock::LivenessQueryResult
LivenessQueryResult
Possible outcome of a register liveness query to computeRegisterLiveness()
Definition: MachineBasicBlock.h:1039
llvm::MachineBasicBlock::getBasicBlock
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
Definition: MachineBasicBlock.h:205
llvm::MachineRegisterInfo::createVirtualRegister
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:156
llvm::HexagonInstrInfo::removeBranch
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
Remove the branching code at the end of the specific MBB.
Definition: HexagonInstrInfo.cpp:602
llvm::DILocation::getMergedLocation
static const DILocation * getMergedLocation(const DILocation *LocA, const DILocation *LocB)
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Definition: DebugInfoMetadata.cpp:101
DebugInfoMetadata.h
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@ Prefix
Definition: CommandLine.h:160
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::MachineBasicBlock::ReplaceUsesOfBlockWith
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to 'Old', change the code and CFG so that it branches to 'N...
Definition: MachineBasicBlock.cpp:1335
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:74
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Definition: Function.h:60
llvm::MachineFunction::getContext
MCContext & getContext() const
Definition: MachineFunction.h:592
llvm::BranchProbability::getNumerator
uint32_t getNumerator() const
Definition: BranchProbability.h:64
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:93
llvm::HexagonInstrInfo::analyzeBranch
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....
Definition: HexagonInstrInfo.cpp:432
llvm::MachineBasicBlock::instrs
instr_range instrs()
Definition: MachineBasicBlock.h:272
llvm::MachineBasicBlock::isEHFuncletEntry
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
Definition: MachineBasicBlock.h:574
llvm::LiveVariables::VarInfo::Kills
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...
Definition: LiveVariables.h:90
llvm::ilist_node_with_parent< MachineBasicBlock, MachineFunction >::getNextNode
MachineBasicBlock * getNextNode()
Get the next node, or nullptr for the list tail.
Definition: ilist_node.h:289
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
llvm::MachineFunction::end
iterator end()
Definition: MachineFunction.h:824
llvm::printMBBReference
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Definition: MachineBasicBlock.cpp:116
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::LiveRange::Segment
This represents a simple continuous liveness interval for a value.
Definition: LiveInterval.h:162
llvm::MachineBasicBlock::isEntryBlock
bool isEntryBlock() const
Returns true if this is the entry block of the function.
Definition: MachineBasicBlock.cpp:286
llvm::MachineBasicBlock::setSuccProbability
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
Definition: MachineBasicBlock.cpp:1447
llvm::MachineFunction::getFunctionNumber
unsigned getFunctionNumber() const
getFunctionNumber - Return a unique ID for the current function.
Definition: MachineFunction.h:615
llvm::MachineBasicBlock::getEHCatchretSymbol
MCSymbol * getEHCatchretSymbol() const
Return the EHCatchret Symbol for this basic block.
Definition: MachineBasicBlock.cpp:88
MachineBasicBlock.h
llvm::LivePhysRegs
A set of physical registers with utility functions to track liveness when walking backward/forward th...
Definition: LivePhysRegs.h:50
llvm::MachineBasicBlock::isReturnBlock
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
Definition: MachineBasicBlock.h:827
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virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:125
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:139
llvm::MachineBasicBlock::findDebugLoc
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE and DBG_LABEL instructions.
Definition: MachineBasicBlock.cpp:1369
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:234
llvm::MachineBasicBlock::livein_iterator
LiveInVector::const_iterator livein_iterator
Definition: MachineBasicBlock.h:407
llvm::MachineBasicBlock::moveBefore
void moveBefore(MachineBasicBlock *NewAfter)
Move 'this' block before or after the specified block.
Definition: MachineBasicBlock.cpp:634
llvm::BranchProbability::getZero
static BranchProbability getZero()
Definition: BranchProbability.h:48
llvm::MachineBasicBlock::liveins
iterator_range< livein_iterator > liveins() const
Definition: MachineBasicBlock.h:421
TargetInstrInfo.h
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unsigned Number
Definition: MachineBasicBlock.h:58
llvm::HexagonInstrInfo::isPredicated
bool isPredicated(const MachineInstr &MI) const override
Returns true if the instruction is already predicated.
Definition: HexagonInstrInfo.cpp:1658
llvm::TargetLoweringBase::getExceptionPointerRegister
virtual Register getExceptionPointerRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception address on entry to an ...
Definition: TargetLowering.h:1795
llvm::MachineFunction::insert
void insert(iterator MBBI, MachineBasicBlock *MBB)
Definition: MachineFunction.h:841
llvm::SmallSet
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:136
slot
Since we know that Vector is byte aligned and we know the element offset of we should change the load into a lve *x instead of doing a load store lve *x sequence Implement passing vectors by value into calls and receiving them as arguments GCC apparently tries to then a load and vperm of Variable We need a way to teach tblgen that some operands of an intrinsic are required to be constants The verifier should enforce this constraint We currently codegen SCALAR_TO_VECTOR as a store of the scalar to a byte aligned stack slot
Definition: README_ALTIVEC.txt:57
llvm::MachineRegisterInfo::getNumVirtRegs
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
Definition: MachineRegisterInfo.h:765
llvm::iplist_impl::remove
pointer remove(iterator &IT)
Definition: ilist.h:252
llvm::Register::index2VirtReg
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:84
llvm::addLiveIns
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
Definition: LivePhysRegs.cpp:259
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:854
llvm::MachineBasicBlock::back
MachineInstr & back()
Definition: MachineBasicBlock.h:257
llvm::MachineBasicBlock::addSuccessorWithoutProb
void addSuccessorWithoutProb(MachineBasicBlock *Succ)
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:757
llvm::MBBSectionID
Definition: MachineBasicBlock.h:51
llvm::MachineBasicBlock::copySuccessor
void copySuccessor(MachineBasicBlock *Orig, succ_iterator I)
Copy a successor (and any probability info) from original block to this block's.
Definition: MachineBasicBlock.cpp:848
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1620
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition: ModuleSlotTracker.h:44
llvm::LegalityPredicates::any
Predicate any(Predicate P0, Predicate P1)
True iff P0 or P1 are true.
Definition: LegalizerInfo.h:241
llvm::AnalyzePhysRegInBundle
PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, const TargetRegisterInfo *TRI)
AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses a physical register.
Definition: MachineInstrBundle.cpp:313
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::MachineLoopInfo
Definition: MachineLoopInfo.h:89
MachineRegisterInfo.h
llvm::iplist_impl::erase
iterator erase(iterator where)
Definition: ilist.h:268
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
llvm::MachineBasicBlock::dump
void dump() const
Definition: MachineBasicBlock.cpp:291
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1295
llvm::MachineBasicBlock::isBeginSection
bool isBeginSection() const
Returns true if this block begins any section.
Definition: MachineBasicBlock.h:586
llvm::MachineRegisterInfo::tracksLiveness
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
Definition: MachineRegisterInfo.h:195
llvm::MachineBasicBlock::const_iterator
MachineInstrBundleIterator< const MachineInstr > const_iterator
Definition: MachineBasicBlock.h:243
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::MachineBasicBlock::printName
void printName(raw_ostream &os, unsigned printNameFlags=PrintNameIr, ModuleSlotTracker *moduleSlotTracker=nullptr) const
Print the basic block's name as:
Definition: MachineBasicBlock.cpp:474
isLiveOut
static bool isLiveOut(const MachineBasicBlock &MBB, unsigned Reg)
Definition: SIOptimizeExecMasking.cpp:287
llvm::MachineBasicBlock::addSuccessor
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:747
PrintSlotIndexes
static cl::opt< bool > PrintSlotIndexes("print-slotindexes", cl::desc("When printing machine IR, annotate instructions and blocks with " "SlotIndexes when available"), cl::init(true), cl::Hidden)
TargetLowering.h
llvm::SparseBitVector
Definition: SparseBitVector.h:256
bb
< i1 > br i1 label label bb bb
Definition: README.txt:978
llvm::MachineBasicBlock::getFirstInstrTerminator
instr_iterator getFirstInstrTerminator()
Same getFirstTerminator but it ignores bundles and return an instr_iterator instead.
Definition: MachineBasicBlock.cpp:247
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:650
llvm::MCContext::getOrCreateSymbol
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:204
llvm::LiveVariables::VarInfo::removeKill
bool removeKill(MachineInstr &MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
Definition: LiveVariables.h:95
llvm::SlotIndexes::hasIndex
bool hasIndex(const MachineInstr &instr) const
Returns true if the given machine instr is mapped to an index, otherwise returns false.
Definition: SlotIndexes.h:379
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::MachineBasicBlock::removeFromParent
MachineBasicBlock * removeFromParent()
This method unlinks 'this' from the containing function, and returns it, but does not delete it.
Definition: MachineBasicBlock.cpp:1321
MachineLoopInfo.h
llvm::LiveRange::liveAt
bool liveAt(SlotIndex index) const
Definition: LiveInterval.h:401
TargetMachine.h
llvm::BranchProbability::getDenominator
static uint32_t getDenominator()
Definition: BranchProbability.h:65
llvm::LiveIntervals::getMBBStartIdx
SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const
Return the first index in the given basic block.
Definition: LiveIntervals.h:236
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineBasicBlock::succ_end
succ_iterator succ_end()
Definition: MachineBasicBlock.h:343
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3395
llvm::LiveRange::addSegment
iterator addSegment(Segment S)
Add the specified Segment to this range, merging segments as appropriate.
Definition: LiveInterval.cpp:548
MCContext.h
llvm::MachineBasicBlock::isSuccessor
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Definition: MachineBasicBlock.cpp:909
llvm::Register::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:65
llvm::MachineBasicBlock::eraseFromParent
void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
Definition: MachineBasicBlock.cpp:1328
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:45
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
llvm::MachineFunction::getProperties
const MachineFunctionProperties & getProperties() const
Get the function properties.
Definition: MachineFunction.h:731
llvm::LivePhysRegs::addLiveOuts
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
Definition: LivePhysRegs.cpp:232
LiveVariables.h
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:127
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
First
into llvm powi allowing the code generator to produce balanced multiplication trees First
Definition: README.txt:54
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
llvm::MachineBasicBlock::isLegalToHoistInto
bool isLegalToHoistInto() const
Returns true if it is legal to hoist instructions into this block.
Definition: MachineBasicBlock.cpp:304
llvm::MachineBasicBlock::RegisterMaskPair
Pair of physical register and lane mask.
Definition: MachineBasicBlock.h:100
llvm::MachineBasicBlock::splitAt
MachineBasicBlock * splitAt(MachineInstr &SplitInst, bool UpdateLiveIns=true, LiveIntervals *LIS=nullptr)
Split a basic block into 2 pieces at SplitPoint.
Definition: MachineBasicBlock.cpp:966
llvm::SlotIndexes::getInstructionIndex
SlotIndex getInstructionIndex(const MachineInstr &MI, bool IgnoreBundle=false) const
Returns the base index for the given instruction.
Definition: SlotIndexes.h:384
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:54
llvm::PrintLaneMask
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:94
llvm::Function::hasPersonalityFn
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:777
llvm::HexagonInstrInfo::insertBranch
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
Insert branch code into the end of the specified MachineBasicBlock.
Definition: HexagonInstrInfo.cpp:625
llvm::operator<<
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
Definition: APFixedPoint.h:230
llvm::MachineFunction::addToMBBNumbering
unsigned addToMBBNumbering(MachineBasicBlock *MBB)
Adds the MBB to the internal numbering.
Definition: MachineFunction.h:877
llvm::MachineFunction::begin
iterator begin()
Definition: MachineFunction.h:822
llvm::SlotIndexes
SlotIndexes pass.
Definition: SlotIndexes.h:313
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
Align
uint64_t Align
Definition: ELFObjHandler.cpp:81
llvm::LiveInterval
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:686
llvm::SlotIndex
SlotIndex - An opaque wrapper around machine indexes.
Definition: SlotIndexes.h:82
llvm::BranchProbability::getUnknown
static BranchProbability getUnknown()
Definition: BranchProbability.h:50
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::MachineBasicBlock::findPrevDebugLoc
DebugLoc findPrevDebugLoc(instr_iterator MBBI)
Find the previous valid DebugLoc preceding MBBI, skipping and DBG_VALUE instructions.
Definition: MachineBasicBlock.cpp:1387
llvm::SmallString
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
Definition: SmallString.h:26
llvm::Pass::print
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
Definition: Pass.cpp:129
llvm::LiveIntervals::insertMBBInMaps
void insertMBBInMaps(MachineBasicBlock *MBB)
Definition: LiveIntervals.h:259
llvm::ilist_traits
Template traits for intrusive list.
Definition: ilist.h:90
llvm::MachineBasicBlock::succ_iterator
std::vector< MachineBasicBlock * >::iterator succ_iterator
Definition: MachineBasicBlock.h:315
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:640
llvm::MachineBasicBlock::getSuccProbability
BranchProbability getSuccProbability(const_succ_iterator Succ) const
Return probability of the edge from this block to MBB.
Definition: MachineBasicBlock.cpp:1425
BasicBlock.h
llvm::cl::opt< bool >
llvm::MachineBasicBlock::mayHaveInlineAsmBr
bool mayHaveInlineAsmBr() const
Returns true if this block may have an INLINEASM_BR (overestimate, by checking if any of the successo...
Definition: MachineBasicBlock.cpp:296
llvm::LiveVariables::addNewBlock
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
Definition: LiveVariables.cpp:833
llvm::MachineLoop
Definition: MachineLoopInfo.h:44
llvm::LivePhysRegs::stepBackward
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
Definition: LivePhysRegs.cpp:68
llvm::MachineBasicBlock::printAsOperand
void printAsOperand(raw_ostream &OS, bool PrintType=true) const
Definition: MachineBasicBlock.cpp:552
llvm::MachineOperand::isUndef
bool isUndef() const
Definition: MachineOperand.h:394
llvm::SmallSet::count
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:166
llvm::MachineInstrBundleIterator::getReverse
reverse_iterator getReverse() const
Get a reverse iterator to the same node.
Definition: MachineInstrBundleIterator.h:283
llvm::SlotIndexes::getMBBStartIdx
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
Definition: SlotIndexes.h:465
llvm::TargetRegisterInfo::regsOverlap
bool regsOverlap(Register RegA, Register RegB) const
Returns true if the two registers are equal or alias each other.
Definition: TargetRegisterInfo.h:419
llvm::MachineBasicBlock::instr_rend
reverse_instr_iterator instr_rend()
Definition: MachineBasicBlock.h:267
llvm::MachineFunctionProperties::Property::TracksLiveness
@ TracksLiveness
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
index
splat index
Definition: README_ALTIVEC.txt:181
uint64_t
LiveIntervals.h
llvm::MCContext::getAsmInfo
const MCAsmInfo * getAsmInfo() const
Definition: MCContext.h:439
llvm::MachineBasicBlock::hasAddressTaken
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
Definition: MachineBasicBlock.h:220
llvm::find
auto find(R &&Range, const T &Val)
Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1627
llvm::MachineFunction::splice
void splice(iterator InsertPt, iterator MBBI)
Definition: MachineFunction.h:844
llvm::MachineBasicBlock::SkipPHIsAndLabels
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
Definition: MachineBasicBlock.cpp:206
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
llvm::MachineBasicBlock::instr_rbegin
reverse_instr_iterator instr_rbegin()
Definition: MachineBasicBlock.h:265
llvm::MachineBasicBlock::LQR_Live
@ LQR_Live
Register is known to be (at least partially) live.
Definition: MachineBasicBlock.h:1040
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:432
llvm::MachineBasicBlock::getFirstNonPHI
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
Definition: MachineBasicBlock.cpp:196
llvm::is_contained
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1672
llvm::MachineFunction::CreateMachineBasicBlock
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
Definition: MachineFunction.cpp:441
llvm::prev_nodbg
IterT prev_nodbg(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It, then continue decrementing it while it points to a debug instruction.
Definition: MachineBasicBlock.h:1259
llvm::MachineBasicBlock::getLastNonDebugInstr
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:263
llvm::MachineBasicBlock::getAlignment
Align getAlignment() const
Return alignment of the basic block.
Definition: MachineBasicBlock.h:528
llvm::Register::isVirtualRegister
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:71
llvm::MachineFunction::getName
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
Definition: MachineFunction.cpp:567
llvm::MBBSectionID::ExceptionSectionID
const static MBBSectionID ExceptionSectionID
Definition: MachineBasicBlock.h:64
llvm::BranchProbability::isUnknown
bool isUnknown() const
Definition: BranchProbability.h:46
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineBasicBlock::canFallThrough
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
Definition: MachineBasicBlock.cpp:962
llvm::Optional::getValue
constexpr const T & getValue() const &
Definition: Optional.h:279
llvm::MachineBasicBlock::succ_begin
succ_iterator succ_begin()
Definition: MachineBasicBlock.h:341
llvm::IndexedInstrProf::HashT::Last
@ Last
llvm::PhysRegInfo
Information about how a physical register Reg is used by a set of operands.
Definition: MachineInstrBundle.h:246
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:234
llvm::MachineFunction::const_iterator
BasicBlockListType::const_iterator const_iterator
Definition: MachineFunction.h:805
llvm::MachineFunction::erase
void erase(iterator MBBI)
Definition: MachineFunction.h:856
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::MachineBasicBlock::livein_end
livein_iterator livein_end() const
Definition: MachineBasicBlock.h:419
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:359
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::MachineBasicBlock::predecessors
iterator_range< pred_iterator > predecessors()
Definition: MachineBasicBlock.h:358
llvm::MachineBasicBlock::reverse_instr_iterator
Instructions::reverse_iterator reverse_instr_iterator
Definition: MachineBasicBlock.h:239
llvm::MachineBasicBlock::LQR_Dead
@ LQR_Dead
Register is known to be fully dead.
Definition: MachineBasicBlock.h:1041
llvm::MachineBasicBlock::instr_begin
instr_iterator instr_begin()
Definition: MachineBasicBlock.h:261
llvm::MachineBasicBlock::pred_empty
bool pred_empty() const
Definition: MachineBasicBlock.h:340
llvm::LiveIntervals::getInterval
LiveInterval & getInterval(Register Reg)
Definition: LiveIntervals.h:114
llvm::MachineBasicBlock::instr_end
instr_iterator instr_end()
Definition: MachineBasicBlock.h:263
llvm::MachineFunction
Definition: MachineFunction.h:241
llvm::MachineBasicBlock::moveAfter
void moveAfter(MachineBasicBlock *NewBefore)
Definition: MachineBasicBlock.cpp:638
llvm::MachineBasicBlock::succ_empty
bool succ_empty() const
Definition: MachineBasicBlock.h:356
llvm::MachineBasicBlock::PrintNameIr
@ PrintNameIr
Add IR name where available.
Definition: MachineBasicBlock.h:1066
llvm::MachineBasicBlock::getFirstTerminator
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
Definition: MachineBasicBlock.cpp:238
llvm::skipDebugInstructionsForward
IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator.
Definition: MachineBasicBlock.h:1228
llvm::MachineBasicBlock::getBeginClobberMask
const uint32_t * getBeginClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the start of this basic block.
Definition: MachineBasicBlock.cpp:1579
llvm::MachineBasicBlock::phis
iterator_range< iterator > phis()
Returns a range that iterates over the phis in the basic block.
Definition: MachineBasicBlock.h:305
llvm::MachineOperand::getMBB
MachineBasicBlock * getMBB() const
Definition: MachineOperand.h:561
llvm::MachineBasicBlock::getNumber
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
Definition: MachineBasicBlock.h:1078
MCAsmInfo.h
Cond
SmallVector< MachineOperand, 4 > Cond
Definition: BasicBlockSections.cpp:137
llvm::MachineBasicBlock::PrintNameAttributes
@ PrintNameAttributes
Print attributes.
Definition: MachineBasicBlock.h:1067
llvm::MachineBasicBlock::successors
iterator_range< succ_iterator > successors()
Definition: MachineBasicBlock.h:364
llvm::MachineBasicBlock::getFirstNonDebugInstr
iterator getFirstNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the first non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:257
llvm::MachineBasicBlock::isEHPad
bool isEHPad() const
Returns true if the block is a landing pad.
Definition: MachineBasicBlock.h:548
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::MachineBasicBlock::rbegin
reverse_iterator rbegin()
Definition: MachineBasicBlock.h:281
llvm::MachineBasicBlock::splice
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
Definition: MachineBasicBlock.h:972
llvm::MachineBasicBlock::hasEHPadSuccessor
bool hasEHPadSuccessor() const
Definition: MachineBasicBlock.cpp:279
llvm::LivePhysRegs::init
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
Definition: LivePhysRegs.h:68
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm::MachineBasicBlock::getFullName
std::string getFullName() const
Return a formatted string to identify this block and its parent function.
Definition: MachineBasicBlock.cpp:318
llvm::MachineBasicBlock::findBranchDebugLoc
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
Definition: MachineBasicBlock.cpp:1408
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::MachineBasicBlock::removeLiveIn
void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Remove the specified register from the live in set.
Definition: MachineBasicBlock.cpp:558
llvm::MBBSectionID::Type
enum llvm::MBBSectionID::SectionType Type
llvm::MachineBasicBlock::rfindDebugLoc
DebugLoc rfindDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findDebugLoc (it also searches from the first to the last MI of this MBB) ...
Definition: MachineBasicBlock.cpp:1377
Number
uint32_t Number
Definition: Profile.cpp:47
llvm::ilist_callback_traits::addNodeToList
void addNodeToList(NodeTy *)
When an MBB is added to an MF, we need to update the parent pointer of the MBB, the MBB numbering,...
Definition: ilist.h:66
uint32_t
llvm::BranchProbability
Definition: BranchProbability.h:29
llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineBasicBlock, Options... >::type >::getIterator
self_iterator getIterator()
Definition: ilist_node.h:82
TargetSubtargetInfo.h
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::MachineFunction::hasBBSections
bool hasBBSections() const
Returns true if this function has basic block sections enabled.
Definition: MachineFunction.h:618
llvm::MachineBasicBlock::splitSuccessor
void splitSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New, bool NormalizeSuccProbs=false)
Split the old successor into old plus new and updates the probability info.
Definition: MachineBasicBlock.cpp:766
llvm::format
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
llvm::SmallSet::insert
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
Definition: SmallSet.h:182
llvm::MachineBasicBlock::liveout_begin
liveout_iterator liveout_begin() const
Iterator scanning successor basic blocks' liveins to determine the registers potentially live at the ...
Definition: MachineBasicBlock.cpp:1603
llvm::PredIterator
Definition: CFG.h:42
llvm::Value::getName
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:305
llvm::MachineBasicBlock::transferSuccessors
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
Definition: MachineBasicBlock.cpp:866
llvm::MachineBasicBlock::getSectionID
MBBSectionID getSectionID() const
Returns the section ID of this basic block.
Definition: MachineBasicBlock.h:596
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:376
llvm::MachineBasicBlock::isPredecessor
bool isPredecessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a predecessor of this block.
Definition: MachineBasicBlock.cpp:905
llvm::find_if
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1634
llvm::MachineBasicBlock::getEndSymbol
MCSymbol * getEndSymbol() const
Returns the MCSymbol marking the end of this basic block.
Definition: MachineBasicBlock.cpp:99
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MachineBasicBlock::canSplitCriticalEdge
bool canSplitCriticalEdge(const MachineBasicBlock *Succ) const
Check if the edge between this block and the given successor Succ, can be split.
Definition: MachineBasicBlock.cpp:1241
llvm::AMDGPU::HSAMD::Kernel::Key::SymbolName
constexpr char SymbolName[]
Key for Kernel::Metadata::mSymbolName.
Definition: AMDGPUMetadata.h:386
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
llvm::TargetLoweringBase::getExceptionSelectorRegister
virtual Register getExceptionSelectorRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception typeid on entry to a la...
Definition: TargetLowering.h:1802
llvm::MachineBasicBlock::replaceSuccessor
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
Replace successor OLD with NEW and update probability info.
Definition: MachineBasicBlock.cpp:808
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::MachineBasicBlock::replacePhiUsesWith
void replacePhiUsesWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Update all phi nodes in this basic block to refer to basic block New instead of basic block Old.
Definition: MachineBasicBlock.cpp:1356
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:606
llvm::MachineBasicBlock::sortUniqueLiveIns
void sortUniqueLiveIns()
Sorts and uniques the LiveIns vector.
Definition: MachineBasicBlock.cpp:582
uint16_t
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:636
llvm::MachineBasicBlock::removeSuccessor
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:785
llvm::MBBSectionID::ColdSectionID
const static MBBSectionID ColdSectionID
Definition: MachineBasicBlock.h:63
llvm::MachineBasicBlock::insert
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
Definition: MachineBasicBlock.cpp:1308
llvm::ilist_iterator
Iterator for intrusive lists based on ilist_node.
Definition: ilist_iterator.h:57
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
llvm::MachineBasicBlock::computeRegisterLiveness
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, MCRegister Reg, const_iterator Before, unsigned Neighborhood=10) const
Return whether (physical) register Reg has been defined and not killed as of just before Before.
Definition: MachineBasicBlock.cpp:1481
llvm::SlotIndex::getPrevSlot
SlotIndex getPrevSlot() const
Returns the previous slot in the index list.
Definition: SlotIndexes.h:288
llvm::MachineBasicBlock::liveout_iterator
Definition: MachineBasicBlock.h:428
llvm::MachineBasicBlock::instr_iterator
Instructions::iterator instr_iterator
Definition: MachineBasicBlock.h:237
llvm::AArch64CC::LS
@ LS
Definition: AArch64BaseInfo.h:264
llvm::MCAsmInfo::getPrivateLabelPrefix
StringRef getPrivateLabelPrefix() const
Definition: MCAsmInfo.h:667
llvm::ilist_callback_traits::removeNodeFromList
void removeNodeFromList(NodeTy *)
Definition: ilist.h:67
llvm::MachineBasicBlock::front
MachineInstr & front()
Definition: MachineBasicBlock.h:256
llvm::sort
void sort(IteratorTy Start, IteratorTy End)
Definition: STLExtras.h:1552
llvm::MachineBasicBlock::livein_begin
livein_iterator livein_begin() const
Definition: MachineBasicBlock.cpp:1596
llvm::LiveIntervals
Definition: LiveIntervals.h:54
llvm::VNInfo
VNInfo - Value Number Information.
Definition: LiveInterval.h:53
llvm::LiveRange::getVNInfoAt
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
Definition: LiveInterval.h:421
unbundleSingleMI
static void unbundleSingleMI(MachineInstr *MI)
Prepare MI to be removed from its bundle.
Definition: MachineBasicBlock.cpp:1283
llvm::MachineBasicBlock::isLayoutSuccessor
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
Definition: MachineBasicBlock.cpp:913
llvm::MachineBasicBlock::rfindPrevDebugLoc
DebugLoc rfindPrevDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findPrevDebugLoc (it also searches from the last to the first MI of this M...
Definition: MachineBasicBlock.cpp:1395
llvm::MachineBasicBlock::normalizeSuccProbs
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
Definition: MachineBasicBlock.h:676
llvm::TargetRegisterInfo::getNoPreservedMask
virtual const uint32_t * getNoPreservedMask() const
Return a register mask that clobbers everything.
Definition: TargetRegisterInfo.h:494
llvm::Function::getPersonalityFn
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1898
llvm::MachineBasicBlock::livein_empty
bool livein_empty() const
Definition: MachineBasicBlock.h:420
llvm::MachineBasicBlock::getFallThrough
MachineBasicBlock * getFallThrough()
Return the fallthrough block if the block can implicitly transfer control to the block after it by fa...
Definition: MachineBasicBlock.cpp:918
llvm::LiveRange::removeSegment
void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)
Remove the specified segment from this range.
Definition: LiveInterval.cpp:583
llvm::iplist_impl::insert
iterator insert(iterator where, pointer New)
Definition: ilist.h:229
llvm::MachineBasicBlock::validateSuccProbs
void validateSuccProbs() const
Validate successors' probabilities and check if the sum of them is approximate one.
Definition: MachineBasicBlock.cpp:733
llvm::MachineBasicBlock::getEndClobberMask
const uint32_t * getEndClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the end of the basic block.
Definition: MachineBasicBlock.cpp:1585
llvm::Pass
Pass interface - Implemented by all 'passes'.
Definition: Pass.h:91
llvm::HexagonInstrInfo::reverseBranchCondition
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Reverses the branch condition of the specified condition list, returning false on success and true if...
Definition: HexagonInstrInfo.cpp:1625
llvm::TargetSubtargetInfo::getTargetLowering
virtual const TargetLowering * getTargetLowering() const
Definition: TargetSubtargetInfo.h:97
llvm::skipDebugInstructionsBackward
IterT skipDebugInstructionsBackward(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
Definition: MachineBasicBlock.h:1241
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:277
MachineInstrBuilder.h
llvm::MachineBasicBlock::isInlineAsmBrIndirectTarget
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
Definition: MachineBasicBlock.h:616
llvm::raw_ostream::indent
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
Definition: raw_ostream.cpp:496
llvm::ilist_alloc_traits::deleteNode
static void deleteNode(NodeTy *V)
Definition: ilist.h:42
llvm::Printable
Simple wrapper around std::function<void(raw_ostream&)>.
Definition: Printable.h:38
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
N
#define N
llvm::MachineInstr::BundledSucc
@ BundledSucc
Definition: MachineInstr.h:89
llvm::LiveVariables::getVarInfo
VarInfo & getVarInfo(Register Reg)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
Definition: LiveVariables.cpp:84
llvm::MachineOperand::setMBB
void setMBB(MachineBasicBlock *MBB)
Definition: MachineOperand.h:698
llvm::MachineBasicBlock::const_succ_iterator
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
Definition: MachineBasicBlock.h:316
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:249
llvm::raw_svector_ostream
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:662
llvm::MachineBasicBlock::clearLiveIns
void clearLiveIns()
Clear live in list.
Definition: MachineBasicBlock.cpp:1592
llvm::MachineRegisterInfo::constrainRegClass
const TargetRegisterClass * constrainRegClass(Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...
Definition: MachineRegisterInfo.cpp:83
ModuleSlotTracker.h
llvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
Definition: MachineBasicBlock.cpp:886
llvm::LiveIntervals::repairIntervalsInRange
void repairIntervalsInRange(MachineBasicBlock *MBB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, ArrayRef< Register > OrigRegs)
Update live intervals for instructions in a range of iterators.
Definition: LiveIntervals.cpp:1654
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::LiveVariables
Definition: LiveVariables.h:47
llvm::MachineBasicBlock::LQR_Unknown
@ LQR_Unknown
Register liveness not decidable from local neighborhood.
Definition: MachineBasicBlock.h:1042
llvm::MachineBasicBlock::SkipPHIsLabelsAndDebug
iterator SkipPHIsLabelsAndDebug(iterator I, bool SkipPseudoOp=true)
Return the first instruction in MBB after I that is not a PHI, label or debug.
Definition: MachineBasicBlock.cpp:221
llvm::LiveIntervals::hasInterval
bool hasInterval(Register Reg) const
Definition: LiveIntervals.h:125
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MachineBasicBlock::print
void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const
Definition: MachineBasicBlock.cpp:329
SlotIndexes.h
llvm::cl::desc
Definition: CommandLine.h:405
llvm::ilist_callback_traits::transferNodesFromList
void transferNodesFromList(ilist_callback_traits &OldList, Iterator, Iterator)
Callback before transferring nodes to this list.
Definition: ilist.h:72
llvm::MachineBasicBlock::updateTerminator
void updateTerminator(MachineBasicBlock *PreviousLayoutSuccessor)
Update the terminator instructions in block to account for changes to block layout which may have bee...
Definition: MachineBasicBlock.cpp:642
raw_ostream.h
llvm::MachineDominatorTree
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
Definition: MachineDominators.h:51
MachineFunction.h
llvm::printReg
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition: TargetRegisterInfo.cpp:111
llvm::MachineInstr::BundledPred
@ BundledPred
Definition: MachineInstr.h:88
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::abs
APFloat abs(APFloat X)
Returns the absolute value of the argument.
Definition: APFloat.h:1282
llvm::MachineBasicBlock::SplitCriticalEdge
MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P, std::vector< SparseBitVector<>> *LiveInSets=nullptr)
Split the critical edge from this block to the given successor block, and return the newly created bl...
Definition: MachineBasicBlock.cpp:1007
llvm::MCID::Terminator
@ Terminator
Definition: MCInstrDesc.h:157
llvm::MachineBasicBlock::remove_instr
MachineInstr * remove_instr(MachineInstr *I)
Remove the possibly bundled instruction from the instruction list without deleting it.
Definition: MachineBasicBlock.cpp:1300
TargetRegisterInfo.h
llvm::MachineBasicBlock::getName
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
Definition: MachineBasicBlock.cpp:310
Debug.h
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:279
llvm::CallingConv::Cold
@ Cold
Definition: CallingConv.h:48
MachineDominators.h
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24
LivePhysRegs.h