LLVM  15.0.0git
SLPVectorizer.h
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1 //===- SLPVectorizer.h ------------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 // This pass implements the Bottom Up SLP vectorizer. It detects consecutive
9 // stores that can be put together into vector-stores. Next, it attempts to
10 // construct vectorizable tree using the use-def chains. If a profitable tree
11 // was found, the SLP vectorizer performs vectorization on the tree.
12 //
13 // The pass is inspired by the work described in the paper:
14 // "Loop-Aware SLP in GCC" by Ira Rosen, Dorit Nuzman, Ayal Zaks.
15 //
16 //===----------------------------------------------------------------------===//
17 
18 #ifndef LLVM_TRANSFORMS_VECTORIZE_SLPVECTORIZER_H
19 #define LLVM_TRANSFORMS_VECTORIZE_SLPVECTORIZER_H
20 
21 #include "llvm/ADT/ArrayRef.h"
22 #include "llvm/ADT/MapVector.h"
23 #include "llvm/ADT/SmallVector.h"
24 #include "llvm/IR/PassManager.h"
25 
26 namespace llvm {
27 
28 class AAResults;
29 class AssumptionCache;
30 class BasicBlock;
31 class CmpInst;
32 class DemandedBits;
33 class DominatorTree;
34 class Function;
35 class GetElementPtrInst;
36 class InsertElementInst;
37 class InsertValueInst;
38 class Instruction;
39 class LoopInfo;
40 class OptimizationRemarkEmitter;
41 class PHINode;
42 class ScalarEvolution;
43 class StoreInst;
44 class TargetLibraryInfo;
45 class TargetTransformInfo;
46 class Value;
47 
48 /// A private "module" namespace for types and utilities used by this pass.
49 /// These are implementation details and should not be used by clients.
50 namespace slpvectorizer {
51 
52 class BoUpSLP;
53 
54 } // end namespace slpvectorizer
55 
56 struct SLPVectorizerPass : public PassInfoMixin<SLPVectorizerPass> {
61 
62  ScalarEvolution *SE = nullptr;
64  TargetLibraryInfo *TLI = nullptr;
65  AAResults *AA = nullptr;
66  LoopInfo *LI = nullptr;
67  DominatorTree *DT = nullptr;
68  AssumptionCache *AC = nullptr;
69  DemandedBits *DB = nullptr;
70  const DataLayout *DL = nullptr;
71 
72 public:
74 
75  // Glue for old PM.
77  TargetLibraryInfo *TLI_, AAResults *AA_, LoopInfo *LI_,
80 
81 private:
82  /// Collect store and getelementptr instructions and organize them
83  /// according to the underlying object of their pointer operands. We sort the
84  /// instructions by their underlying objects to reduce the cost of
85  /// consecutive access queries.
86  ///
87  /// TODO: We can further reduce this cost if we flush the chain creation
88  /// every time we run into a memory barrier.
89  void collectSeedInstructions(BasicBlock *BB);
90 
91  /// Try to vectorize a chain that starts at two arithmetic instrs.
92  bool tryToVectorizePair(Value *A, Value *B, slpvectorizer::BoUpSLP &R);
93 
94  /// Try to vectorize a list of operands.
95  /// \param LimitForRegisterSize Vectorize only using maximal allowed register
96  /// size.
97  /// \returns true if a value was vectorized.
98  bool tryToVectorizeList(ArrayRef<Value *> VL, slpvectorizer::BoUpSLP &R,
99  bool LimitForRegisterSize = false);
100 
101  /// Try to vectorize a chain that may start at the operands of \p I.
102  bool tryToVectorize(Instruction *I, slpvectorizer::BoUpSLP &R);
103 
104  /// Vectorize the store instructions collected in Stores.
105  bool vectorizeStoreChains(slpvectorizer::BoUpSLP &R);
106 
107  /// Vectorize the index computations of the getelementptr instructions
108  /// collected in GEPs.
109  bool vectorizeGEPIndices(BasicBlock *BB, slpvectorizer::BoUpSLP &R);
110 
111  /// Try to find horizontal reduction or otherwise vectorize a chain of binary
112  /// operators.
113  bool vectorizeRootInstruction(PHINode *P, Value *V, BasicBlock *BB,
116 
117  /// Try to vectorize trees that start at insertvalue instructions.
118  bool vectorizeInsertValueInst(InsertValueInst *IVI, BasicBlock *BB,
120 
121  /// Try to vectorize trees that start at insertelement instructions.
122  bool vectorizeInsertElementInst(InsertElementInst *IEI, BasicBlock *BB,
124 
125  /// Tries to vectorize constructs started from CmpInst, InsertValueInst or
126  /// InsertElementInst instructions.
127  bool vectorizeSimpleInstructions(SmallVectorImpl<Instruction *> &Instructions,
129  bool AtTerminator);
130 
131  /// Scan the basic block and look for patterns that are likely to start
132  /// a vectorization chain.
133  bool vectorizeChainsInBlock(BasicBlock *BB, slpvectorizer::BoUpSLP &R);
134 
135  bool vectorizeStoreChain(ArrayRef<Value *> Chain, slpvectorizer::BoUpSLP &R,
136  unsigned Idx, unsigned MinVF);
137 
138  bool vectorizeStores(ArrayRef<StoreInst *> Stores, slpvectorizer::BoUpSLP &R);
139 
140  /// The store instructions in a basic block organized by base pointer.
141  StoreListMap Stores;
142 
143  /// The getelementptr instructions in a basic block organized by base pointer.
144  GEPListMap GEPs;
145 };
146 
147 } // end namespace llvm
148 
149 #endif // LLVM_TRANSFORMS_VECTORIZE_SLPVECTORIZER_H
llvm::PreservedAnalyses
A set of analyses that are preserved following a run of a transformation pass.
Definition: PassManager.h:152
llvm::SLPVectorizerPass::AC
AssumptionCache * AC
Definition: SLPVectorizer.h:68
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::PassInfoMixin
A CRTP mix-in to automatically provide informational APIs needed for passes.
Definition: PassManager.h:371
llvm::Function
Definition: Function.h:60
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
llvm::TargetTransformInfo
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Definition: TargetTransformInfo.h:167
MapVector.h
llvm::ScalarEvolution
The main scalar evolution driver.
Definition: ScalarEvolution.h:449
llvm::DominatorTree
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition: Dominators.h:166
Instructions
Code Generation Notes for reduce the size of the ISel and reduce repetition in the implementation In a small number of this can cause even when no optimisation has taken place Instructions
Definition: MSA.txt:11
llvm::MapVector< Value *, StoreList >
llvm::SLPVectorizerPass
Definition: SLPVectorizer.h:56
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
llvm::SLPVectorizerPass::runImpl
bool runImpl(Function &F, ScalarEvolution *SE_, TargetTransformInfo *TTI_, TargetLibraryInfo *TLI_, AAResults *AA_, LoopInfo *LI_, DominatorTree *DT_, AssumptionCache *AC_, DemandedBits *DB_, OptimizationRemarkEmitter *ORE_)
Definition: SLPVectorizer.cpp:9362
llvm::AAResults
Definition: AliasAnalysis.h:511
llvm::SLPVectorizerPass::DL
const DataLayout * DL
Definition: SLPVectorizer.h:70
llvm::InsertElementInst
This instruction inserts a single (scalar) element into a VectorType value.
Definition: Instructions.h:1936
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::Instruction
Definition: Instruction.h:42
llvm::DemandedBits
Definition: DemandedBits.h:40
I
#define I(x, y, z)
Definition: MD5.cpp:58
ArrayRef.h
llvm::SLPVectorizerPass::LI
LoopInfo * LI
Definition: SLPVectorizer.h:66
llvm::SLPVectorizerPass::TLI
TargetLibraryInfo * TLI
Definition: SLPVectorizer.h:64
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::LoopInfo
Definition: LoopInfo.h:1086
llvm::OptimizationRemarkEmitter
The optimization diagnostic interface.
Definition: OptimizationRemarkEmitter.h:33
llvm::SLPVectorizerPass::run
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
Definition: SLPVectorizer.cpp:9342
llvm::AssumptionCache
A cache of @llvm.assume calls within a function.
Definition: AssumptionCache.h:42
llvm::SLPVectorizerPass::DB
DemandedBits * DB
Definition: SLPVectorizer.h:69
llvm::slpvectorizer::BoUpSLP
Bottom Up SLP Vectorizer.
Definition: SLPVectorizer.cpp:839
llvm::SLPVectorizerPass::SE
ScalarEvolution * SE
Definition: SLPVectorizer.h:62
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
PassManager.h
llvm::TargetLibraryInfo
Provides information about what library functions are available for the current target.
Definition: TargetLibraryInfo.h:222
AA
SmallVector.h
llvm::PHINode
Definition: Instructions.h:2664
llvm::SmallVectorImpl< Instruction * >
llvm::AnalysisManager
A container for analyses that lazily runs them and caches their results.
Definition: InstructionSimplify.h:42
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::InsertValueInst
This instruction inserts a struct field of array element value into an aggregate value.
Definition: Instructions.h:2522
llvm::SLPVectorizerPass::DT
DominatorTree * DT
Definition: SLPVectorizer.h:67
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::codeview::PublicSymFlags::Function
@ Function