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30 #define DEBUG_TYPE "asm-printer"
33 #define PRINT_ALIAS_INSTR
34 #include "X86GenAsmWriter1.inc"
46 if (
MI->getOpcode() == X86::DATA16_PREFIX &&
61 if (
MI->getNumOperands() == 0 ||
62 !
MI->getOperand(
MI->getNumOperands() - 1).isImm())
65 int64_t
Imm =
MI->getOperand(
MI->getNumOperands() - 1).getImm();
71 switch (
MI->getOpcode()) {
72 case X86::CMPPDrmi:
case X86::CMPPDrri:
73 case X86::CMPPSrmi:
case X86::CMPPSrri:
74 case X86::CMPSDrm:
case X86::CMPSDrr:
75 case X86::CMPSDrm_Int:
case X86::CMPSDrr_Int:
76 case X86::CMPSSrm:
case X86::CMPSSrr:
77 case X86::CMPSSrm_Int:
case X86::CMPSSrr_Int:
78 if (
Imm >= 0 &&
Imm <= 7) {
99 case X86::VCMPPDrmi:
case X86::VCMPPDrri:
100 case X86::VCMPPDYrmi:
case X86::VCMPPDYrri:
101 case X86::VCMPPDZ128rmi:
case X86::VCMPPDZ128rri:
102 case X86::VCMPPDZ256rmi:
case X86::VCMPPDZ256rri:
103 case X86::VCMPPDZrmi:
case X86::VCMPPDZrri:
104 case X86::VCMPPSrmi:
case X86::VCMPPSrri:
105 case X86::VCMPPSYrmi:
case X86::VCMPPSYrri:
106 case X86::VCMPPSZ128rmi:
case X86::VCMPPSZ128rri:
107 case X86::VCMPPSZ256rmi:
case X86::VCMPPSZ256rri:
108 case X86::VCMPPSZrmi:
case X86::VCMPPSZrri:
109 case X86::VCMPSDrm:
case X86::VCMPSDrr:
110 case X86::VCMPSDZrm:
case X86::VCMPSDZrr:
111 case X86::VCMPSDrm_Int:
case X86::VCMPSDrr_Int:
112 case X86::VCMPSDZrm_Int:
case X86::VCMPSDZrr_Int:
113 case X86::VCMPSSrm:
case X86::VCMPSSrr:
114 case X86::VCMPSSZrm:
case X86::VCMPSSZrr:
115 case X86::VCMPSSrm_Int:
case X86::VCMPSSrr_Int:
116 case X86::VCMPSSZrm_Int:
case X86::VCMPSSZrr_Int:
117 case X86::VCMPPDZ128rmik:
case X86::VCMPPDZ128rrik:
118 case X86::VCMPPDZ256rmik:
case X86::VCMPPDZ256rrik:
119 case X86::VCMPPDZrmik:
case X86::VCMPPDZrrik:
120 case X86::VCMPPSZ128rmik:
case X86::VCMPPSZ128rrik:
121 case X86::VCMPPSZ256rmik:
case X86::VCMPPSZ256rrik:
122 case X86::VCMPPSZrmik:
case X86::VCMPPSZrrik:
123 case X86::VCMPSDZrm_Intk:
case X86::VCMPSDZrr_Intk:
124 case X86::VCMPSSZrm_Intk:
case X86::VCMPSSZrr_Intk:
125 case X86::VCMPPDZ128rmbi:
case X86::VCMPPDZ128rmbik:
126 case X86::VCMPPDZ256rmbi:
case X86::VCMPPDZ256rmbik:
127 case X86::VCMPPDZrmbi:
case X86::VCMPPDZrmbik:
128 case X86::VCMPPSZ128rmbi:
case X86::VCMPPSZ128rmbik:
129 case X86::VCMPPSZ256rmbi:
case X86::VCMPPSZ256rmbik:
130 case X86::VCMPPSZrmbi:
case X86::VCMPPSZrmbik:
131 case X86::VCMPPDZrrib:
case X86::VCMPPDZrribk:
132 case X86::VCMPPSZrrib:
case X86::VCMPPSZrribk:
133 case X86::VCMPSDZrrb_Int:
case X86::VCMPSDZrrb_Intk:
134 case X86::VCMPSSZrrb_Int:
case X86::VCMPSSZrrb_Intk:
135 case X86::VCMPPHZ128rmi:
case X86::VCMPPHZ128rri:
136 case X86::VCMPPHZ256rmi:
case X86::VCMPPHZ256rri:
137 case X86::VCMPPHZrmi:
case X86::VCMPPHZrri:
138 case X86::VCMPSHZrm:
case X86::VCMPSHZrr:
139 case X86::VCMPSHZrm_Int:
case X86::VCMPSHZrr_Int:
140 case X86::VCMPPHZ128rmik:
case X86::VCMPPHZ128rrik:
141 case X86::VCMPPHZ256rmik:
case X86::VCMPPHZ256rrik:
142 case X86::VCMPPHZrmik:
case X86::VCMPPHZrrik:
143 case X86::VCMPSHZrm_Intk:
case X86::VCMPSHZrr_Intk:
144 case X86::VCMPPHZ128rmbi:
case X86::VCMPPHZ128rmbik:
145 case X86::VCMPPHZ256rmbi:
case X86::VCMPPHZ256rmbik:
146 case X86::VCMPPHZrmbi:
case X86::VCMPPHZrmbik:
147 case X86::VCMPPHZrrib:
case X86::VCMPPHZrribk:
148 case X86::VCMPSHZrrb_Int:
case X86::VCMPSHZrrb_Intk:
149 if (
Imm >= 0 &&
Imm <= 31) {
191 OS <<
"{1to" << NumElts <<
"}";
200 "Unexpected op map!");
220 case X86::VPCOMBmi:
case X86::VPCOMBri:
221 case X86::VPCOMDmi:
case X86::VPCOMDri:
222 case X86::VPCOMQmi:
case X86::VPCOMQri:
223 case X86::VPCOMUBmi:
case X86::VPCOMUBri:
224 case X86::VPCOMUDmi:
case X86::VPCOMUDri:
225 case X86::VPCOMUQmi:
case X86::VPCOMUQri:
226 case X86::VPCOMUWmi:
case X86::VPCOMUWri:
227 case X86::VPCOMWmi:
case X86::VPCOMWri:
228 if (
Imm >= 0 &&
Imm <= 7) {
243 case X86::VPCMPBZ128rmi:
case X86::VPCMPBZ128rri:
244 case X86::VPCMPBZ256rmi:
case X86::VPCMPBZ256rri:
245 case X86::VPCMPBZrmi:
case X86::VPCMPBZrri:
246 case X86::VPCMPDZ128rmi:
case X86::VPCMPDZ128rri:
247 case X86::VPCMPDZ256rmi:
case X86::VPCMPDZ256rri:
248 case X86::VPCMPDZrmi:
case X86::VPCMPDZrri:
249 case X86::VPCMPQZ128rmi:
case X86::VPCMPQZ128rri:
250 case X86::VPCMPQZ256rmi:
case X86::VPCMPQZ256rri:
251 case X86::VPCMPQZrmi:
case X86::VPCMPQZrri:
252 case X86::VPCMPUBZ128rmi:
case X86::VPCMPUBZ128rri:
253 case X86::VPCMPUBZ256rmi:
case X86::VPCMPUBZ256rri:
254 case X86::VPCMPUBZrmi:
case X86::VPCMPUBZrri:
255 case X86::VPCMPUDZ128rmi:
case X86::VPCMPUDZ128rri:
256 case X86::VPCMPUDZ256rmi:
case X86::VPCMPUDZ256rri:
257 case X86::VPCMPUDZrmi:
case X86::VPCMPUDZrri:
258 case X86::VPCMPUQZ128rmi:
case X86::VPCMPUQZ128rri:
259 case X86::VPCMPUQZ256rmi:
case X86::VPCMPUQZ256rri:
260 case X86::VPCMPUQZrmi:
case X86::VPCMPUQZrri:
261 case X86::VPCMPUWZ128rmi:
case X86::VPCMPUWZ128rri:
262 case X86::VPCMPUWZ256rmi:
case X86::VPCMPUWZ256rri:
263 case X86::VPCMPUWZrmi:
case X86::VPCMPUWZrri:
264 case X86::VPCMPWZ128rmi:
case X86::VPCMPWZ128rri:
265 case X86::VPCMPWZ256rmi:
case X86::VPCMPWZ256rri:
266 case X86::VPCMPWZrmi:
case X86::VPCMPWZrri:
267 case X86::VPCMPBZ128rmik:
case X86::VPCMPBZ128rrik:
268 case X86::VPCMPBZ256rmik:
case X86::VPCMPBZ256rrik:
269 case X86::VPCMPBZrmik:
case X86::VPCMPBZrrik:
270 case X86::VPCMPDZ128rmik:
case X86::VPCMPDZ128rrik:
271 case X86::VPCMPDZ256rmik:
case X86::VPCMPDZ256rrik:
272 case X86::VPCMPDZrmik:
case X86::VPCMPDZrrik:
273 case X86::VPCMPQZ128rmik:
case X86::VPCMPQZ128rrik:
274 case X86::VPCMPQZ256rmik:
case X86::VPCMPQZ256rrik:
275 case X86::VPCMPQZrmik:
case X86::VPCMPQZrrik:
276 case X86::VPCMPUBZ128rmik:
case X86::VPCMPUBZ128rrik:
277 case X86::VPCMPUBZ256rmik:
case X86::VPCMPUBZ256rrik:
278 case X86::VPCMPUBZrmik:
case X86::VPCMPUBZrrik:
279 case X86::VPCMPUDZ128rmik:
case X86::VPCMPUDZ128rrik:
280 case X86::VPCMPUDZ256rmik:
case X86::VPCMPUDZ256rrik:
281 case X86::VPCMPUDZrmik:
case X86::VPCMPUDZrrik:
282 case X86::VPCMPUQZ128rmik:
case X86::VPCMPUQZ128rrik:
283 case X86::VPCMPUQZ256rmik:
case X86::VPCMPUQZ256rrik:
284 case X86::VPCMPUQZrmik:
case X86::VPCMPUQZrrik:
285 case X86::VPCMPUWZ128rmik:
case X86::VPCMPUWZ128rrik:
286 case X86::VPCMPUWZ256rmik:
case X86::VPCMPUWZ256rrik:
287 case X86::VPCMPUWZrmik:
case X86::VPCMPUWZrrik:
288 case X86::VPCMPWZ128rmik:
case X86::VPCMPWZ128rrik:
289 case X86::VPCMPWZ256rmik:
case X86::VPCMPWZ256rrik:
290 case X86::VPCMPWZrmik:
case X86::VPCMPWZrrik:
291 case X86::VPCMPDZ128rmib:
case X86::VPCMPDZ128rmibk:
292 case X86::VPCMPDZ256rmib:
case X86::VPCMPDZ256rmibk:
293 case X86::VPCMPDZrmib:
case X86::VPCMPDZrmibk:
294 case X86::VPCMPQZ128rmib:
case X86::VPCMPQZ128rmibk:
295 case X86::VPCMPQZ256rmib:
case X86::VPCMPQZ256rmibk:
296 case X86::VPCMPQZrmib:
case X86::VPCMPQZrmibk:
297 case X86::VPCMPUDZ128rmib:
case X86::VPCMPUDZ128rmibk:
298 case X86::VPCMPUDZ256rmib:
case X86::VPCMPUDZ256rmibk:
299 case X86::VPCMPUDZrmib:
case X86::VPCMPUDZrmibk:
300 case X86::VPCMPUQZ128rmib:
case X86::VPCMPUQZ128rmibk:
301 case X86::VPCMPUQZ256rmib:
case X86::VPCMPUQZ256rmibk:
302 case X86::VPCMPUQZrmib:
case X86::VPCMPUQZrmibk:
337 OS <<
"{1to" << NumElts <<
"}";
363 }
else if (
Op.isImm()) {
366 assert(
Op.isExpr() &&
"unknown operand kind in printOperand");
368 Op.getExpr()->print(
O, &
MAI);
393 bool NeedPlus =
false;
400 if (NeedPlus)
O <<
" + ";
402 O << ScaleVal <<
'*';
407 if (!DispSpec.
isImm()) {
408 if (NeedPlus)
O <<
" + ";
409 assert(DispSpec.
isExpr() &&
"non-immediate displacement for LEA?");
412 int64_t DispVal = DispSpec.
getImm();
413 if (DispVal || (!IndexReg.
getReg() && !BaseReg.
getReg())) {
455 if (DispSpec.
isImm()) {
458 assert(DispSpec.
isExpr() &&
"non-immediate displacement?");
467 if (
MI->getOperand(
Op).isExpr())
476 unsigned Reg =
Op.getReg();
This is an optimization pass for GlobalISel generic memory operations.
void printymmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
@ AddrSegmentReg
AddrSegmentReg - The operand # of the segment in the memory operand.
Target - Wrapper for Target specific information.
Reg
All possible values of the reg field in the ModR/M byte.
void printDstIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O)
Instances of this class represent a single low-level machine instruction.
const MCInstrAnalysis * MIA
void printSTiRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS)
@ MRMSrcMem
MRMSrcMem - This form is used for instructions that use the Mod/RM byte to specify a source,...
void printwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
bool SymbolizeOperands
If true, symbolize branch target and memory reference operands.
void printVPCMPMnemonic(const MCInst *MI, raw_ostream &OS)
void printRegName(raw_ostream &OS, unsigned RegNo) const override
Print the assembler register name.
void printInstFlags(const MCInst *MI, raw_ostream &O, const MCSubtargetInfo &STI)
void printCMPMnemonic(const MCInst *MI, bool IsVCmp, raw_ostream &OS)
Describe properties that are true of each instruction in the target description file.
const FeatureBitset & getFeatureBits() const
virtual Optional< uint64_t > evaluateMemoryOperandAddress(const MCInst &Inst, const MCSubtargetInfo *STI, uint64_t Addr, uint64_t Size) const
Given an instruction tries to get the address of a memory operand.
void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &O)
This class implements an extremely fast bulk output stream that can only output to a stream.
raw_ostream * CommentStream
A stream that comments can be emitted to if desired.
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
void printxmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
virtual bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size, uint64_t &Target) const
Given a branch instruction try to get the address the branch targets.
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) override
bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS)
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS)
void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O)
static const char * getRegisterName(unsigned RegNo)
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
void printVPCOMMnemonic(const MCInst *MI, raw_ostream &OS)
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &OS) override
Print the specified MCInst to the specified raw_ostream.
StringRef - Represent a constant reference to a string, i.e.
void printOptionalSegReg(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printqwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
bool EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, const MCInstrInfo &MCII)
EmitAnyX86InstComments - This function decodes x86 instructions and prints newline terminated strings...
void printzmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
const MCExpr * getExpr() const
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
Instances of this class represent operands of the MCInst class.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
Generic base class for all target subtargets.
void printdwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O)
unsigned getReg() const
Returns the register number.