LLVM 18.0.0git
X86Subtarget.cpp
Go to the documentation of this file.
1//===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the X86 specific subclass of TargetSubtargetInfo.
10//
11//===----------------------------------------------------------------------===//
12
13#include "X86Subtarget.h"
18#include "X86.h"
19#include "X86MacroFusion.h"
20#include "X86TargetMachine.h"
25#include "llvm/IR/Attributes.h"
27#include "llvm/IR/Function.h"
28#include "llvm/IR/GlobalValue.h"
32#include "llvm/Support/Debug.h"
37
38#if defined(_MSC_VER)
39#include <intrin.h>
40#endif
41
42using namespace llvm;
43
44#define DEBUG_TYPE "subtarget"
45
46#define GET_SUBTARGETINFO_TARGET_DESC
47#define GET_SUBTARGETINFO_CTOR
48#include "X86GenSubtargetInfo.inc"
49
50// Temporary option to control early if-conversion for x86 while adding machine
51// models.
52static cl::opt<bool>
53X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
54 cl::desc("Enable early if-conversion on X86"));
55
56
57/// Classify a blockaddress reference for the current subtarget according to how
58/// we should reference it in a non-pcrel context.
60 return classifyLocalReference(nullptr);
61}
62
63/// Classify a global variable reference for the current subtarget according to
64/// how we should reference it in a non-pcrel context.
65unsigned char
67 return classifyGlobalReference(GV, *GV->getParent());
68}
69
70unsigned char
72 // Tagged globals have non-zero upper bits, which makes direct references
73 // require a 64-bit immediate. On the small code model this causes relocation
74 // errors, so we go through the GOT instead.
75 if (AllowTaggedGlobals && TM.getCodeModel() == CodeModel::Small && GV &&
76 !isa<Function>(GV))
78
79 // If we're not PIC, it's not very interesting.
81 return X86II::MO_NO_FLAG;
82
83 if (is64Bit()) {
84 // 64-bit ELF PIC local references may use GOTOFF relocations.
85 if (isTargetELF()) {
86 switch (TM.getCodeModel()) {
87 // 64-bit small code model is simple: All rip-relative.
88 case CodeModel::Tiny:
89 llvm_unreachable("Tiny codesize model not supported on X86");
92 return X86II::MO_NO_FLAG;
93
94 // The large PIC code model uses GOTOFF.
96 return X86II::MO_GOTOFF;
97
98 // Medium is a hybrid: RIP-rel for code and non-large data, GOTOFF for
99 // remaining DSO local data.
101 // Constant pool and jump table handling pass a nullptr to this
102 // function so we need to use isa_and_nonnull.
103 if (isa_and_nonnull<Function>(GV))
104 return X86II::MO_NO_FLAG; // All code is RIP-relative
105 if (auto *GVar = dyn_cast_or_null<GlobalVariable>(GV)) {
106 if (TM.isLargeData(GVar))
107 return X86II::MO_GOTOFF;
108 }
109 return X86II::MO_NO_FLAG; // Local symbols use GOTOFF.
110 }
111 llvm_unreachable("invalid code model");
112 }
113
114 // Otherwise, this is either a RIP-relative reference or a 64-bit movabsq,
115 // both of which use MO_NO_FLAG.
116 return X86II::MO_NO_FLAG;
117 }
118
119 // The COFF dynamic linker just patches the executable sections.
120 if (isTargetCOFF())
121 return X86II::MO_NO_FLAG;
122
123 if (isTargetDarwin()) {
124 // 32 bit macho has no relocation for a-b if a is undefined, even if
125 // b is in the section that is being relocated.
126 // This means we have to use o load even for GVs that are known to be
127 // local to the dso.
128 if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
130
132 }
133
134 return X86II::MO_GOTOFF;
135}
136
138 const Module &M) const {
139 // The static large model never uses stubs.
141 return X86II::MO_NO_FLAG;
142
143 // Absolute symbols can be referenced directly.
144 if (GV) {
145 if (std::optional<ConstantRange> CR = GV->getAbsoluteSymbolRange()) {
146 // See if we can use the 8-bit immediate form. Note that some instructions
147 // will sign extend the immediate operand, so to be conservative we only
148 // accept the range [0,128).
149 if (CR->getUnsignedMax().ult(128))
150 return X86II::MO_ABS8;
151 else
152 return X86II::MO_NO_FLAG;
153 }
154 }
155
156 if (TM.shouldAssumeDSOLocal(M, GV))
157 return classifyLocalReference(GV);
158
159 if (isTargetCOFF()) {
160 // ExternalSymbolSDNode like _tls_index.
161 if (!GV)
162 return X86II::MO_NO_FLAG;
163 if (GV->hasDLLImportStorageClass())
164 return X86II::MO_DLLIMPORT;
165 return X86II::MO_COFFSTUB;
166 }
167 // Some JIT users use *-win32-elf triples; these shouldn't use GOT tables.
168 if (isOSWindows())
169 return X86II::MO_NO_FLAG;
170
171 if (is64Bit()) {
172 // ELF supports a large, truly PIC code model with non-PC relative GOT
173 // references. Other object file formats do not. Use the no-flag, 64-bit
174 // reference for them.
175 if (TM.getCodeModel() == CodeModel::Large)
177 // Tagged globals have non-zero upper bits, which makes direct references
178 // require a 64-bit immediate. So we can't let the linker relax the
179 // relocation to a 32-bit RIP-relative direct reference.
180 if (AllowTaggedGlobals && GV && !isa<Function>(GV))
182 return X86II::MO_GOTPCREL;
183 }
184
185 if (isTargetDarwin()) {
189 }
190
191 // 32-bit ELF references GlobalAddress directly in static relocation model.
192 // We cannot use MO_GOT because EBX may not be set up.
194 return X86II::MO_NO_FLAG;
195 return X86II::MO_GOT;
196}
197
198unsigned char
201}
202
203unsigned char
205 const Module &M) const {
206 if (TM.shouldAssumeDSOLocal(M, GV))
207 return X86II::MO_NO_FLAG;
208
209 // Functions on COFF can be non-DSO local for three reasons:
210 // - They are intrinsic functions (!GV)
211 // - They are marked dllimport
212 // - They are extern_weak, and a stub is needed
213 if (isTargetCOFF()) {
214 if (!GV)
215 return X86II::MO_NO_FLAG;
216 if (GV->hasDLLImportStorageClass())
217 return X86II::MO_DLLIMPORT;
218 return X86II::MO_COFFSTUB;
219 }
220
221 const Function *F = dyn_cast_or_null<Function>(GV);
222
223 if (isTargetELF()) {
224 if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
225 // According to psABI, PLT stub clobbers XMM8-XMM15.
226 // In Regcall calling convention those registers are used for passing
227 // parameters. Thus we need to prevent lazy binding in Regcall.
228 return X86II::MO_GOTPCREL;
229 // If PLT must be avoided then the call should be via GOTPCREL.
230 if (((F && F->hasFnAttribute(Attribute::NonLazyBind)) ||
231 (!F && M.getRtLibUseGOT())) &&
232 is64Bit())
233 return X86II::MO_GOTPCREL;
234 // Reference ExternalSymbol directly in static relocation model.
235 if (!is64Bit() && !GV && TM.getRelocationModel() == Reloc::Static)
236 return X86II::MO_NO_FLAG;
237 return X86II::MO_PLT;
238 }
239
240 if (is64Bit()) {
241 if (F && F->hasFnAttribute(Attribute::NonLazyBind))
242 // If the function is marked as non-lazy, generate an indirect call
243 // which loads from the GOT directly. This avoids runtime overhead
244 // at the cost of eager binding (and one extra byte of encoding).
245 return X86II::MO_GOTPCREL;
246 return X86II::MO_NO_FLAG;
247 }
248
249 return X86II::MO_NO_FLAG;
250}
251
252/// Return true if the subtarget allows calls to immediate address.
254 // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
255 // but WinCOFFObjectWriter::RecordRelocation cannot emit them. Once it does,
256 // the following check for Win32 should be removed.
257 if (Is64Bit || isTargetWin32())
258 return false;
259 return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
260}
261
262void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
263 StringRef FS) {
264 if (CPU.empty())
265 CPU = "generic";
266
267 if (TuneCPU.empty())
268 TuneCPU = "i586"; // FIXME: "generic" is more modern than llc tests expect.
269
270 std::string FullFS = X86_MC::ParseX86Triple(TargetTriple);
271 assert(!FullFS.empty() && "Failed to parse X86 triple");
272
273 if (!FS.empty())
274 FullFS = (Twine(FullFS) + "," + FS).str();
275
276 // Attach EVEX512 feature when we have AVX512 features with a default CPU.
277 // "pentium4" is default CPU for 32-bit targets.
278 // "x86-64" is default CPU for 64-bit targets.
279 if (CPU == "generic" || CPU == "pentium4" || CPU == "x86-64") {
280 size_t posNoEVEX512 = FS.rfind("-evex512");
281 // Make sure we won't be cheated by "-avx512fp16".
282 size_t posNoAVX512F = FS.endswith("-avx512f") ? FS.size() - 8
283 : FS.rfind("-avx512f,");
284 size_t posEVEX512 = FS.rfind("+evex512");
285 // Any AVX512XXX will enable AVX512F.
286 size_t posAVX512F = FS.rfind("+avx512");
287
288 if (posAVX512F != StringRef::npos &&
289 (posNoAVX512F == StringRef::npos || posNoAVX512F < posAVX512F))
290 if (posEVEX512 == StringRef::npos && posNoEVEX512 == StringRef::npos)
291 FullFS += ",+evex512";
292 }
293
294 // Parse features string and set the CPU.
295 ParseSubtargetFeatures(CPU, TuneCPU, FullFS);
296
297 // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
298 // 16-bytes and under that are reasonably fast. These features were
299 // introduced with Intel's Nehalem/Silvermont and AMD's Family10h
300 // micro-architectures respectively.
301 if (hasSSE42() || hasSSE4A())
302 IsUnalignedMem16Slow = false;
303
304 LLVM_DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
305 << ", 3DNowLevel " << X863DNowLevel << ", 64bit "
306 << HasX86_64 << "\n");
307 if (Is64Bit && !HasX86_64)
308 report_fatal_error("64-bit code requested on a subtarget that doesn't "
309 "support it!");
310
311 // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD, NaCl, and for all
312 // 64-bit targets. On Solaris (32-bit), stack alignment is 4 bytes
313 // following the i386 psABI, while on Illumos it is always 16 bytes.
314 if (StackAlignOverride)
315 stackAlignment = *StackAlignOverride;
316 else if (isTargetDarwin() || isTargetLinux() || isTargetKFreeBSD() ||
317 isTargetNaCl() || Is64Bit)
318 stackAlignment = Align(16);
319
320 // Consume the vector width attribute or apply any target specific limit.
321 if (PreferVectorWidthOverride)
322 PreferVectorWidth = PreferVectorWidthOverride;
323 else if (Prefer128Bit)
324 PreferVectorWidth = 128;
325 else if (Prefer256Bit)
326 PreferVectorWidth = 256;
327}
328
329X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
330 StringRef TuneCPU,
331 StringRef FS) {
332 initSubtargetFeatures(CPU, TuneCPU, FS);
333 return *this;
334}
335
337 StringRef FS, const X86TargetMachine &TM,
338 MaybeAlign StackAlignOverride,
339 unsigned PreferVectorWidthOverride,
340 unsigned RequiredVectorWidth)
341 : X86GenSubtargetInfo(TT, CPU, TuneCPU, FS),
342 PICStyle(PICStyles::Style::None), TM(TM), TargetTriple(TT),
343 StackAlignOverride(StackAlignOverride),
344 PreferVectorWidthOverride(PreferVectorWidthOverride),
345 RequiredVectorWidth(RequiredVectorWidth),
346 InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)),
347 TLInfo(TM, *this), FrameLowering(*this, getStackAlignment()) {
348 // Determine the PICStyle based on the target selected.
349 if (!isPositionIndependent() || TM.getCodeModel() == CodeModel::Large)
350 // With the large code model, None forces all memory accesses to be indirect
351 // rather than RIP-relative.
353 else if (is64Bit())
355 else if (isTargetCOFF())
357 else if (isTargetDarwin())
359 else if (isTargetELF())
361
362 CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));
363 Legalizer.reset(new X86LegalizerInfo(*this, TM));
364
365 auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
366 RegBankInfo.reset(RBI);
367 InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
368}
369
371 return CallLoweringInfo.get();
372}
373
375 return InstSelector.get();
376}
377
379 return Legalizer.get();
380}
381
383 return RegBankInfo.get();
384}
385
387 return canUseCMOV() && X86EarlyIfConv;
388}
389
391 std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
392 Mutations.push_back(createX86MacroFusionDAGMutation());
393}
394
396 return TM.isPositionIndependent();
397}
This file contains the simple types necessary to represent the attributes associated with functions a...
This file describes how to lower LLVM calls to machine code calls.
#define LLVM_DEBUG(X)
Definition: Debug.h:101
#define F(x, y, z)
Definition: MD5.cpp:55
const char LLVMTargetMachineRef TM
return InstrInfo
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file describes how to lower LLVM calls to machine code calls.
static bool is64Bit(const char *name)
This file declares the targeting of the Machinelegalizer class for X86.
This file declares the targeting of the RegisterBankInfo class for X86.
static cl::opt< bool > X86EarlyIfConv("x86-early-ifcvt", cl::Hidden, cl::desc("Enable early if-conversion on X86"))
bool hasDLLImportStorageClass() const
Definition: GlobalValue.h:274
bool isDeclarationForLinker() const
Definition: GlobalValue.h:614
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:652
std::optional< ConstantRange > getAbsoluteSymbolRange() const
If this is an absolute symbol reference, returns the range of the symbol, otherwise returns std::null...
Definition: Globals.cpp:380
bool hasCommonLinkage() const
Definition: GlobalValue.h:527
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
Holds all the information related to register banks.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
constexpr bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:134
static constexpr size_t npos
Definition: StringRef.h:52
bool isPositionIndependent() const
bool isLargeData(const GlobalVariable *GV) const
Reloc::Model getRelocationModel() const
Returns the code generation relocation model.
bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const
CodeModel::Model getCodeModel() const
Returns the code model.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
This class provides the information for the target register banks.
This class provides the information for the target register banks.
bool enableEarlyIfConversion() const override
bool isOSWindows() const
Definition: X86Subtarget.h:335
bool isTargetKFreeBSD() const
Definition: X86Subtarget.h:304
bool hasSSE42() const
Definition: X86Subtarget.h:205
InstructionSelector * getInstructionSelector() const override
const X86TargetLowering * getTargetLowering() const override
Definition: X86Subtarget.h:125
bool canUseCMOV() const
Definition: X86Subtarget.h:199
bool isLegalToCallImmediateAddr() const
Return true if the subtarget allows calls to immediate address.
bool isTargetDarwin() const
Definition: X86Subtarget.h:293
const RegisterBankInfo * getRegBankInfo() const override
bool isTargetCOFF() const
Definition: X86Subtarget.h:300
bool isTargetNaCl() const
Definition: X86Subtarget.h:307
bool isTargetELF() const
Definition: X86Subtarget.h:299
unsigned char classifyGlobalReference(const GlobalValue *GV, const Module &M) const
const LegalizerInfo * getLegalizerInfo() const override
bool isPositionIndependent() const
unsigned char classifyLocalReference(const GlobalValue *GV) const
Classify a global variable reference for the current subtarget according to how we should reference i...
unsigned char classifyBlockAddressReference() const
Classify a blockaddress reference for the current subtarget according to how we should reference it i...
const X86RegisterInfo * getRegisterInfo() const override
Definition: X86Subtarget.h:139
void setPICStyle(PICStyles::Style Style)
Definition: X86Subtarget.h:190
X86Subtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const X86TargetMachine &TM, MaybeAlign StackAlignOverride, unsigned PreferVectorWidthOverride, unsigned RequiredVectorWidth)
This constructor initializes the data members to match that of the specified triple.
const CallLowering * getCallLowering() const override
Methods used by Global ISel.
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
void getPostRAMutations(std::vector< std::unique_ptr< ScheduleDAGMutation > > &Mutations) const override
bool isTargetWin32() const
Definition: X86Subtarget.h:339
unsigned char classifyGlobalFunctionReference(const GlobalValue *GV, const Module &M) const
Classify a global function reference for the current subtarget.
bool isTargetLinux() const
Definition: X86Subtarget.h:303
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ X86_RegCall
Register calling convention used for parameters transfer optimization.
Definition: CallingConv.h:200
@ MO_GOTPCREL_NORELAX
MO_GOTPCREL_NORELAX - Same as MO_GOTPCREL except that R_X86_64_GOTPCREL relocations are guaranteed to...
Definition: X86BaseInfo.h:447
@ MO_GOTOFF
MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of th...
Definition: X86BaseInfo.h:434
@ MO_DARWIN_NONLAZY_PIC_BASE
MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually...
Definition: X86BaseInfo.h:547
@ MO_COFFSTUB
MO_COFFSTUB - On a symbol operand "FOO", this indicates that the reference is actually to the "....
Definition: X86BaseInfo.h:575
@ MO_DARWIN_NONLAZY
MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "...
Definition: X86BaseInfo.h:542
@ MO_GOT
MO_GOT - On a symbol operand this indicates that the immediate is the offset to the GOT entry for the...
Definition: X86BaseInfo.h:427
@ MO_ABS8
MO_ABS8 - On a symbol operand this indicates that the symbol is known to be an absolute symbol in ran...
Definition: X86BaseInfo.h:570
@ MO_PLT
MO_PLT - On a symbol operand this indicates that the immediate is offset to the PLT entry of symbol n...
Definition: X86BaseInfo.h:454
@ MO_DLLIMPORT
MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the reference is actually to the "__imp...
Definition: X86BaseInfo.h:537
@ MO_PIC_BASE_OFFSET
MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of th...
Definition: X86BaseInfo.h:420
@ MO_GOTPCREL
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
Definition: X86BaseInfo.h:442
std::string ParseX86Triple(const Triple &TT)
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
InstructionSelector * createX86InstructionSelector(const X86TargetMachine &TM, X86Subtarget &, X86RegisterBankInfo &)
std::unique_ptr< ScheduleDAGMutation > createX86MacroFusionDAGMutation()
Note that you have to add: DAG.addMutation(createX86MacroFusionDAGMutation()); to X86PassConfig::crea...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:156
@ None
Not a recurrence.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Definition: Alignment.h:117