LLVM  14.0.0git
X86Subtarget.cpp
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1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the X86 specific subclass of TargetSubtargetInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "X86Subtarget.h"
15 #include "X86.h"
16 #include "X86CallLowering.h"
17 #include "X86LegalizerInfo.h"
18 #include "X86MacroFusion.h"
19 #include "X86RegisterBankInfo.h"
20 #include "X86TargetMachine.h"
21 #include "llvm/ADT/Triple.h"
24 #include "llvm/IR/Attributes.h"
25 #include "llvm/IR/ConstantRange.h"
26 #include "llvm/IR/Function.h"
27 #include "llvm/IR/GlobalValue.h"
28 #include "llvm/Support/Casting.h"
29 #include "llvm/Support/CodeGen.h"
31 #include "llvm/Support/Debug.h"
35 
36 #if defined(_MSC_VER)
37 #include <intrin.h>
38 #endif
39 
40 using namespace llvm;
41 
42 #define DEBUG_TYPE "subtarget"
43 
44 #define GET_SUBTARGETINFO_TARGET_DESC
45 #define GET_SUBTARGETINFO_CTOR
46 #include "X86GenSubtargetInfo.inc"
47 
48 // Temporary option to control early if-conversion for x86 while adding machine
49 // models.
50 static cl::opt<bool>
51 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
52  cl::desc("Enable early if-conversion on X86"));
53 
54 
55 /// Classify a blockaddress reference for the current subtarget according to how
56 /// we should reference it in a non-pcrel context.
58  return classifyLocalReference(nullptr);
59 }
60 
61 /// Classify a global variable reference for the current subtarget according to
62 /// how we should reference it in a non-pcrel context.
63 unsigned char
65  return classifyGlobalReference(GV, *GV->getParent());
66 }
67 
68 unsigned char
70  // Tagged globals have non-zero upper bits, which makes direct references
71  // require a 64-bit immediate. On the small code model this causes relocation
72  // errors, so we go through the GOT instead.
73  if (AllowTaggedGlobals && TM.getCodeModel() == CodeModel::Small && GV &&
74  !isa<Function>(GV))
76 
77  // If we're not PIC, it's not very interesting.
78  if (!isPositionIndependent())
79  return X86II::MO_NO_FLAG;
80 
81  if (is64Bit()) {
82  // 64-bit ELF PIC local references may use GOTOFF relocations.
83  if (isTargetELF()) {
84  switch (TM.getCodeModel()) {
85  // 64-bit small code model is simple: All rip-relative.
86  case CodeModel::Tiny:
87  llvm_unreachable("Tiny codesize model not supported on X86");
88  case CodeModel::Small:
89  case CodeModel::Kernel:
90  return X86II::MO_NO_FLAG;
91 
92  // The large PIC code model uses GOTOFF.
93  case CodeModel::Large:
94  return X86II::MO_GOTOFF;
95 
96  // Medium is a hybrid: RIP-rel for code, GOTOFF for DSO local data.
97  case CodeModel::Medium:
98  // Constant pool and jump table handling pass a nullptr to this
99  // function so we need to use isa_and_nonnull.
100  if (isa_and_nonnull<Function>(GV))
101  return X86II::MO_NO_FLAG; // All code is RIP-relative
102  return X86II::MO_GOTOFF; // Local symbols use GOTOFF.
103  }
104  llvm_unreachable("invalid code model");
105  }
106 
107  // Otherwise, this is either a RIP-relative reference or a 64-bit movabsq,
108  // both of which use MO_NO_FLAG.
109  return X86II::MO_NO_FLAG;
110  }
111 
112  // The COFF dynamic linker just patches the executable sections.
113  if (isTargetCOFF())
114  return X86II::MO_NO_FLAG;
115 
116  if (isTargetDarwin()) {
117  // 32 bit macho has no relocation for a-b if a is undefined, even if
118  // b is in the section that is being relocated.
119  // This means we have to use o load even for GVs that are known to be
120  // local to the dso.
121  if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
123 
125  }
126 
127  return X86II::MO_GOTOFF;
128 }
129 
131  const Module &M) const {
132  // The static large model never uses stubs.
134  return X86II::MO_NO_FLAG;
135 
136  // Absolute symbols can be referenced directly.
137  if (GV) {
139  // See if we can use the 8-bit immediate form. Note that some instructions
140  // will sign extend the immediate operand, so to be conservative we only
141  // accept the range [0,128).
142  if (CR->getUnsignedMax().ult(128))
143  return X86II::MO_ABS8;
144  else
145  return X86II::MO_NO_FLAG;
146  }
147  }
148 
149  if (TM.shouldAssumeDSOLocal(M, GV))
150  return classifyLocalReference(GV);
151 
152  if (isTargetCOFF()) {
153  // ExternalSymbolSDNode like _tls_index.
154  if (!GV)
155  return X86II::MO_NO_FLAG;
156  if (GV->hasDLLImportStorageClass())
157  return X86II::MO_DLLIMPORT;
158  return X86II::MO_COFFSTUB;
159  }
160  // Some JIT users use *-win32-elf triples; these shouldn't use GOT tables.
161  if (isOSWindows())
162  return X86II::MO_NO_FLAG;
163 
164  if (is64Bit()) {
165  // ELF supports a large, truly PIC code model with non-PC relative GOT
166  // references. Other object file formats do not. Use the no-flag, 64-bit
167  // reference for them.
168  if (TM.getCodeModel() == CodeModel::Large)
170  // Tagged globals have non-zero upper bits, which makes direct references
171  // require a 64-bit immediate. So we can't let the linker relax the
172  // relocation to a 32-bit RIP-relative direct reference.
173  if (AllowTaggedGlobals && GV && !isa<Function>(GV))
175  return X86II::MO_GOTPCREL;
176  }
177 
178  if (isTargetDarwin()) {
179  if (!isPositionIndependent())
182  }
183 
184  // 32-bit ELF references GlobalAddress directly in static relocation model.
185  // We cannot use MO_GOT because EBX may not be set up.
186  if (TM.getRelocationModel() == Reloc::Static)
187  return X86II::MO_NO_FLAG;
188  return X86II::MO_GOT;
189 }
190 
191 unsigned char
193  return classifyGlobalFunctionReference(GV, *GV->getParent());
194 }
195 
196 unsigned char
198  const Module &M) const {
199  if (TM.shouldAssumeDSOLocal(M, GV))
200  return X86II::MO_NO_FLAG;
201 
202  // Functions on COFF can be non-DSO local for three reasons:
203  // - They are intrinsic functions (!GV)
204  // - They are marked dllimport
205  // - They are extern_weak, and a stub is needed
206  if (isTargetCOFF()) {
207  if (!GV)
208  return X86II::MO_NO_FLAG;
209  if (GV->hasDLLImportStorageClass())
210  return X86II::MO_DLLIMPORT;
211  return X86II::MO_COFFSTUB;
212  }
213 
214  const Function *F = dyn_cast_or_null<Function>(GV);
215 
216  if (isTargetELF()) {
217  if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
218  // According to psABI, PLT stub clobbers XMM8-XMM15.
219  // In Regcall calling convention those registers are used for passing
220  // parameters. Thus we need to prevent lazy binding in Regcall.
221  return X86II::MO_GOTPCREL;
222  // If PLT must be avoided then the call should be via GOTPCREL.
223  if (((F && F->hasFnAttribute(Attribute::NonLazyBind)) ||
224  (!F && M.getRtLibUseGOT())) &&
225  is64Bit())
226  return X86II::MO_GOTPCREL;
227  // Reference ExternalSymbol directly in static relocation model.
228  if (!is64Bit() && !GV && TM.getRelocationModel() == Reloc::Static)
229  return X86II::MO_NO_FLAG;
230  return X86II::MO_PLT;
231  }
232 
233  if (is64Bit()) {
234  if (F && F->hasFnAttribute(Attribute::NonLazyBind))
235  // If the function is marked as non-lazy, generate an indirect call
236  // which loads from the GOT directly. This avoids runtime overhead
237  // at the cost of eager binding (and one extra byte of encoding).
238  return X86II::MO_GOTPCREL;
239  return X86II::MO_NO_FLAG;
240  }
241 
242  return X86II::MO_NO_FLAG;
243 }
244 
245 /// Return true if the subtarget allows calls to immediate address.
247  // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
248  // but WinCOFFObjectWriter::RecordRelocation cannot emit them. Once it does,
249  // the following check for Win32 should be removed.
250  if (In64BitMode || isTargetWin32())
251  return false;
252  return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
253 }
254 
255 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
256  StringRef FS) {
257  if (CPU.empty())
258  CPU = "generic";
259 
260  if (TuneCPU.empty())
261  TuneCPU = "i586"; // FIXME: "generic" is more modern than llc tests expect.
262 
263  std::string FullFS = X86_MC::ParseX86Triple(TargetTriple);
264  assert(!FullFS.empty() && "Failed to parse X86 triple");
265 
266  if (!FS.empty())
267  FullFS = (Twine(FullFS) + "," + FS).str();
268 
269  // Parse features string and set the CPU.
270  ParseSubtargetFeatures(CPU, TuneCPU, FullFS);
271 
272  // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
273  // 16-bytes and under that are reasonably fast. These features were
274  // introduced with Intel's Nehalem/Silvermont and AMD's Family10h
275  // micro-architectures respectively.
276  if (hasSSE42() || hasSSE4A())
277  IsUAMem16Slow = false;
278 
279  LLVM_DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
280  << ", 3DNowLevel " << X863DNowLevel << ", 64bit "
281  << HasX86_64 << "\n");
282  if (In64BitMode && !HasX86_64)
283  report_fatal_error("64-bit code requested on a subtarget that doesn't "
284  "support it!");
285 
286  // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD, NaCl, and for all
287  // 64-bit targets. On Solaris (32-bit), stack alignment is 4 bytes
288  // following the i386 psABI, while on Illumos it is always 16 bytes.
289  if (StackAlignOverride)
290  stackAlignment = *StackAlignOverride;
291  else if (isTargetDarwin() || isTargetLinux() || isTargetKFreeBSD() ||
292  isTargetNaCl() || In64BitMode)
293  stackAlignment = Align(16);
294 
295  // Consume the vector width attribute or apply any target specific limit.
296  if (PreferVectorWidthOverride)
297  PreferVectorWidth = PreferVectorWidthOverride;
298  else if (Prefer128Bit)
299  PreferVectorWidth = 128;
300  else if (Prefer256Bit)
301  PreferVectorWidth = 256;
302 }
303 
304 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
305  StringRef TuneCPU,
306  StringRef FS) {
307  initSubtargetFeatures(CPU, TuneCPU, FS);
308  return *this;
309 }
310 
313  MaybeAlign StackAlignOverride,
314  unsigned PreferVectorWidthOverride,
315  unsigned RequiredVectorWidth)
316  : X86GenSubtargetInfo(TT, CPU, TuneCPU, FS),
317  PICStyle(PICStyles::Style::None), TM(TM), TargetTriple(TT),
318  StackAlignOverride(StackAlignOverride),
319  PreferVectorWidthOverride(PreferVectorWidthOverride),
320  RequiredVectorWidth(RequiredVectorWidth),
321  InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)),
322  TLInfo(TM, *this), FrameLowering(*this, getStackAlignment()) {
323  // Determine the PICStyle based on the target selected.
324  if (!isPositionIndependent())
326  else if (is64Bit())
328  else if (isTargetCOFF())
330  else if (isTargetDarwin())
332  else if (isTargetELF())
334 
335  CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));
336  Legalizer.reset(new X86LegalizerInfo(*this, TM));
337 
338  auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
339  RegBankInfo.reset(RBI);
340  InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
341 }
342 
344  return CallLoweringInfo.get();
345 }
346 
348  return InstSelector.get();
349 }
350 
352  return Legalizer.get();
353 }
354 
356  return RegBankInfo.get();
357 }
358 
360  return hasCMov() && X86EarlyIfConv;
361 }
362 
364  std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
365  Mutations.push_back(createX86MacroFusionDAGMutation());
366 }
367 
369  return TM.isPositionIndependent();
370 }
llvm::X86II::MO_DARWIN_NONLAZY
@ MO_DARWIN_NONLAZY
MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "...
Definition: X86BaseInfo.h:542
llvm::X86LegalizerInfo
This class provides the information for the target register banks.
Definition: X86LegalizerInfo.h:25
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::StringRef::empty
LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:152
llvm::GlobalValue::hasCommonLinkage
bool hasCommonLinkage() const
Definition: GlobalValue.h:455
X86CallLowering.h
CallLowering.h
X86Subtarget.h
llvm::Function
Definition: Function.h:62
llvm::X86Subtarget::isTargetLinux
bool isTargetLinux() const
Definition: X86Subtarget.h:859
llvm::CodeModel::Medium
@ Medium
Definition: CodeGen.h:28
llvm::createX86InstructionSelector
InstructionSelector * createX86InstructionSelector(const X86TargetMachine &TM, X86Subtarget &, X86RegisterBankInfo &)
Definition: X86InstructionSelector.cpp:1689
llvm::X86Subtarget
Definition: X86Subtarget.h:52
ErrorHandling.h
llvm::PICStyles::Style::StubPIC
@ StubPIC
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:45
llvm::X86Subtarget::isLegalToCallImmediateAddr
bool isLegalToCallImmediateAddr() const
Return true if the subtarget allows calls to immediate address.
Definition: X86Subtarget.cpp:246
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:143
llvm::X86Subtarget::isTargetNaCl
bool isTargetNaCl() const
Definition: X86Subtarget.h:863
llvm::TargetMachine::getRelocationModel
Reloc::Model getRelocationModel() const
Returns the code generation relocation model.
Definition: TargetMachine.cpp:70
llvm::X86AS::FS
@ FS
Definition: X86.h:188
llvm::X86CallLowering
Definition: X86CallLowering.h:27
InstructionSelect.h
llvm::X86Subtarget::hasCMov
bool hasCMov() const
Definition: X86Subtarget.h:642
llvm::Optional
Definition: APInt.h:33
llvm::CodeModel::Kernel
@ Kernel
Definition: CodeGen.h:28
llvm::X86II::MO_GOTOFF
@ MO_GOTOFF
MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of th...
Definition: X86BaseInfo.h:434
llvm::X86Subtarget::X86Subtarget
X86Subtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const X86TargetMachine &TM, MaybeAlign StackAlignOverride, unsigned PreferVectorWidthOverride, unsigned RequiredVectorWidth)
This constructor initializes the data members to match that of the specified triple.
Definition: X86Subtarget.cpp:311
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
F
#define F(x, y, z)
Definition: MD5.cpp:56
llvm::X86II::MO_GOT
@ MO_GOT
MO_GOT - On a symbol operand this indicates that the immediate is the offset to the GOT entry for the...
Definition: X86BaseInfo.h:427
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::X86Subtarget::ParseSubtargetFeatures
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
llvm::createX86MacroFusionDAGMutation
std::unique_ptr< ScheduleDAGMutation > createX86MacroFusionDAGMutation()
Note that you have to add: DAG.addMutation(createX86MacroFusionDAGMutation()); to X86PassConfig::crea...
Definition: X86MacroFusion.cpp:70
CommandLine.h
llvm::X86II::MO_COFFSTUB
@ MO_COFFSTUB
MO_COFFSTUB - On a symbol operand "FOO", this indicates that the reference is actually to the "....
Definition: X86BaseInfo.h:575
X86.h
GlobalValue.h
TargetMachine.h
llvm::X86Subtarget::isTargetKFreeBSD
bool isTargetKFreeBSD() const
Definition: X86Subtarget.h:860
X86MacroFusion.h
llvm::X86II::MO_PLT
@ MO_PLT
MO_PLT - On a symbol operand this indicates that the immediate is offset to the PLT entry of symbol n...
Definition: X86BaseInfo.h:454
llvm::X86Subtarget::isTargetWin32
bool isTargetWin32() const
Definition: X86Subtarget.h:895
llvm::Legalizer
Definition: Legalizer.h:31
llvm::X86Subtarget::getRegisterInfo
const X86RegisterInfo * getRegisterInfo() const override
Definition: X86Subtarget.h:576
llvm::X86II::MO_GOTPCREL
@ MO_GOTPCREL
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
Definition: X86BaseInfo.h:442
llvm::MaybeAlign
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Definition: Alignment.h:109
llvm::CodeModel::Small
@ Small
Definition: CodeGen.h:28
llvm::X86II::MO_NO_FLAG
@ MO_NO_FLAG
Definition: X86BaseInfo.h:410
llvm::X86Subtarget::getPostRAMutations
void getPostRAMutations(std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
Definition: X86Subtarget.cpp:363
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:143
llvm::X86II::MO_GOTPCREL_NORELAX
@ MO_GOTPCREL_NORELAX
MO_GOTPCREL_NORELAX - Same as MO_GOTPCREL except that R_X86_64_GOTPCREL relocations are guaranteed to...
Definition: X86BaseInfo.h:447
llvm::X86Subtarget::classifyGlobalReference
unsigned char classifyGlobalReference(const GlobalValue *GV, const Module &M) const
Definition: X86Subtarget.cpp:130
llvm::X86Subtarget::getLegalizerInfo
const LegalizerInfo * getLegalizerInfo() const override
Definition: X86Subtarget.cpp:351
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::X86Subtarget::isOSWindows
bool isOSWindows() const
Definition: X86Subtarget.h:891
llvm::PICStyles::Style::RIPRel
@ RIPRel
llvm::CallingConv::X86_RegCall
@ X86_RegCall
Register calling convention used for parameters transfer optimization.
Definition: CallingConv.h:219
llvm::X86Subtarget::isTargetELF
bool isTargetELF() const
Definition: X86Subtarget.h:855
llvm::None
const NoneType None
Definition: None.h:23
llvm::X86Subtarget::classifyLocalReference
unsigned char classifyLocalReference(const GlobalValue *GV) const
Classify a global variable reference for the current subtarget according to how we should reference i...
Definition: X86Subtarget.cpp:69
llvm::TargetMachine::isPositionIndependent
bool isPositionIndependent() const
Definition: TargetMachine.cpp:44
llvm::X86Subtarget::getRegBankInfo
const RegisterBankInfo * getRegBankInfo() const override
Definition: X86Subtarget.cpp:355
X86GenSubtargetInfo
llvm::cl::opt< bool >
llvm::X86Subtarget::enableEarlyIfConversion
bool enableEarlyIfConversion() const override
Definition: X86Subtarget.cpp:359
llvm::RegisterBankInfo
Holds all the information related to register banks.
Definition: RegisterBankInfo.h:39
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::InstructionSelector
Provides the logic to select generic machine instructions.
Definition: InstructionSelector.h:423
llvm::X86II::MO_DARWIN_NONLAZY_PIC_BASE
@ MO_DARWIN_NONLAZY_PIC_BASE
MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually...
Definition: X86BaseInfo.h:547
llvm::X86Subtarget::getInstructionSelector
InstructionSelector * getInstructionSelector() const override
Definition: X86Subtarget.cpp:347
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:578
llvm::X86II::MO_PIC_BASE_OFFSET
@ MO_PIC_BASE_OFFSET
MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of th...
Definition: X86BaseInfo.h:420
X86LegalizerInfo.h
X86RegisterBankInfo.h
llvm::X86Subtarget::isTargetCOFF
bool isTargetCOFF() const
Definition: X86Subtarget.h:856
llvm::HexStyle::Style
Style
Definition: MCInstPrinter.h:32
X86EarlyIfConv
static cl::opt< bool > X86EarlyIfConv("x86-early-ifcvt", cl::Hidden, cl::desc("Enable early if-conversion on X86"))
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::X86Subtarget::getTargetLowering
const X86TargetLowering * getTargetLowering() const override
Definition: X86Subtarget.h:562
llvm::X86TargetMachine
Definition: X86TargetMachine.h:28
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:67
llvm::X86Subtarget::classifyBlockAddressReference
unsigned char classifyBlockAddressReference() const
Classify a blockaddress reference for the current subtarget according to how we should reference it i...
Definition: X86Subtarget.cpp:57
Triple.h
llvm::X86Subtarget::isTargetDarwin
bool isTargetDarwin() const
Definition: X86Subtarget.h:849
llvm::X86II::MO_DLLIMPORT
@ MO_DLLIMPORT
MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the reference is actually to the "__imp...
Definition: X86BaseInfo.h:537
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
this
Analysis the ScalarEvolution expression for r is this
Definition: README.txt:8
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:134
llvm::Reloc::Static
@ Static
Definition: CodeGen.h:22
llvm::X86Subtarget::setPICStyle
void setPICStyle(PICStyles::Style Style)
Definition: X86Subtarget.h:635
ConstantRange.h
llvm::TargetMachine::shouldAssumeDSOLocal
bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const
Definition: TargetMachine.cpp:94
llvm::CodeModel::Tiny
@ Tiny
Definition: CodeGen.h:28
llvm::X86RegisterBankInfo
This class provides the information for the target register banks.
Definition: X86RegisterBankInfo.h:43
Attributes.h
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
X86TargetMachine.h
Casting.h
Function.h
llvm::X86Subtarget::classifyGlobalFunctionReference
unsigned char classifyGlobalFunctionReference(const GlobalValue *GV, const Module &M) const
Classify a global function reference for the current subtarget.
Definition: X86Subtarget.cpp:197
llvm::PICStyles::Style::None
@ None
llvm::TargetMachine::getCodeModel
CodeModel::Model getCodeModel() const
Returns the code model.
Definition: TargetMachine.cpp:74
CodeGen.h
llvm::CodeModel::Large
@ Large
Definition: CodeGen.h:28
X86BaseInfo.h
llvm::GlobalValue::getAbsoluteSymbolRange
Optional< ConstantRange > getAbsoluteSymbolRange() const
If this is an absolute symbol reference, returns the range of the symbol, otherwise returns None.
Definition: Globals.cpp:329
llvm::GlobalValue::isDeclarationForLinker
bool isDeclarationForLinker() const
Definition: GlobalValue.h:540
llvm::GlobalValue::hasDLLImportStorageClass
bool hasDLLImportStorageClass() const
Definition: GlobalValue.h:259
llvm::X86Subtarget::hasSSE4A
bool hasSSE4A() const
Definition: X86Subtarget.h:653
llvm::PICStyles::Style::GOT
@ GOT
llvm::X86Subtarget::hasSSE42
bool hasSSE42() const
Definition: X86Subtarget.h:648
llvm::X86Subtarget::is64Bit
bool is64Bit() const
Is this x86_64? (disregarding specific ABI / programming model)
Definition: X86Subtarget.h:612
llvm::LegalizerInfo
Definition: LegalizerInfo.h:1108
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::X86II::MO_ABS8
@ MO_ABS8
MO_ABS8 - On a symbol operand this indicates that the symbol is known to be an absolute symbol in ran...
Definition: X86BaseInfo.h:570
llvm::X86Subtarget::getCallLowering
const CallLowering * getCallLowering() const override
Methods used by Global ISel.
Definition: X86Subtarget.cpp:343
llvm::cl::desc
Definition: CommandLine.h:412
raw_ostream.h
llvm::X86Subtarget::isPositionIndependent
bool isPositionIndependent() const
Definition: X86Subtarget.cpp:368
llvm::CallLowering
Definition: CallLowering.h:43
Debug.h
llvm::X86_MC::ParseX86Triple
std::string ParseX86Triple(const Triple &TT)
Definition: X86MCTargetDesc.cpp:45