LLVM  15.0.0git
X86Subtarget.cpp
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1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the X86 specific subclass of TargetSubtargetInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "X86Subtarget.h"
15 #include "X86.h"
16 #include "X86CallLowering.h"
17 #include "X86LegalizerInfo.h"
18 #include "X86MacroFusion.h"
19 #include "X86RegisterBankInfo.h"
20 #include "X86TargetMachine.h"
21 #include "llvm/ADT/Triple.h"
26 #include "llvm/IR/Attributes.h"
27 #include "llvm/IR/ConstantRange.h"
28 #include "llvm/IR/Function.h"
29 #include "llvm/IR/GlobalValue.h"
30 #include "llvm/Support/Casting.h"
31 #include "llvm/Support/CodeGen.h"
33 #include "llvm/Support/Debug.h"
37 
38 #if defined(_MSC_VER)
39 #include <intrin.h>
40 #endif
41 
42 using namespace llvm;
43 
44 #define DEBUG_TYPE "subtarget"
45 
46 #define GET_SUBTARGETINFO_TARGET_DESC
47 #define GET_SUBTARGETINFO_CTOR
48 #include "X86GenSubtargetInfo.inc"
49 
50 // Temporary option to control early if-conversion for x86 while adding machine
51 // models.
52 static cl::opt<bool>
53 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
54  cl::desc("Enable early if-conversion on X86"));
55 
56 
57 /// Classify a blockaddress reference for the current subtarget according to how
58 /// we should reference it in a non-pcrel context.
60  return classifyLocalReference(nullptr);
61 }
62 
63 /// Classify a global variable reference for the current subtarget according to
64 /// how we should reference it in a non-pcrel context.
65 unsigned char
67  return classifyGlobalReference(GV, *GV->getParent());
68 }
69 
70 unsigned char
72  // Tagged globals have non-zero upper bits, which makes direct references
73  // require a 64-bit immediate. On the small code model this causes relocation
74  // errors, so we go through the GOT instead.
75  if (AllowTaggedGlobals && TM.getCodeModel() == CodeModel::Small && GV &&
76  !isa<Function>(GV))
78 
79  // If we're not PIC, it's not very interesting.
80  if (!isPositionIndependent())
81  return X86II::MO_NO_FLAG;
82 
83  if (is64Bit()) {
84  // 64-bit ELF PIC local references may use GOTOFF relocations.
85  if (isTargetELF()) {
86  switch (TM.getCodeModel()) {
87  // 64-bit small code model is simple: All rip-relative.
88  case CodeModel::Tiny:
89  llvm_unreachable("Tiny codesize model not supported on X86");
90  case CodeModel::Small:
91  case CodeModel::Kernel:
92  return X86II::MO_NO_FLAG;
93 
94  // The large PIC code model uses GOTOFF.
95  case CodeModel::Large:
96  return X86II::MO_GOTOFF;
97 
98  // Medium is a hybrid: RIP-rel for code, GOTOFF for DSO local data.
99  case CodeModel::Medium:
100  // Constant pool and jump table handling pass a nullptr to this
101  // function so we need to use isa_and_nonnull.
102  if (isa_and_nonnull<Function>(GV))
103  return X86II::MO_NO_FLAG; // All code is RIP-relative
104  return X86II::MO_GOTOFF; // Local symbols use GOTOFF.
105  }
106  llvm_unreachable("invalid code model");
107  }
108 
109  // Otherwise, this is either a RIP-relative reference or a 64-bit movabsq,
110  // both of which use MO_NO_FLAG.
111  return X86II::MO_NO_FLAG;
112  }
113 
114  // The COFF dynamic linker just patches the executable sections.
115  if (isTargetCOFF())
116  return X86II::MO_NO_FLAG;
117 
118  if (isTargetDarwin()) {
119  // 32 bit macho has no relocation for a-b if a is undefined, even if
120  // b is in the section that is being relocated.
121  // This means we have to use o load even for GVs that are known to be
122  // local to the dso.
123  if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
125 
127  }
128 
129  return X86II::MO_GOTOFF;
130 }
131 
133  const Module &M) const {
134  // The static large model never uses stubs.
136  return X86II::MO_NO_FLAG;
137 
138  // Absolute symbols can be referenced directly.
139  if (GV) {
141  // See if we can use the 8-bit immediate form. Note that some instructions
142  // will sign extend the immediate operand, so to be conservative we only
143  // accept the range [0,128).
144  if (CR->getUnsignedMax().ult(128))
145  return X86II::MO_ABS8;
146  else
147  return X86II::MO_NO_FLAG;
148  }
149  }
150 
151  if (TM.shouldAssumeDSOLocal(M, GV))
152  return classifyLocalReference(GV);
153 
154  if (isTargetCOFF()) {
155  // ExternalSymbolSDNode like _tls_index.
156  if (!GV)
157  return X86II::MO_NO_FLAG;
158  if (GV->hasDLLImportStorageClass())
159  return X86II::MO_DLLIMPORT;
160  return X86II::MO_COFFSTUB;
161  }
162  // Some JIT users use *-win32-elf triples; these shouldn't use GOT tables.
163  if (isOSWindows())
164  return X86II::MO_NO_FLAG;
165 
166  if (is64Bit()) {
167  // ELF supports a large, truly PIC code model with non-PC relative GOT
168  // references. Other object file formats do not. Use the no-flag, 64-bit
169  // reference for them.
170  if (TM.getCodeModel() == CodeModel::Large)
172  // Tagged globals have non-zero upper bits, which makes direct references
173  // require a 64-bit immediate. So we can't let the linker relax the
174  // relocation to a 32-bit RIP-relative direct reference.
175  if (AllowTaggedGlobals && GV && !isa<Function>(GV))
177  return X86II::MO_GOTPCREL;
178  }
179 
180  if (isTargetDarwin()) {
181  if (!isPositionIndependent())
184  }
185 
186  // 32-bit ELF references GlobalAddress directly in static relocation model.
187  // We cannot use MO_GOT because EBX may not be set up.
188  if (TM.getRelocationModel() == Reloc::Static)
189  return X86II::MO_NO_FLAG;
190  return X86II::MO_GOT;
191 }
192 
193 unsigned char
195  return classifyGlobalFunctionReference(GV, *GV->getParent());
196 }
197 
198 unsigned char
200  const Module &M) const {
201  if (TM.shouldAssumeDSOLocal(M, GV))
202  return X86II::MO_NO_FLAG;
203 
204  // Functions on COFF can be non-DSO local for three reasons:
205  // - They are intrinsic functions (!GV)
206  // - They are marked dllimport
207  // - They are extern_weak, and a stub is needed
208  if (isTargetCOFF()) {
209  if (!GV)
210  return X86II::MO_NO_FLAG;
211  if (GV->hasDLLImportStorageClass())
212  return X86II::MO_DLLIMPORT;
213  return X86II::MO_COFFSTUB;
214  }
215 
216  const Function *F = dyn_cast_or_null<Function>(GV);
217 
218  if (isTargetELF()) {
219  if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
220  // According to psABI, PLT stub clobbers XMM8-XMM15.
221  // In Regcall calling convention those registers are used for passing
222  // parameters. Thus we need to prevent lazy binding in Regcall.
223  return X86II::MO_GOTPCREL;
224  // If PLT must be avoided then the call should be via GOTPCREL.
225  if (((F && F->hasFnAttribute(Attribute::NonLazyBind)) ||
226  (!F && M.getRtLibUseGOT())) &&
227  is64Bit())
228  return X86II::MO_GOTPCREL;
229  // Reference ExternalSymbol directly in static relocation model.
230  if (!is64Bit() && !GV && TM.getRelocationModel() == Reloc::Static)
231  return X86II::MO_NO_FLAG;
232  return X86II::MO_PLT;
233  }
234 
235  if (is64Bit()) {
236  if (F && F->hasFnAttribute(Attribute::NonLazyBind))
237  // If the function is marked as non-lazy, generate an indirect call
238  // which loads from the GOT directly. This avoids runtime overhead
239  // at the cost of eager binding (and one extra byte of encoding).
240  return X86II::MO_GOTPCREL;
241  return X86II::MO_NO_FLAG;
242  }
243 
244  return X86II::MO_NO_FLAG;
245 }
246 
247 /// Return true if the subtarget allows calls to immediate address.
249  // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
250  // but WinCOFFObjectWriter::RecordRelocation cannot emit them. Once it does,
251  // the following check for Win32 should be removed.
252  if (Is64Bit || isTargetWin32())
253  return false;
254  return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
255 }
256 
257 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
258  StringRef FS) {
259  if (CPU.empty())
260  CPU = "generic";
261 
262  if (TuneCPU.empty())
263  TuneCPU = "i586"; // FIXME: "generic" is more modern than llc tests expect.
264 
265  std::string FullFS = X86_MC::ParseX86Triple(TargetTriple);
266  assert(!FullFS.empty() && "Failed to parse X86 triple");
267 
268  if (!FS.empty())
269  FullFS = (Twine(FullFS) + "," + FS).str();
270 
271  // Parse features string and set the CPU.
272  ParseSubtargetFeatures(CPU, TuneCPU, FullFS);
273 
274  // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
275  // 16-bytes and under that are reasonably fast. These features were
276  // introduced with Intel's Nehalem/Silvermont and AMD's Family10h
277  // micro-architectures respectively.
278  if (hasSSE42() || hasSSE4A())
279  IsUnalignedMem16Slow = false;
280 
281  LLVM_DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
282  << ", 3DNowLevel " << X863DNowLevel << ", 64bit "
283  << HasX86_64 << "\n");
284  if (Is64Bit && !HasX86_64)
285  report_fatal_error("64-bit code requested on a subtarget that doesn't "
286  "support it!");
287 
288  // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD, NaCl, and for all
289  // 64-bit targets. On Solaris (32-bit), stack alignment is 4 bytes
290  // following the i386 psABI, while on Illumos it is always 16 bytes.
291  if (StackAlignOverride)
292  stackAlignment = *StackAlignOverride;
293  else if (isTargetDarwin() || isTargetLinux() || isTargetKFreeBSD() ||
294  isTargetNaCl() || Is64Bit)
295  stackAlignment = Align(16);
296 
297  // Consume the vector width attribute or apply any target specific limit.
298  if (PreferVectorWidthOverride)
299  PreferVectorWidth = PreferVectorWidthOverride;
300  else if (Prefer128Bit)
301  PreferVectorWidth = 128;
302  else if (Prefer256Bit)
303  PreferVectorWidth = 256;
304 }
305 
306 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
307  StringRef TuneCPU,
308  StringRef FS) {
309  initSubtargetFeatures(CPU, TuneCPU, FS);
310  return *this;
311 }
312 
315  MaybeAlign StackAlignOverride,
316  unsigned PreferVectorWidthOverride,
317  unsigned RequiredVectorWidth)
318  : X86GenSubtargetInfo(TT, CPU, TuneCPU, FS),
319  PICStyle(PICStyles::Style::None), TM(TM), TargetTriple(TT),
320  StackAlignOverride(StackAlignOverride),
321  PreferVectorWidthOverride(PreferVectorWidthOverride),
322  RequiredVectorWidth(RequiredVectorWidth),
323  InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)),
324  TLInfo(TM, *this), FrameLowering(*this, getStackAlignment()) {
325  // Determine the PICStyle based on the target selected.
326  if (!isPositionIndependent())
328  else if (is64Bit())
330  else if (isTargetCOFF())
332  else if (isTargetDarwin())
334  else if (isTargetELF())
336 
337  CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));
338  Legalizer.reset(new X86LegalizerInfo(*this, TM));
339 
340  auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
341  RegBankInfo.reset(RBI);
342  InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
343 }
344 
346  return CallLoweringInfo.get();
347 }
348 
350  return InstSelector.get();
351 }
352 
354  return Legalizer.get();
355 }
356 
358  return RegBankInfo.get();
359 }
360 
362  return canUseCMOV() && X86EarlyIfConv;
363 }
364 
366  std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
367  Mutations.push_back(createX86MacroFusionDAGMutation());
368 }
369 
371  return TM.isPositionIndependent();
372 }
llvm::X86II::MO_DARWIN_NONLAZY
@ MO_DARWIN_NONLAZY
MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "...
Definition: X86BaseInfo.h:542
llvm::X86LegalizerInfo
This class provides the information for the target register banks.
Definition: X86LegalizerInfo.h:25
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::GlobalValue::hasCommonLinkage
bool hasCommonLinkage() const
Definition: GlobalValue.h:497
X86CallLowering.h
CallLowering.h
X86Subtarget.h
llvm::Function
Definition: Function.h:60
llvm::X86Subtarget::isTargetLinux
bool isTargetLinux() const
Definition: X86Subtarget.h:280
is64Bit
static bool is64Bit(const char *name)
Definition: X86Disassembler.cpp:1018
llvm::CodeModel::Medium
@ Medium
Definition: CodeGen.h:28
llvm::createX86InstructionSelector
InstructionSelector * createX86InstructionSelector(const X86TargetMachine &TM, X86Subtarget &, X86RegisterBankInfo &)
Definition: X86InstructionSelector.cpp:1691
llvm::X86Subtarget
Definition: X86Subtarget.h:52
ErrorHandling.h
llvm::PICStyles::Style::StubPIC
@ StubPIC
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::X86Subtarget::isLegalToCallImmediateAddr
bool isLegalToCallImmediateAddr() const
Return true if the subtarget allows calls to immediate address.
Definition: X86Subtarget.cpp:248
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:139
llvm::X86Subtarget::isTargetNaCl
bool isTargetNaCl() const
Definition: X86Subtarget.h:284
llvm::TargetMachine::getRelocationModel
Reloc::Model getRelocationModel() const
Returns the code generation relocation model.
Definition: TargetMachine.cpp:68
llvm::X86CallLowering
Definition: X86CallLowering.h:25
InstructionSelect.h
llvm::Optional
Definition: APInt.h:33
llvm::CodeModel::Kernel
@ Kernel
Definition: CodeGen.h:28
llvm::X86II::MO_GOTOFF
@ MO_GOTOFF
MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of th...
Definition: X86BaseInfo.h:434
llvm::X86Subtarget::X86Subtarget
X86Subtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const X86TargetMachine &TM, MaybeAlign StackAlignOverride, unsigned PreferVectorWidthOverride, unsigned RequiredVectorWidth)
This constructor initializes the data members to match that of the specified triple.
Definition: X86Subtarget.cpp:313
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::X86II::MO_GOT
@ MO_GOT
MO_GOT - On a symbol operand this indicates that the immediate is the offset to the GOT entry for the...
Definition: X86BaseInfo.h:427
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::X86Subtarget::ParseSubtargetFeatures
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
llvm::createX86MacroFusionDAGMutation
std::unique_ptr< ScheduleDAGMutation > createX86MacroFusionDAGMutation()
Note that you have to add: DAG.addMutation(createX86MacroFusionDAGMutation()); to X86PassConfig::crea...
Definition: X86MacroFusion.cpp:71
CommandLine.h
llvm::X86II::MO_COFFSTUB
@ MO_COFFSTUB
MO_COFFSTUB - On a symbol operand "FOO", this indicates that the reference is actually to the "....
Definition: X86BaseInfo.h:575
X86.h
GlobalValue.h
TargetMachine.h
llvm::X86Subtarget::isTargetKFreeBSD
bool isTargetKFreeBSD() const
Definition: X86Subtarget.h:281
X86MacroFusion.h
llvm::X86II::MO_PLT
@ MO_PLT
MO_PLT - On a symbol operand this indicates that the immediate is offset to the PLT entry of symbol n...
Definition: X86BaseInfo.h:454
llvm::X86Subtarget::isTargetWin32
bool isTargetWin32() const
Definition: X86Subtarget.h:316
llvm::Legalizer
Definition: Legalizer.h:36
llvm::X86Subtarget::getRegisterInfo
const X86RegisterInfo * getRegisterInfo() const override
Definition: X86Subtarget.h:138
llvm::X86II::MO_GOTPCREL
@ MO_GOTPCREL
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
Definition: X86BaseInfo.h:442
llvm::MaybeAlign
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Definition: Alignment.h:117
llvm::CodeModel::Small
@ Small
Definition: CodeGen.h:28
llvm::X86II::MO_NO_FLAG
@ MO_NO_FLAG
Definition: X86BaseInfo.h:410
llvm::X86Subtarget::getPostRAMutations
void getPostRAMutations(std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
Definition: X86Subtarget.cpp:365
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:143
llvm::X86II::MO_GOTPCREL_NORELAX
@ MO_GOTPCREL_NORELAX
MO_GOTPCREL_NORELAX - Same as MO_GOTPCREL except that R_X86_64_GOTPCREL relocations are guaranteed to...
Definition: X86BaseInfo.h:447
llvm::X86Subtarget::classifyGlobalReference
unsigned char classifyGlobalReference(const GlobalValue *GV, const Module &M) const
Definition: X86Subtarget.cpp:132
llvm::X86Subtarget::getLegalizerInfo
const LegalizerInfo * getLegalizerInfo() const override
Definition: X86Subtarget.cpp:353
Align
uint64_t Align
Definition: ELFObjHandler.cpp:81
llvm::X86Subtarget::isOSWindows
bool isOSWindows() const
Definition: X86Subtarget.h:312
llvm::PICStyles::Style::RIPRel
@ RIPRel
llvm::X86Subtarget::isTargetELF
bool isTargetELF() const
Definition: X86Subtarget.h:276
llvm::None
const NoneType None
Definition: None.h:24
llvm::X86Subtarget::classifyLocalReference
unsigned char classifyLocalReference(const GlobalValue *GV) const
Classify a global variable reference for the current subtarget according to how we should reference i...
Definition: X86Subtarget.cpp:71
llvm::TargetMachine::isPositionIndependent
bool isPositionIndependent() const
Definition: TargetMachine.cpp:41
llvm::X86Subtarget::getRegBankInfo
const RegisterBankInfo * getRegBankInfo() const override
Definition: X86Subtarget.cpp:357
X86GenSubtargetInfo
InstructionSelector.h
llvm::cl::opt< bool >
llvm::X86Subtarget::enableEarlyIfConversion
bool enableEarlyIfConversion() const override
Definition: X86Subtarget.cpp:361
llvm::RegisterBankInfo
Holds all the information related to register banks.
Definition: RegisterBankInfo.h:39
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::InstructionSelector
Provides the logic to select generic machine instructions.
Definition: InstructionSelector.h:424
llvm::X86II::MO_DARWIN_NONLAZY_PIC_BASE
@ MO_DARWIN_NONLAZY_PIC_BASE
MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually...
Definition: X86BaseInfo.h:547
llvm::X86Subtarget::getInstructionSelector
InstructionSelector * getInstructionSelector() const override
Definition: X86Subtarget.cpp:349
llvm::StringRef::empty
constexpr LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:153
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:620
llvm::X86II::MO_PIC_BASE_OFFSET
@ MO_PIC_BASE_OFFSET
MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of th...
Definition: X86BaseInfo.h:420
X86LegalizerInfo.h
X86RegisterBankInfo.h
llvm::X86Subtarget::isTargetCOFF
bool isTargetCOFF() const
Definition: X86Subtarget.h:277
llvm::HexStyle::Style
Style
Definition: MCInstPrinter.h:32
X86EarlyIfConv
static cl::opt< bool > X86EarlyIfConv("x86-early-ifcvt", cl::Hidden, cl::desc("Enable early if-conversion on X86"))
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::X86AS::FS
@ FS
Definition: X86.h:192
llvm::X86Subtarget::getTargetLowering
const X86TargetLowering * getTargetLowering() const override
Definition: X86Subtarget.h:124
llvm::X86TargetMachine
Definition: X86TargetMachine.h:28
llvm::X86Subtarget::canUseCMOV
bool canUseCMOV() const
Definition: X86Subtarget.h:198
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::X86Subtarget::classifyBlockAddressReference
unsigned char classifyBlockAddressReference() const
Classify a blockaddress reference for the current subtarget according to how we should reference it i...
Definition: X86Subtarget.cpp:59
Triple.h
ScheduleDAGMutation.h
llvm::X86Subtarget::isTargetDarwin
bool isTargetDarwin() const
Definition: X86Subtarget.h:270
llvm::X86II::MO_DLLIMPORT
@ MO_DLLIMPORT
MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the reference is actually to the "__imp...
Definition: X86BaseInfo.h:537
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
this
Analysis the ScalarEvolution expression for r is this
Definition: README.txt:8
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::Reloc::Static
@ Static
Definition: CodeGen.h:22
llvm::X86Subtarget::setPICStyle
void setPICStyle(PICStyles::Style Style)
Definition: X86Subtarget.h:189
ConstantRange.h
llvm::TargetMachine::shouldAssumeDSOLocal
bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const
Definition: TargetMachine.cpp:92
llvm::CodeModel::Tiny
@ Tiny
Definition: CodeGen.h:28
llvm::X86RegisterBankInfo
This class provides the information for the target register banks.
Definition: X86RegisterBankInfo.h:43
Attributes.h
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
X86TargetMachine.h
Casting.h
Function.h
llvm::X86Subtarget::classifyGlobalFunctionReference
unsigned char classifyGlobalFunctionReference(const GlobalValue *GV, const Module &M) const
Classify a global function reference for the current subtarget.
Definition: X86Subtarget.cpp:199
llvm::PICStyles::Style::None
@ None
llvm::TargetMachine::getCodeModel
CodeModel::Model getCodeModel() const
Returns the code model.
Definition: TargetMachine.cpp:72
CodeGen.h
llvm::CodeModel::Large
@ Large
Definition: CodeGen.h:28
X86BaseInfo.h
llvm::GlobalValue::getAbsoluteSymbolRange
Optional< ConstantRange > getAbsoluteSymbolRange() const
If this is an absolute symbol reference, returns the range of the symbol, otherwise returns None.
Definition: Globals.cpp:365
llvm::GlobalValue::isDeclarationForLinker
bool isDeclarationForLinker() const
Definition: GlobalValue.h:582
llvm::GlobalValue::hasDLLImportStorageClass
bool hasDLLImportStorageClass() const
Definition: GlobalValue.h:264
llvm::PICStyles::Style::GOT
@ GOT
llvm::X86Subtarget::hasSSE42
bool hasSSE42() const
Definition: X86Subtarget.h:204
llvm::LegalizerInfo
Definition: LegalizerInfo.h:1180
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::X86II::MO_ABS8
@ MO_ABS8
MO_ABS8 - On a symbol operand this indicates that the symbol is known to be an absolute symbol in ran...
Definition: X86BaseInfo.h:570
llvm::X86Subtarget::getCallLowering
const CallLowering * getCallLowering() const override
Methods used by Global ISel.
Definition: X86Subtarget.cpp:345
llvm::cl::desc
Definition: CommandLine.h:405
raw_ostream.h
llvm::X86Subtarget::isPositionIndependent
bool isPositionIndependent() const
Definition: X86Subtarget.cpp:370
llvm::CallLowering
Definition: CallLowering.h:44
llvm::CallingConv::X86_RegCall
@ X86_RegCall
Register calling convention used for parameters transfer optimization.
Definition: CallingConv.h:219
Debug.h
llvm::X86_MC::ParseX86Triple
std::string ParseX86Triple(const Triple &TT)
Definition: X86MCTargetDesc.cpp:45