63#define DEBUG_TYPE "x86tti"
79 std::optional<unsigned>
164 bool Vector = (ClassID == 1);
183 if (ST->
hasAVX512() && PreferVectorWidth >= 512)
185 if (ST->
hasAVX() && PreferVectorWidth >= 256)
187 if (ST->
hasSSE1() && PreferVectorWidth >= 128)
228 if (Opcode == Instruction::Mul && Ty->
isVectorTy() &&
245 assert(ISD &&
"Invalid opcode");
247 if (ISD ==
ISD::MUL && Args.size() == 2 && LT.second.isVector() &&
248 LT.second.getScalarType() == MVT::i32) {
250 bool Op1Signed =
false, Op2Signed =
false;
253 unsigned OpMinSize = std::max(Op1MinSize, Op2MinSize);
254 bool SignedMode = Op1Signed || Op2Signed;
259 if (OpMinSize <= 15 && !ST->isPMADDWDSlow()) {
261 isa<ConstantDataVector>(Args[0]) || isa<ConstantVector>(Args[0]);
263 isa<ConstantDataVector>(Args[1]) || isa<ConstantVector>(Args[1]);
264 bool Op1Sext = isa<SExtInst>(Args[0]) &&
265 (Op1MinSize == 15 || (Op1MinSize < 15 && !ST->
hasSSE41()));
266 bool Op2Sext = isa<SExtInst>(Args[1]) &&
267 (Op2MinSize == 15 || (Op2MinSize < 15 && !ST->
hasSSE41()));
269 bool IsZeroExtended = !Op1Signed || !Op2Signed;
270 bool IsConstant = Op1Constant || Op2Constant;
271 bool IsSext = Op1Sext || Op2Sext;
272 if (IsConstant || IsZeroExtended || IsSext)
280 if (ST->useSLMArithCosts() && LT.second == MVT::v4i32) {
283 if (!SignedMode && OpMinSize <= 8)
287 if (!SignedMode && OpMinSize <= 16)
341 {
ISD::SHL, MVT::v16i8, { 1, 7, 2, 3 } },
342 {
ISD::SRL, MVT::v16i8, { 1, 7, 2, 3 } },
343 {
ISD::SRA, MVT::v16i8, { 1, 8, 4, 5 } },
344 {
ISD::SHL, MVT::v32i8, { 1, 8, 2, 3 } },
345 {
ISD::SRL, MVT::v32i8, { 1, 8, 2, 3 } },
346 {
ISD::SRA, MVT::v32i8, { 1, 9, 4, 5 } },
347 {
ISD::SHL, MVT::v64i8, { 1, 8, 2, 3 } },
348 {
ISD::SRL, MVT::v64i8, { 1, 8, 2, 3 } },
349 {
ISD::SRA, MVT::v64i8, { 1, 9, 4, 6 } },
351 {
ISD::SHL, MVT::v16i16, { 1, 1, 1, 1 } },
352 {
ISD::SRL, MVT::v16i16, { 1, 1, 1, 1 } },
353 {
ISD::SRA, MVT::v16i16, { 1, 1, 1, 1 } },
354 {
ISD::SHL, MVT::v32i16, { 1, 1, 1, 1 } },
355 {
ISD::SRL, MVT::v32i16, { 1, 1, 1, 1 } },
356 {
ISD::SRA, MVT::v32i16, { 1, 1, 1, 1 } },
360 if (
const auto *Entry =
362 if (
auto KindCost = Entry->Cost[
CostKind])
363 return LT.first * *KindCost;
366 {
ISD::SHL, MVT::v64i8, { 2, 12, 5, 6 } },
367 {
ISD::SRL, MVT::v64i8, { 2, 12, 5, 6 } },
368 {
ISD::SRA, MVT::v64i8, { 3, 10, 12, 12 } },
370 {
ISD::SHL, MVT::v16i16, { 2, 7, 4, 4 } },
371 {
ISD::SRL, MVT::v16i16, { 2, 7, 4, 4 } },
372 {
ISD::SRA, MVT::v16i16, { 2, 7, 4, 4 } },
374 {
ISD::SHL, MVT::v8i32, { 1, 1, 1, 1 } },
375 {
ISD::SRL, MVT::v8i32, { 1, 1, 1, 1 } },
376 {
ISD::SRA, MVT::v8i32, { 1, 1, 1, 1 } },
377 {
ISD::SHL, MVT::v16i32, { 1, 1, 1, 1 } },
378 {
ISD::SRL, MVT::v16i32, { 1, 1, 1, 1 } },
379 {
ISD::SRA, MVT::v16i32, { 1, 1, 1, 1 } },
381 {
ISD::SRA, MVT::v2i64, { 1, 1, 1, 1 } },
382 {
ISD::SHL, MVT::v4i64, { 1, 1, 1, 1 } },
383 {
ISD::SRL, MVT::v4i64, { 1, 1, 1, 1 } },
384 {
ISD::SRA, MVT::v4i64, { 1, 1, 1, 1 } },
385 {
ISD::SHL, MVT::v8i64, { 1, 1, 1, 1 } },
386 {
ISD::SRL, MVT::v8i64, { 1, 1, 1, 1 } },
387 {
ISD::SRA, MVT::v8i64, { 1, 1, 1, 1 } },
396 if (
const auto *Entry =
398 if (
auto KindCost = Entry->Cost[
CostKind])
399 return LT.first * *KindCost;
402 {
ISD::SHL, MVT::v16i8, { 1, 8, 2, 3 } },
403 {
ISD::SRL, MVT::v16i8, { 1, 8, 2, 3 } },
404 {
ISD::SRA, MVT::v16i8, { 2, 10, 5, 6 } },
405 {
ISD::SHL, MVT::v32i8, { 2, 8, 2, 4 } },
406 {
ISD::SRL, MVT::v32i8, { 2, 8, 2, 4 } },
407 {
ISD::SRA, MVT::v32i8, { 3, 10, 5, 9 } },
409 {
ISD::SHL, MVT::v8i16, { 1, 1, 1, 1 } },
410 {
ISD::SRL, MVT::v8i16, { 1, 1, 1, 1 } },
411 {
ISD::SRA, MVT::v8i16, { 1, 1, 1, 1 } },
412 {
ISD::SHL, MVT::v16i16,{ 2, 2, 1, 2 } },
413 {
ISD::SRL, MVT::v16i16,{ 2, 2, 1, 2 } },
414 {
ISD::SRA, MVT::v16i16,{ 2, 2, 1, 2 } },
416 {
ISD::SHL, MVT::v4i32, { 1, 1, 1, 1 } },
417 {
ISD::SRL, MVT::v4i32, { 1, 1, 1, 1 } },
418 {
ISD::SRA, MVT::v4i32, { 1, 1, 1, 1 } },
419 {
ISD::SHL, MVT::v8i32, { 2, 2, 1, 2 } },
420 {
ISD::SRL, MVT::v8i32, { 2, 2, 1, 2 } },
421 {
ISD::SRA, MVT::v8i32, { 2, 2, 1, 2 } },
423 {
ISD::SHL, MVT::v2i64, { 1, 1, 1, 1 } },
424 {
ISD::SRL, MVT::v2i64, { 1, 1, 1, 1 } },
425 {
ISD::SRA, MVT::v2i64, { 2, 3, 3, 3 } },
426 {
ISD::SHL, MVT::v4i64, { 2, 2, 1, 2 } },
427 {
ISD::SRL, MVT::v4i64, { 2, 2, 1, 2 } },
428 {
ISD::SRA, MVT::v4i64, { 4, 4, 3, 6 } },
437 if (
const auto *Entry =
439 if (
auto KindCost = Entry->Cost[
CostKind])
440 return LT.first * *KindCost;
443 {
ISD::SHL, MVT::v16i8, { 2, 7, 2, 3 } },
444 {
ISD::SRL, MVT::v16i8, { 2, 7, 2, 3 } },
445 {
ISD::SRA, MVT::v16i8, { 3, 9, 5, 6 } },
446 {
ISD::SHL, MVT::v32i8, { 4, 7, 7, 8 } },
447 {
ISD::SRL, MVT::v32i8, { 4, 7, 7, 8 } },
448 {
ISD::SRA, MVT::v32i8, { 7, 7, 12, 13 } },
450 {
ISD::SHL, MVT::v8i16, { 1, 2, 1, 1 } },
451 {
ISD::SRL, MVT::v8i16, { 1, 2, 1, 1 } },
452 {
ISD::SRA, MVT::v8i16, { 1, 2, 1, 1 } },
453 {
ISD::SHL, MVT::v16i16,{ 3, 6, 4, 5 } },
454 {
ISD::SRL, MVT::v16i16,{ 3, 6, 4, 5 } },
455 {
ISD::SRA, MVT::v16i16,{ 3, 6, 4, 5 } },
457 {
ISD::SHL, MVT::v4i32, { 1, 2, 1, 1 } },
458 {
ISD::SRL, MVT::v4i32, { 1, 2, 1, 1 } },
459 {
ISD::SRA, MVT::v4i32, { 1, 2, 1, 1 } },
460 {
ISD::SHL, MVT::v8i32, { 3, 6, 4, 5 } },
461 {
ISD::SRL, MVT::v8i32, { 3, 6, 4, 5 } },
462 {
ISD::SRA, MVT::v8i32, { 3, 6, 4, 5 } },
464 {
ISD::SHL, MVT::v2i64, { 1, 2, 1, 1 } },
465 {
ISD::SRL, MVT::v2i64, { 1, 2, 1, 1 } },
466 {
ISD::SRA, MVT::v2i64, { 2, 3, 3, 3 } },
467 {
ISD::SHL, MVT::v4i64, { 3, 6, 4, 5 } },
468 {
ISD::SRL, MVT::v4i64, { 3, 6, 4, 5 } },
469 {
ISD::SRA, MVT::v4i64, { 5, 7, 8, 9 } },
479 (!ST->hasXOP() || LT.second.getScalarSizeInBits() != 8))
480 if (
const auto *Entry =
482 if (
auto KindCost = Entry->Cost[
CostKind])
483 return LT.first * *KindCost;
486 {
ISD::SHL, MVT::v16i8, { 1, 7, 2, 3 } },
487 {
ISD::SRL, MVT::v16i8, { 1, 7, 2, 3 } },
488 {
ISD::SRA, MVT::v16i8, { 3, 9, 5, 6 } },
490 {
ISD::SHL, MVT::v8i16, { 1, 1, 1, 1 } },
491 {
ISD::SRL, MVT::v8i16, { 1, 1, 1, 1 } },
492 {
ISD::SRA, MVT::v8i16, { 1, 1, 1, 1 } },
494 {
ISD::SHL, MVT::v4i32, { 1, 1, 1, 1 } },
495 {
ISD::SRL, MVT::v4i32, { 1, 1, 1, 1 } },
496 {
ISD::SRA, MVT::v4i32, { 1, 1, 1, 1 } },
498 {
ISD::SHL, MVT::v2i64, { 1, 1, 1, 1 } },
499 {
ISD::SRL, MVT::v2i64, { 1, 1, 1, 1 } },
500 {
ISD::SRA, MVT::v2i64, { 3, 5, 6, 6 } },
510 (!ST->hasXOP() || LT.second.getScalarSizeInBits() != 8))
511 if (
const auto *Entry =
513 if (
auto KindCost = Entry->Cost[
CostKind])
514 return LT.first * *KindCost;
529 if (
const auto *Entry =
531 if (
auto KindCost = Entry->Cost[
CostKind])
532 return LT.first * *KindCost;
552 if (
const auto *Entry =
554 if (
auto KindCost = Entry->Cost[
CostKind])
555 return LT.first * *KindCost;
575 if (
const auto *Entry =
CostTableLookup(AVX2ConstCostTable, ISD, LT.second))
576 if (
auto KindCost = Entry->Cost[
CostKind])
577 return LT.first * *KindCost;
597 if (
const auto *Entry =
CostTableLookup(AVXConstCostTable, ISD, LT.second))
598 if (
auto KindCost = Entry->Cost[
CostKind])
599 return LT.first * *KindCost;
607 if (
const auto *Entry =
609 if (
auto KindCost = Entry->Cost[
CostKind])
610 return LT.first * *KindCost;
630 if (
const auto *Entry =
CostTableLookup(SSE2ConstCostTable, ISD, LT.second))
631 if (
auto KindCost = Entry->Cost[
CostKind])
632 return LT.first * *KindCost;
635 {
ISD::SHL, MVT::v16i8, { 3, 5, 5, 7 } },
636 {
ISD::SRL, MVT::v16i8, { 3,10, 5, 8 } },
637 {
ISD::SRA, MVT::v16i8, { 4,12, 8,12 } },
638 {
ISD::SHL, MVT::v32i8, { 4, 7, 6, 8 } },
639 {
ISD::SRL, MVT::v32i8, { 4, 8, 7, 9 } },
640 {
ISD::SRA, MVT::v32i8, { 5,10,10,13 } },
641 {
ISD::SHL, MVT::v64i8, { 4, 7, 6, 8 } },
642 {
ISD::SRL, MVT::v64i8, { 4, 8, 7,10 } },
643 {
ISD::SRA, MVT::v64i8, { 5,10,10,15 } },
645 {
ISD::SHL, MVT::v32i16, { 2, 4, 2, 3 } },
646 {
ISD::SRL, MVT::v32i16, { 2, 4, 2, 3 } },
647 {
ISD::SRA, MVT::v32i16, { 2, 4, 2, 3 } },
651 if (
const auto *Entry =
653 if (
auto KindCost = Entry->Cost[
CostKind])
654 return LT.first * *KindCost;
657 {
ISD::SHL, MVT::v32i16, { 5,10, 5, 7 } },
658 {
ISD::SRL, MVT::v32i16, { 5,10, 5, 7 } },
659 {
ISD::SRA, MVT::v32i16, { 5,10, 5, 7 } },
661 {
ISD::SHL, MVT::v16i32, { 2, 4, 2, 3 } },
662 {
ISD::SRL, MVT::v16i32, { 2, 4, 2, 3 } },
663 {
ISD::SRA, MVT::v16i32, { 2, 4, 2, 3 } },
665 {
ISD::SRA, MVT::v2i64, { 1, 2, 1, 2 } },
666 {
ISD::SHL, MVT::v4i64, { 1, 4, 1, 2 } },
667 {
ISD::SRL, MVT::v4i64, { 1, 4, 1, 2 } },
668 {
ISD::SRA, MVT::v4i64, { 1, 4, 1, 2 } },
669 {
ISD::SHL, MVT::v8i64, { 1, 4, 1, 2 } },
670 {
ISD::SRL, MVT::v8i64, { 1, 4, 1, 2 } },
671 {
ISD::SRA, MVT::v8i64, { 1, 4, 1, 2 } },
675 if (
const auto *Entry =
677 if (
auto KindCost = Entry->Cost[
CostKind])
678 return LT.first * *KindCost;
682 {
ISD::SHL, MVT::v16i8, { 3, 5, 5, 7 } },
683 {
ISD::SRL, MVT::v16i8, { 3, 9, 5, 8 } },
684 {
ISD::SRA, MVT::v16i8, { 4, 5, 9,13 } },
685 {
ISD::SHL, MVT::v32i8, { 4, 7, 6, 8 } },
686 {
ISD::SRL, MVT::v32i8, { 4, 8, 7, 9 } },
687 {
ISD::SRA, MVT::v32i8, { 6, 9,11,16 } },
689 {
ISD::SHL, MVT::v8i16, { 1, 2, 1, 2 } },
690 {
ISD::SRL, MVT::v8i16, { 1, 2, 1, 2 } },
691 {
ISD::SRA, MVT::v8i16, { 1, 2, 1, 2 } },
692 {
ISD::SHL, MVT::v16i16, { 2, 4, 2, 3 } },
693 {
ISD::SRL, MVT::v16i16, { 2, 4, 2, 3 } },
694 {
ISD::SRA, MVT::v16i16, { 2, 4, 2, 3 } },
696 {
ISD::SHL, MVT::v4i32, { 1, 2, 1, 2 } },
697 {
ISD::SRL, MVT::v4i32, { 1, 2, 1, 2 } },
698 {
ISD::SRA, MVT::v4i32, { 1, 2, 1, 2 } },
699 {
ISD::SHL, MVT::v8i32, { 2, 4, 2, 3 } },
700 {
ISD::SRL, MVT::v8i32, { 2, 4, 2, 3 } },
701 {
ISD::SRA, MVT::v8i32, { 2, 4, 2, 3 } },
703 {
ISD::SHL, MVT::v2i64, { 1, 2, 1, 2 } },
704 {
ISD::SRL, MVT::v2i64, { 1, 2, 1, 2 } },
705 {
ISD::SRA, MVT::v2i64, { 2, 4, 5, 7 } },
706 {
ISD::SHL, MVT::v4i64, { 2, 4, 1, 2 } },
707 {
ISD::SRL, MVT::v4i64, { 2, 4, 1, 2 } },
708 {
ISD::SRA, MVT::v4i64, { 4, 6, 5, 9 } },
712 if (
const auto *Entry =
714 if (
auto KindCost = Entry->Cost[
CostKind])
715 return LT.first * *KindCost;
718 {
ISD::SHL, MVT::v16i8, { 4, 4, 6, 8 } },
719 {
ISD::SRL, MVT::v16i8, { 4, 8, 5, 8 } },
720 {
ISD::SRA, MVT::v16i8, { 6, 6, 9,13 } },
721 {
ISD::SHL, MVT::v32i8, { 7, 8,11,14 } },
722 {
ISD::SRL, MVT::v32i8, { 7, 9,10,14 } },
723 {
ISD::SRA, MVT::v32i8, { 10,11,16,21 } },
725 {
ISD::SHL, MVT::v8i16, { 1, 3, 1, 2 } },
726 {
ISD::SRL, MVT::v8i16, { 1, 3, 1, 2 } },
727 {
ISD::SRA, MVT::v8i16, { 1, 3, 1, 2 } },
728 {
ISD::SHL, MVT::v16i16, { 3, 7, 5, 7 } },
729 {
ISD::SRL, MVT::v16i16, { 3, 7, 5, 7 } },
730 {
ISD::SRA, MVT::v16i16, { 3, 7, 5, 7 } },
732 {
ISD::SHL, MVT::v4i32, { 1, 3, 1, 2 } },
733 {
ISD::SRL, MVT::v4i32, { 1, 3, 1, 2 } },
734 {
ISD::SRA, MVT::v4i32, { 1, 3, 1, 2 } },
735 {
ISD::SHL, MVT::v8i32, { 3, 7, 5, 7 } },
736 {
ISD::SRL, MVT::v8i32, { 3, 7, 5, 7 } },
737 {
ISD::SRA, MVT::v8i32, { 3, 7, 5, 7 } },
739 {
ISD::SHL, MVT::v2i64, { 1, 3, 1, 2 } },
740 {
ISD::SRL, MVT::v2i64, { 1, 3, 1, 2 } },
741 {
ISD::SRA, MVT::v2i64, { 3, 4, 5, 7 } },
742 {
ISD::SHL, MVT::v4i64, { 3, 7, 4, 6 } },
743 {
ISD::SRL, MVT::v4i64, { 3, 7, 4, 6 } },
744 {
ISD::SRA, MVT::v4i64, { 6, 7,10,13 } },
749 (!ST->hasXOP() || LT.second.getScalarSizeInBits() != 8))
750 if (
const auto *Entry =
752 if (
auto KindCost = Entry->Cost[
CostKind])
753 return LT.first * *KindCost;
757 {
ISD::SHL, MVT::v16i8, { 9, 10, 6, 9 } },
758 {
ISD::SRL, MVT::v16i8, { 9, 13, 5, 9 } },
759 {
ISD::SRA, MVT::v16i8, { 11, 15, 9,13 } },
761 {
ISD::SHL, MVT::v8i16, { 2, 2, 1, 2 } },
762 {
ISD::SRL, MVT::v8i16, { 2, 2, 1, 2 } },
763 {
ISD::SRA, MVT::v8i16, { 2, 2, 1, 2 } },
765 {
ISD::SHL, MVT::v4i32, { 2, 2, 1, 2 } },
766 {
ISD::SRL, MVT::v4i32, { 2, 2, 1, 2 } },
767 {
ISD::SRA, MVT::v4i32, { 2, 2, 1, 2 } },
769 {
ISD::SHL, MVT::v2i64, { 2, 2, 1, 2 } },
770 {
ISD::SRL, MVT::v2i64, { 2, 2, 1, 2 } },
771 {
ISD::SRA, MVT::v2i64, { 5, 9, 5, 7 } },
775 (!ST->hasXOP() || LT.second.getScalarSizeInBits() != 8))
776 if (
const auto *Entry =
778 if (
auto KindCost = Entry->Cost[
CostKind])
779 return LT.first * *KindCost;
782 {
ISD::MUL, MVT::v2i64, { 2, 15, 1, 3 } },
783 {
ISD::MUL, MVT::v4i64, { 2, 15, 1, 3 } },
784 {
ISD::MUL, MVT::v8i64, { 3, 15, 1, 3 } }
789 if (
const auto *Entry =
CostTableLookup(AVX512DQCostTable, ISD, LT.second))
790 if (
auto KindCost = Entry->Cost[
CostKind])
791 return LT.first * *KindCost;
794 {
ISD::SHL, MVT::v16i8, { 4, 8, 4, 5 } },
795 {
ISD::SRL, MVT::v16i8, { 4, 8, 4, 5 } },
796 {
ISD::SRA, MVT::v16i8, { 4, 8, 4, 5 } },
797 {
ISD::SHL, MVT::v32i8, { 4, 23,11,16 } },
798 {
ISD::SRL, MVT::v32i8, { 4, 30,12,18 } },
799 {
ISD::SRA, MVT::v32i8, { 6, 13,24,30 } },
800 {
ISD::SHL, MVT::v64i8, { 6, 19,13,15 } },
801 {
ISD::SRL, MVT::v64i8, { 7, 27,15,18 } },
802 {
ISD::SRA, MVT::v64i8, { 15, 15,30,30 } },
804 {
ISD::SHL, MVT::v8i16, { 1, 1, 1, 1 } },
805 {
ISD::SRL, MVT::v8i16, { 1, 1, 1, 1 } },
806 {
ISD::SRA, MVT::v8i16, { 1, 1, 1, 1 } },
807 {
ISD::SHL, MVT::v16i16, { 1, 1, 1, 1 } },
808 {
ISD::SRL, MVT::v16i16, { 1, 1, 1, 1 } },
809 {
ISD::SRA, MVT::v16i16, { 1, 1, 1, 1 } },
810 {
ISD::SHL, MVT::v32i16, { 1, 1, 1, 1 } },
811 {
ISD::SRL, MVT::v32i16, { 1, 1, 1, 1 } },
812 {
ISD::SRA, MVT::v32i16, { 1, 1, 1, 1 } },
814 {
ISD::ADD, MVT::v64i8, { 1, 1, 1, 1 } },
815 {
ISD::ADD, MVT::v32i16, { 1, 1, 1, 1 } },
817 {
ISD::ADD, MVT::v32i8, { 1, 1, 1, 1 } },
818 {
ISD::ADD, MVT::v16i16, { 1, 1, 1, 1 } },
819 {
ISD::ADD, MVT::v8i32, { 1, 1, 1, 1 } },
820 {
ISD::ADD, MVT::v4i64, { 1, 1, 1, 1 } },
822 {
ISD::SUB, MVT::v64i8, { 1, 1, 1, 1 } },
823 {
ISD::SUB, MVT::v32i16, { 1, 1, 1, 1 } },
825 {
ISD::MUL, MVT::v64i8, { 5, 10,10,11 } },
826 {
ISD::MUL, MVT::v32i16, { 1, 5, 1, 1 } },
828 {
ISD::SUB, MVT::v32i8, { 1, 1, 1, 1 } },
829 {
ISD::SUB, MVT::v16i16, { 1, 1, 1, 1 } },
830 {
ISD::SUB, MVT::v8i32, { 1, 1, 1, 1 } },
831 {
ISD::SUB, MVT::v4i64, { 1, 1, 1, 1 } },
836 if (
const auto *Entry =
CostTableLookup(AVX512BWCostTable, ISD, LT.second))
837 if (
auto KindCost = Entry->Cost[
CostKind])
838 return LT.first * *KindCost;
841 {
ISD::SHL, MVT::v64i8, { 15, 19,27,33 } },
842 {
ISD::SRL, MVT::v64i8, { 15, 19,30,36 } },
843 {
ISD::SRA, MVT::v64i8, { 37, 37,51,63 } },
845 {
ISD::SHL, MVT::v32i16, { 11, 16,11,15 } },
846 {
ISD::SRL, MVT::v32i16, { 11, 16,11,15 } },
847 {
ISD::SRA, MVT::v32i16, { 11, 16,11,15 } },
849 {
ISD::SHL, MVT::v4i32, { 1, 1, 1, 1 } },
850 {
ISD::SRL, MVT::v4i32, { 1, 1, 1, 1 } },
851 {
ISD::SRA, MVT::v4i32, { 1, 1, 1, 1 } },
852 {
ISD::SHL, MVT::v8i32, { 1, 1, 1, 1 } },
853 {
ISD::SRL, MVT::v8i32, { 1, 1, 1, 1 } },
854 {
ISD::SRA, MVT::v8i32, { 1, 1, 1, 1 } },
855 {
ISD::SHL, MVT::v16i32, { 1, 1, 1, 1 } },
856 {
ISD::SRL, MVT::v16i32, { 1, 1, 1, 1 } },
857 {
ISD::SRA, MVT::v16i32, { 1, 1, 1, 1 } },
859 {
ISD::SHL, MVT::v2i64, { 1, 1, 1, 1 } },
860 {
ISD::SRL, MVT::v2i64, { 1, 1, 1, 1 } },
861 {
ISD::SRA, MVT::v2i64, { 1, 1, 1, 1 } },
862 {
ISD::SHL, MVT::v4i64, { 1, 1, 1, 1 } },
863 {
ISD::SRL, MVT::v4i64, { 1, 1, 1, 1 } },
864 {
ISD::SRA, MVT::v4i64, { 1, 1, 1, 1 } },
865 {
ISD::SHL, MVT::v8i64, { 1, 1, 1, 1 } },
866 {
ISD::SRL, MVT::v8i64, { 1, 1, 1, 1 } },
867 {
ISD::SRA, MVT::v8i64, { 1, 1, 1, 1 } },
869 {
ISD::ADD, MVT::v64i8, { 3, 7, 5, 5 } },
870 {
ISD::ADD, MVT::v32i16, { 3, 7, 5, 5 } },
872 {
ISD::SUB, MVT::v64i8, { 3, 7, 5, 5 } },
873 {
ISD::SUB, MVT::v32i16, { 3, 7, 5, 5 } },
875 {
ISD::AND, MVT::v32i8, { 1, 1, 1, 1 } },
876 {
ISD::AND, MVT::v16i16, { 1, 1, 1, 1 } },
877 {
ISD::AND, MVT::v8i32, { 1, 1, 1, 1 } },
878 {
ISD::AND, MVT::v4i64, { 1, 1, 1, 1 } },
880 {
ISD::OR, MVT::v32i8, { 1, 1, 1, 1 } },
881 {
ISD::OR, MVT::v16i16, { 1, 1, 1, 1 } },
882 {
ISD::OR, MVT::v8i32, { 1, 1, 1, 1 } },
883 {
ISD::OR, MVT::v4i64, { 1, 1, 1, 1 } },
885 {
ISD::XOR, MVT::v32i8, { 1, 1, 1, 1 } },
886 {
ISD::XOR, MVT::v16i16, { 1, 1, 1, 1 } },
887 {
ISD::XOR, MVT::v8i32, { 1, 1, 1, 1 } },
888 {
ISD::XOR, MVT::v4i64, { 1, 1, 1, 1 } },
890 {
ISD::MUL, MVT::v16i32, { 1, 10, 1, 2 } },
891 {
ISD::MUL, MVT::v8i32, { 1, 10, 1, 2 } },
892 {
ISD::MUL, MVT::v4i32, { 1, 10, 1, 2 } },
893 {
ISD::MUL, MVT::v8i64, { 6, 9, 8, 8 } },
896 {
ISD::FNEG, MVT::v8f64, { 1, 1, 1, 2 } },
897 {
ISD::FADD, MVT::v8f64, { 1, 4, 1, 1 } },
898 {
ISD::FADD, MVT::v4f64, { 1, 4, 1, 1 } },
899 {
ISD::FSUB, MVT::v8f64, { 1, 4, 1, 1 } },
900 {
ISD::FSUB, MVT::v4f64, { 1, 4, 1, 1 } },
901 {
ISD::FMUL, MVT::v8f64, { 1, 4, 1, 1 } },
902 {
ISD::FMUL, MVT::v4f64, { 1, 4, 1, 1 } },
903 {
ISD::FMUL, MVT::v2f64, { 1, 4, 1, 1 } },
906 {
ISD::FDIV, MVT::f64, { 4, 14, 1, 1 } },
907 {
ISD::FDIV, MVT::v2f64, { 4, 14, 1, 1 } },
908 {
ISD::FDIV, MVT::v4f64, { 8, 14, 1, 1 } },
909 {
ISD::FDIV, MVT::v8f64, { 16, 23, 1, 3 } },
911 {
ISD::FNEG, MVT::v16f32, { 1, 1, 1, 2 } },
912 {
ISD::FADD, MVT::v16f32, { 1, 4, 1, 1 } },
913 {
ISD::FADD, MVT::v8f32, { 1, 4, 1, 1 } },
914 {
ISD::FSUB, MVT::v16f32, { 1, 4, 1, 1 } },
915 {
ISD::FSUB, MVT::v8f32, { 1, 4, 1, 1 } },
916 {
ISD::FMUL, MVT::v16f32, { 1, 4, 1, 1 } },
917 {
ISD::FMUL, MVT::v8f32, { 1, 4, 1, 1 } },
918 {
ISD::FMUL, MVT::v4f32, { 1, 4, 1, 1 } },
921 {
ISD::FDIV, MVT::f32, { 3, 11, 1, 1 } },
922 {
ISD::FDIV, MVT::v4f32, { 3, 11, 1, 1 } },
923 {
ISD::FDIV, MVT::v8f32, { 5, 11, 1, 1 } },
924 {
ISD::FDIV, MVT::v16f32, { 10, 18, 1, 3 } },
928 if (
const auto *Entry =
CostTableLookup(AVX512CostTable, ISD, LT.second))
929 if (
auto KindCost = Entry->Cost[
CostKind])
930 return LT.first * *KindCost;
935 {
ISD::SHL, MVT::v4i32, { 2, 3, 1, 3 } },
936 {
ISD::SRL, MVT::v4i32, { 2, 3, 1, 3 } },
937 {
ISD::SRA, MVT::v4i32, { 2, 3, 1, 3 } },
938 {
ISD::SHL, MVT::v8i32, { 4, 4, 1, 3 } },
939 {
ISD::SRL, MVT::v8i32, { 4, 4, 1, 3 } },
940 {
ISD::SRA, MVT::v8i32, { 4, 4, 1, 3 } },
941 {
ISD::SHL, MVT::v2i64, { 2, 3, 1, 1 } },
942 {
ISD::SRL, MVT::v2i64, { 2, 3, 1, 1 } },
943 {
ISD::SHL, MVT::v4i64, { 4, 4, 1, 2 } },
944 {
ISD::SRL, MVT::v4i64, { 4, 4, 1, 2 } },
956 if (ST->
hasAVX2() && !(ST->hasXOP() && LT.second == MVT::v4i32)) {
957 if (ISD ==
ISD::SHL && LT.second == MVT::v16i16 &&
964 if (
const auto *Entry =
CostTableLookup(AVX2ShiftCostTable, ISD, LT.second))
965 if (
auto KindCost = Entry->Cost[
CostKind])
966 return LT.first * *KindCost;
971 {
ISD::SHL, MVT::v16i8, { 1, 3, 1, 1 } },
972 {
ISD::SRL, MVT::v16i8, { 2, 3, 1, 1 } },
973 {
ISD::SRA, MVT::v16i8, { 2, 3, 1, 1 } },
974 {
ISD::SHL, MVT::v8i16, { 1, 3, 1, 1 } },
975 {
ISD::SRL, MVT::v8i16, { 2, 3, 1, 1 } },
976 {
ISD::SRA, MVT::v8i16, { 2, 3, 1, 1 } },
977 {
ISD::SHL, MVT::v4i32, { 1, 3, 1, 1 } },
978 {
ISD::SRL, MVT::v4i32, { 2, 3, 1, 1 } },
979 {
ISD::SRA, MVT::v4i32, { 2, 3, 1, 1 } },
980 {
ISD::SHL, MVT::v2i64, { 1, 3, 1, 1 } },
981 {
ISD::SRL, MVT::v2i64, { 2, 3, 1, 1 } },
982 {
ISD::SRA, MVT::v2i64, { 2, 3, 1, 1 } },
984 {
ISD::SHL, MVT::v32i8, { 4, 7, 5, 6 } },
985 {
ISD::SRL, MVT::v32i8, { 6, 7, 5, 6 } },
986 {
ISD::SRA, MVT::v32i8, { 6, 7, 5, 6 } },
987 {
ISD::SHL, MVT::v16i16, { 4, 7, 5, 6 } },
988 {
ISD::SRL, MVT::v16i16, { 6, 7, 5, 6 } },
989 {
ISD::SRA, MVT::v16i16, { 6, 7, 5, 6 } },
990 {
ISD::SHL, MVT::v8i32, { 4, 7, 5, 6 } },
991 {
ISD::SRL, MVT::v8i32, { 6, 7, 5, 6 } },
992 {
ISD::SRA, MVT::v8i32, { 6, 7, 5, 6 } },
993 {
ISD::SHL, MVT::v4i64, { 4, 7, 5, 6 } },
994 {
ISD::SRL, MVT::v4i64, { 6, 7, 5, 6 } },
995 {
ISD::SRA, MVT::v4i64, { 6, 7, 5, 6 } },
1005 if (
const auto *Entry =
1007 if (
auto KindCost = Entry->Cost[
CostKind])
1008 return LT.first * *KindCost;
1015 if (((VT == MVT::v8i16 || VT == MVT::v4i32) && ST->
hasSSE2()) ||
1016 ((VT == MVT::v16i16 || VT == MVT::v8i32) && ST->
hasAVX()))
1021 {
ISD::FDIV, MVT::f32, { 18, 19, 1, 1 } },
1022 {
ISD::FDIV, MVT::v4f32, { 35, 36, 1, 1 } },
1023 {
ISD::FDIV, MVT::f64, { 33, 34, 1, 1 } },
1024 {
ISD::FDIV, MVT::v2f64, { 65, 66, 1, 1 } },
1027 if (ST->useGLMDivSqrtCosts())
1028 if (
const auto *Entry =
CostTableLookup(GLMCostTable, ISD, LT.second))
1029 if (
auto KindCost = Entry->Cost[
CostKind])
1030 return LT.first * *KindCost;
1033 {
ISD::MUL, MVT::v4i32, { 11, 11, 1, 7 } },
1034 {
ISD::MUL, MVT::v8i16, { 2, 5, 1, 1 } },
1035 {
ISD::FMUL, MVT::f64, { 2, 5, 1, 1 } },
1036 {
ISD::FMUL, MVT::f32, { 1, 4, 1, 1 } },
1037 {
ISD::FMUL, MVT::v2f64, { 4, 7, 1, 1 } },
1038 {
ISD::FMUL, MVT::v4f32, { 2, 5, 1, 1 } },
1039 {
ISD::FDIV, MVT::f32, { 17, 19, 1, 1 } },
1040 {
ISD::FDIV, MVT::v4f32, { 39, 39, 1, 6 } },
1041 {
ISD::FDIV, MVT::f64, { 32, 34, 1, 1 } },
1042 {
ISD::FDIV, MVT::v2f64, { 69, 69, 1, 6 } },
1043 {
ISD::FADD, MVT::v2f64, { 2, 4, 1, 1 } },
1044 {
ISD::FSUB, MVT::v2f64, { 2, 4, 1, 1 } },
1050 {
ISD::MUL, MVT::v2i64, { 17, 22, 9, 9 } },
1052 {
ISD::ADD, MVT::v2i64, { 4, 2, 1, 2 } },
1053 {
ISD::SUB, MVT::v2i64, { 4, 2, 1, 2 } },
1056 if (ST->useSLMArithCosts())
1057 if (
const auto *Entry =
CostTableLookup(SLMCostTable, ISD, LT.second))
1058 if (
auto KindCost = Entry->Cost[
CostKind])
1059 return LT.first * *KindCost;
1062 {
ISD::SHL, MVT::v16i8, { 6, 21,11,16 } },
1063 {
ISD::SHL, MVT::v32i8, { 6, 23,11,22 } },
1064 {
ISD::SHL, MVT::v8i16, { 5, 18, 5,10 } },
1065 {
ISD::SHL, MVT::v16i16, { 8, 10,10,14 } },
1067 {
ISD::SRL, MVT::v16i8, { 6, 27,12,18 } },
1068 {
ISD::SRL, MVT::v32i8, { 8, 30,12,24 } },
1069 {
ISD::SRL, MVT::v8i16, { 5, 11, 5,10 } },
1070 {
ISD::SRL, MVT::v16i16, { 8, 10,10,14 } },
1072 {
ISD::SRA, MVT::v16i8, { 17, 17,24,30 } },
1073 {
ISD::SRA, MVT::v32i8, { 18, 20,24,43 } },
1074 {
ISD::SRA, MVT::v8i16, { 5, 11, 5,10 } },
1075 {
ISD::SRA, MVT::v16i16, { 8, 10,10,14 } },
1076 {
ISD::SRA, MVT::v2i64, { 4, 5, 5, 5 } },
1077 {
ISD::SRA, MVT::v4i64, { 8, 8, 5, 9 } },
1079 {
ISD::SUB, MVT::v32i8, { 1, 1, 1, 2 } },
1080 {
ISD::ADD, MVT::v32i8, { 1, 1, 1, 2 } },
1081 {
ISD::SUB, MVT::v16i16, { 1, 1, 1, 2 } },
1082 {
ISD::ADD, MVT::v16i16, { 1, 1, 1, 2 } },
1083 {
ISD::SUB, MVT::v8i32, { 1, 1, 1, 2 } },
1084 {
ISD::ADD, MVT::v8i32, { 1, 1, 1, 2 } },
1085 {
ISD::SUB, MVT::v4i64, { 1, 1, 1, 2 } },
1086 {
ISD::ADD, MVT::v4i64, { 1, 1, 1, 2 } },
1088 {
ISD::MUL, MVT::v16i8, { 5, 18, 6,12 } },
1089 {
ISD::MUL, MVT::v32i8, { 6, 11,10,19 } },
1090 {
ISD::MUL, MVT::v16i16, { 2, 5, 1, 2 } },
1091 {
ISD::MUL, MVT::v8i32, { 4, 10, 1, 2 } },
1092 {
ISD::MUL, MVT::v4i32, { 2, 10, 1, 2 } },
1093 {
ISD::MUL, MVT::v4i64, { 6, 10, 8,13 } },
1094 {
ISD::MUL, MVT::v2i64, { 6, 10, 8, 8 } },
1096 {
ISD::FNEG, MVT::v4f64, { 1, 1, 1, 2 } },
1097 {
ISD::FNEG, MVT::v8f32, { 1, 1, 1, 2 } },
1099 {
ISD::FADD, MVT::f64, { 1, 4, 1, 1 } },
1100 {
ISD::FADD, MVT::f32, { 1, 4, 1, 1 } },
1101 {
ISD::FADD, MVT::v2f64, { 1, 4, 1, 1 } },
1102 {
ISD::FADD, MVT::v4f32, { 1, 4, 1, 1 } },
1103 {
ISD::FADD, MVT::v4f64, { 1, 4, 1, 2 } },
1104 {
ISD::FADD, MVT::v8f32, { 1, 4, 1, 2 } },
1106 {
ISD::FSUB, MVT::f64, { 1, 4, 1, 1 } },
1107 {
ISD::FSUB, MVT::f32, { 1, 4, 1, 1 } },
1108 {
ISD::FSUB, MVT::v2f64, { 1, 4, 1, 1 } },
1109 {
ISD::FSUB, MVT::v4f32, { 1, 4, 1, 1 } },
1110 {
ISD::FSUB, MVT::v4f64, { 1, 4, 1, 2 } },
1111 {
ISD::FSUB, MVT::v8f32, { 1, 4, 1, 2 } },
1113 {
ISD::FMUL, MVT::f64, { 1, 5, 1, 1 } },
1114 {
ISD::FMUL, MVT::f32, { 1, 5, 1, 1 } },
1115 {
ISD::FMUL, MVT::v2f64, { 1, 5, 1, 1 } },
1116 {
ISD::FMUL, MVT::v4f32, { 1, 5, 1, 1 } },
1117 {
ISD::FMUL, MVT::v4f64, { 1, 5, 1, 2 } },
1118 {
ISD::FMUL, MVT::v8f32, { 1, 5, 1, 2 } },
1120 {
ISD::FDIV, MVT::f32, { 7, 13, 1, 1 } },
1121 {
ISD::FDIV, MVT::v4f32, { 7, 13, 1, 1 } },
1122 {
ISD::FDIV, MVT::v8f32, { 14, 21, 1, 3 } },
1123 {
ISD::FDIV, MVT::f64, { 14, 20, 1, 1 } },
1124 {
ISD::FDIV, MVT::v2f64, { 14, 20, 1, 1 } },
1125 {
ISD::FDIV, MVT::v4f64, { 28, 35, 1, 3 } },
1130 if (
const auto *Entry =
CostTableLookup(AVX2CostTable, ISD, LT.second))
1131 if (
auto KindCost = Entry->Cost[
CostKind])
1132 return LT.first * *KindCost;
1138 {
ISD::MUL, MVT::v32i8, { 12, 13, 22, 23 } },
1139 {
ISD::MUL, MVT::v16i16, { 4, 8, 5, 6 } },
1140 {
ISD::MUL, MVT::v8i32, { 5, 8, 5, 10 } },
1141 {
ISD::MUL, MVT::v4i32, { 2, 5, 1, 3 } },
1142 {
ISD::MUL, MVT::v4i64, { 12, 15, 19, 20 } },
1144 {
ISD::AND, MVT::v32i8, { 1, 1, 1, 2 } },
1145 {
ISD::AND, MVT::v16i16, { 1, 1, 1, 2 } },
1146 {
ISD::AND, MVT::v8i32, { 1, 1, 1, 2 } },
1147 {
ISD::AND, MVT::v4i64, { 1, 1, 1, 2 } },
1149 {
ISD::OR, MVT::v32i8, { 1, 1, 1, 2 } },
1150 {
ISD::OR, MVT::v16i16, { 1, 1, 1, 2 } },
1151 {
ISD::OR, MVT::v8i32, { 1, 1, 1, 2 } },
1152 {
ISD::OR, MVT::v4i64, { 1, 1, 1, 2 } },
1154 {
ISD::XOR, MVT::v32i8, { 1, 1, 1, 2 } },
1155 {
ISD::XOR, MVT::v16i16, { 1, 1, 1, 2 } },
1156 {
ISD::XOR, MVT::v8i32, { 1, 1, 1, 2 } },
1157 {
ISD::XOR, MVT::v4i64, { 1, 1, 1, 2 } },
1159 {
ISD::SUB, MVT::v32i8, { 4, 2, 5, 6 } },
1160 {
ISD::ADD, MVT::v32i8, { 4, 2, 5, 6 } },
1161 {
ISD::SUB, MVT::v16i16, { 4, 2, 5, 6 } },
1162 {
ISD::ADD, MVT::v16i16, { 4, 2, 5, 6 } },
1163 {
ISD::SUB, MVT::v8i32, { 4, 2, 5, 6 } },
1164 {
ISD::ADD, MVT::v8i32, { 4, 2, 5, 6 } },
1165 {
ISD::SUB, MVT::v4i64, { 4, 2, 5, 6 } },
1166 {
ISD::ADD, MVT::v4i64, { 4, 2, 5, 6 } },
1167 {
ISD::SUB, MVT::v2i64, { 1, 1, 1, 1 } },
1168 {
ISD::ADD, MVT::v2i64, { 1, 1, 1, 1 } },
1170 {
ISD::SHL, MVT::v16i8, { 10, 21,11,17 } },
1171 {
ISD::SHL, MVT::v32i8, { 22, 22,27,40 } },
1172 {
ISD::SHL, MVT::v8i16, { 6, 9,11,11 } },
1173 {
ISD::SHL, MVT::v16i16, { 13, 16,24,25 } },
1174 {
ISD::SHL, MVT::v4i32, { 3, 11, 4, 6 } },
1175 {
ISD::SHL, MVT::v8i32, { 9, 11,12,17 } },
1176 {
ISD::SHL, MVT::v2i64, { 2, 4, 4, 6 } },
1177 {
ISD::SHL, MVT::v4i64, { 6, 7,11,15 } },
1179 {
ISD::SRL, MVT::v16i8, { 11, 27,12,18 } },
1180 {
ISD::SRL, MVT::v32i8, { 23, 23,30,43 } },
1181 {
ISD::SRL, MVT::v8i16, { 13, 16,14,22 } },
1182 {
ISD::SRL, MVT::v16i16, { 28, 30,31,48 } },
1183 {
ISD::SRL, MVT::v4i32, { 6, 7,12,16 } },
1184 {
ISD::SRL, MVT::v8i32, { 14, 14,26,34 } },
1185 {
ISD::SRL, MVT::v2i64, { 2, 4, 4, 6 } },
1186 {
ISD::SRL, MVT::v4i64, { 6, 7,11,15 } },
1188 {
ISD::SRA, MVT::v16i8, { 21, 22,24,36 } },
1189 {
ISD::SRA, MVT::v32i8, { 44, 45,51,76 } },
1190 {
ISD::SRA, MVT::v8i16, { 13, 16,14,22 } },
1191 {
ISD::SRA, MVT::v16i16, { 28, 30,31,48 } },
1192 {
ISD::SRA, MVT::v4i32, { 6, 7,12,16 } },
1193 {
ISD::SRA, MVT::v8i32, { 14, 14,26,34 } },
1194 {
ISD::SRA, MVT::v2i64, { 5, 6,10,14 } },
1195 {
ISD::SRA, MVT::v4i64, { 12, 12,22,30 } },
1197 {
ISD::FNEG, MVT::v4f64, { 2, 2, 1, 2 } },
1198 {
ISD::FNEG, MVT::v8f32, { 2, 2, 1, 2 } },
1200 {
ISD::FADD, MVT::f64, { 1, 5, 1, 1 } },
1201 {
ISD::FADD, MVT::f32, { 1, 5, 1, 1 } },
1202 {
ISD::FADD, MVT::v2f64, { 1, 5, 1, 1 } },
1203 {
ISD::FADD, MVT::v4f32, { 1, 5, 1, 1 } },
1204 {
ISD::FADD, MVT::v4f64, { 2, 5, 1, 2 } },
1205 {
ISD::FADD, MVT::v8f32, { 2, 5, 1, 2 } },
1207 {
ISD::FSUB, MVT::f64, { 1, 5, 1, 1 } },
1208 {
ISD::FSUB, MVT::f32, { 1, 5, 1, 1 } },
1209 {
ISD::FSUB, MVT::v2f64, { 1, 5, 1, 1 } },
1210 {
ISD::FSUB, MVT::v4f32, { 1, 5, 1, 1 } },
1211 {
ISD::FSUB, MVT::v4f64, { 2, 5, 1, 2 } },
1212 {
ISD::FSUB, MVT::v8f32, { 2, 5, 1, 2 } },
1214 {
ISD::FMUL, MVT::f64, { 2, 5, 1, 1 } },
1215 {
ISD::FMUL, MVT::f32, { 1, 5, 1, 1 } },
1216 {
ISD::FMUL, MVT::v2f64, { 2, 5, 1, 1 } },
1217 {
ISD::FMUL, MVT::v4f32, { 1, 5, 1, 1 } },
1218 {
ISD::FMUL, MVT::v4f64, { 4, 5, 1, 2 } },
1219 {
ISD::FMUL, MVT::v8f32, { 2, 5, 1, 2 } },
1221 {
ISD::FDIV, MVT::f32, { 14, 14, 1, 1 } },
1222 {
ISD::FDIV, MVT::v4f32, { 14, 14, 1, 1 } },
1223 {
ISD::FDIV, MVT::v8f32, { 28, 29, 1, 3 } },
1224 {
ISD::FDIV, MVT::f64, { 22, 22, 1, 1 } },
1225 {
ISD::FDIV, MVT::v2f64, { 22, 22, 1, 1 } },
1226 {
ISD::FDIV, MVT::v4f64, { 44, 45, 1, 3 } },
1230 if (
const auto *Entry =
CostTableLookup(AVX1CostTable, ISD, LT.second))
1231 if (
auto KindCost = Entry->Cost[
CostKind])
1232 return LT.first * *KindCost;
1235 {
ISD::FADD, MVT::f64, { 1, 3, 1, 1 } },
1236 {
ISD::FADD, MVT::f32, { 1, 3, 1, 1 } },
1237 {
ISD::FADD, MVT::v2f64, { 1, 3, 1, 1 } },
1238 {
ISD::FADD, MVT::v4f32, { 1, 3, 1, 1 } },
1240 {
ISD::FSUB, MVT::f64, { 1, 3, 1, 1 } },
1241 {
ISD::FSUB, MVT::f32 , { 1, 3, 1, 1 } },
1242 {
ISD::FSUB, MVT::v2f64, { 1, 3, 1, 1 } },
1243 {
ISD::FSUB, MVT::v4f32, { 1, 3, 1, 1 } },
1245 {
ISD::FMUL, MVT::f64, { 1, 5, 1, 1 } },
1246 {
ISD::FMUL, MVT::f32, { 1, 5, 1, 1 } },
1247 {
ISD::FMUL, MVT::v2f64, { 1, 5, 1, 1 } },
1248 {
ISD::FMUL, MVT::v4f32, { 1, 5, 1, 1 } },
1250 {
ISD::FDIV, MVT::f32, { 14, 14, 1, 1 } },
1251 {
ISD::FDIV, MVT::v4f32, { 14, 14, 1, 1 } },
1252 {
ISD::FDIV, MVT::f64, { 22, 22, 1, 1 } },
1253 {
ISD::FDIV, MVT::v2f64, { 22, 22, 1, 1 } },
1255 {
ISD::MUL, MVT::v2i64, { 6, 10,10,10 } }
1259 if (
const auto *Entry =
CostTableLookup(SSE42CostTable, ISD, LT.second))
1260 if (
auto KindCost = Entry->Cost[
CostKind])
1261 return LT.first * *KindCost;
1264 {
ISD::SHL, MVT::v16i8, { 15, 24,17,22 } },
1265 {
ISD::SHL, MVT::v8i16, { 11, 14,11,11 } },
1266 {
ISD::SHL, MVT::v4i32, { 14, 20, 4,10 } },
1268 {
ISD::SRL, MVT::v16i8, { 16, 27,18,24 } },
1269 {
ISD::SRL, MVT::v8i16, { 22, 26,23,27 } },
1270 {
ISD::SRL, MVT::v4i32, { 16, 17,15,19 } },
1271 {
ISD::SRL, MVT::v2i64, { 4, 6, 5, 7 } },
1273 {
ISD::SRA, MVT::v16i8, { 38, 41,30,36 } },
1274 {
ISD::SRA, MVT::v8i16, { 22, 26,23,27 } },
1275 {
ISD::SRA, MVT::v4i32, { 16, 17,15,19 } },
1276 {
ISD::SRA, MVT::v2i64, { 8, 17, 5, 7 } },
1278 {
ISD::MUL, MVT::v16i8, { 5, 18,10,12 } },
1279 {
ISD::MUL, MVT::v4i32, { 2, 11, 1, 1 } }
1283 if (
const auto *Entry =
CostTableLookup(SSE41CostTable, ISD, LT.second))
1284 if (
auto KindCost = Entry->Cost[
CostKind])
1285 return LT.first * *KindCost;
1290 {
ISD::SHL, MVT::v16i8, { 13, 21,26,28 } },
1291 {
ISD::SHL, MVT::v8i16, { 24, 27,16,20 } },
1292 {
ISD::SHL, MVT::v4i32, { 17, 19,10,12 } },
1293 {
ISD::SHL, MVT::v2i64, { 4, 6, 5, 7 } },
1295 {
ISD::SRL, MVT::v16i8, { 14, 28,27,30 } },
1296 {
ISD::SRL, MVT::v8i16, { 16, 19,31,31 } },
1297 {
ISD::SRL, MVT::v4i32, { 12, 12,15,19 } },
1298 {
ISD::SRL, MVT::v2i64, { 4, 6, 5, 7 } },
1300 {
ISD::SRA, MVT::v16i8, { 27, 30,54,54 } },
1301 {
ISD::SRA, MVT::v8i16, { 16, 19,31,31 } },
1302 {
ISD::SRA, MVT::v4i32, { 12, 12,15,19 } },
1303 {
ISD::SRA, MVT::v2i64, { 8, 11,12,16 } },
1305 {
ISD::AND, MVT::v16i8, { 1, 1, 1, 1 } },
1306 {
ISD::AND, MVT::v8i16, { 1, 1, 1, 1 } },
1307 {
ISD::AND, MVT::v4i32, { 1, 1, 1, 1 } },
1308 {
ISD::AND, MVT::v2i64, { 1, 1, 1, 1 } },
1310 {
ISD::OR, MVT::v16i8, { 1, 1, 1, 1 } },
1311 {
ISD::OR, MVT::v8i16, { 1, 1, 1, 1 } },
1312 {
ISD::OR, MVT::v4i32, { 1, 1, 1, 1 } },
1313 {
ISD::OR, MVT::v2i64, { 1, 1, 1, 1 } },
1315 {
ISD::XOR, MVT::v16i8, { 1, 1, 1, 1 } },
1316 {
ISD::XOR, MVT::v8i16, { 1, 1, 1, 1 } },
1317 {
ISD::XOR, MVT::v4i32, { 1, 1, 1, 1 } },
1318 {
ISD::XOR, MVT::v2i64, { 1, 1, 1, 1 } },
1320 {
ISD::ADD, MVT::v2i64, { 1, 2, 1, 2 } },
1321 {
ISD::SUB, MVT::v2i64, { 1, 2, 1, 2 } },
1323 {
ISD::MUL, MVT::v16i8, { 5, 18,12,12 } },
1324 {
ISD::MUL, MVT::v8i16, { 1, 5, 1, 1 } },
1325 {
ISD::MUL, MVT::v4i32, { 6, 8, 7, 7 } },
1326 {
ISD::MUL, MVT::v2i64, { 8, 10, 8, 8 } },
1328 {
ISD::FDIV, MVT::f32, { 23, 23, 1, 1 } },
1329 {
ISD::FDIV, MVT::v4f32, { 39, 39, 1, 1 } },
1330 {
ISD::FDIV, MVT::f64, { 38, 38, 1, 1 } },
1331 {
ISD::FDIV, MVT::v2f64, { 69, 69, 1, 1 } },
1333 {
ISD::FNEG, MVT::f32, { 1, 1, 1, 1 } },
1334 {
ISD::FNEG, MVT::f64, { 1, 1, 1, 1 } },
1335 {
ISD::FNEG, MVT::v4f32, { 1, 1, 1, 1 } },
1336 {
ISD::FNEG, MVT::v2f64, { 1, 1, 1, 1 } },
1338 {
ISD::FADD, MVT::f32, { 2, 3, 1, 1 } },
1339 {
ISD::FADD, MVT::f64, { 2, 3, 1, 1 } },
1340 {
ISD::FADD, MVT::v2f64, { 2, 3, 1, 1 } },
1342 {
ISD::FSUB, MVT::f32, { 2, 3, 1, 1 } },
1343 {
ISD::FSUB, MVT::f64, { 2, 3, 1, 1 } },
1344 {
ISD::FSUB, MVT::v2f64, { 2, 3, 1, 1 } },
1346 {
ISD::FMUL, MVT::f64, { 2, 5, 1, 1 } },
1347 {
ISD::FMUL, MVT::v2f64, { 2, 5, 1, 1 } },
1351 if (
const auto *Entry =
CostTableLookup(SSE2CostTable, ISD, LT.second))
1352 if (
auto KindCost = Entry->Cost[
CostKind])
1353 return LT.first * *KindCost;
1356 {
ISD::FDIV, MVT::f32, { 17, 18, 1, 1 } },
1357 {
ISD::FDIV, MVT::v4f32, { 34, 48, 1, 1 } },
1359 {
ISD::FNEG, MVT::f32, { 2, 2, 1, 2 } },
1360 {
ISD::FNEG, MVT::v4f32, { 2, 2, 1, 2 } },
1362 {
ISD::FADD, MVT::f32, { 1, 3, 1, 1 } },
1363 {
ISD::FADD, MVT::v4f32, { 2, 3, 1, 1 } },
1365 {
ISD::FSUB, MVT::f32, { 1, 3, 1, 1 } },
1366 {
ISD::FSUB, MVT::v4f32, { 2, 3, 1, 1 } },
1368 {
ISD::FMUL, MVT::f32, { 2, 5, 1, 1 } },
1369 {
ISD::FMUL, MVT::v4f32, { 2, 5, 1, 1 } },
1373 if (
const auto *Entry =
CostTableLookup(SSE1CostTable, ISD, LT.second))
1374 if (
auto KindCost = Entry->Cost[
CostKind])
1375 return LT.first * *KindCost;
1380 {
ISD::MUL, MVT::i64, { 2, 6, 1, 2 } },
1385 if (
auto KindCost = Entry->Cost[
CostKind])
1386 return LT.first * *KindCost;
1397 {
ISD::MUL, MVT::i8, { 3, 4, 1, 1 } },
1398 {
ISD::MUL, MVT::i16, { 2, 4, 1, 1 } },
1399 {
ISD::MUL, MVT::i32, { 1, 4, 1, 1 } },
1401 {
ISD::FNEG, MVT::f64, { 2, 2, 1, 3 } },
1402 {
ISD::FADD, MVT::f64, { 2, 3, 1, 1 } },
1403 {
ISD::FSUB, MVT::f64, { 2, 3, 1, 1 } },
1404 {
ISD::FMUL, MVT::f64, { 2, 5, 1, 1 } },
1405 {
ISD::FDIV, MVT::f64, { 38, 38, 1, 1 } },
1409 if (
auto KindCost = Entry->Cost[
CostKind])
1410 return LT.first * *KindCost;
1424 return 20 * LT.first * LT.second.getVectorNumElements() * ScalarCost;
1473 int NumElts = LT.second.getVectorNumElements();
1474 if ((
Index % NumElts) == 0)
1477 if (SubLT.second.isVector()) {
1478 int NumSubElts = SubLT.second.getVectorNumElements();
1479 if ((
Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0)
1487 int OrigSubElts = cast<FixedVectorType>(SubTp)->getNumElements();
1488 if (NumSubElts > OrigSubElts && (
Index % OrigSubElts) == 0 &&
1489 (NumSubElts % OrigSubElts) == 0 &&
1490 LT.second.getVectorElementType() ==
1491 SubLT.second.getVectorElementType() &&
1492 LT.second.getVectorElementType().getSizeInBits() ==
1494 assert(NumElts >= NumSubElts && NumElts > OrigSubElts &&
1495 "Unexpected number of elements!");
1497 LT.second.getVectorNumElements());
1499 SubLT.second.getVectorNumElements());
1508 return ExtractCost + 1;
1511 "Unexpected vector size");
1513 return ExtractCost + 2;
1522 int NumElts = LT.second.getVectorNumElements();
1524 if (SubLT.second.isVector()) {
1525 int NumSubElts = SubLT.second.getVectorNumElements();
1526 if ((
Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0)
1539 static const CostTblEntry SSE2SubVectorShuffleTbl[] = {
1570 if (
const auto *Entry =
1579 MVT LegalVT = LT.second;
1584 cast<FixedVectorType>(BaseTp)->getNumElements()) {
1589 unsigned NumOfSrcs = (VecTySize + LegalVTSize - 1) / LegalVTSize;
1596 if (!Mask.empty() && NumOfDests.
isValid()) {
1611 unsigned NormalizedVF =
1617 unsigned PrevSrcReg = 0;
1621 NormalizedMask, NumOfSrcRegs, NumOfDestRegs, NumOfDestRegs, []() {},
1622 [
this, SingleOpTy,
CostKind, &PrevSrcReg, &PrevRegMask,
1627 if (PrevRegMask.
empty() || PrevSrcReg != SrcReg ||
1628 PrevRegMask != RegMask)
1636 if (SrcReg != DestReg &&
1641 PrevSrcReg = SrcReg;
1642 PrevRegMask = RegMask;
1655 std::nullopt,
CostKind, 0,
nullptr);
1666 LT.first = NumOfDests * NumOfShufflesPerDest;
1682 if (
const auto *Entry =
1684 return LT.first * Entry->Cost;
1717 if (
const auto *Entry =
1719 return LT.first * Entry->Cost;
1796 if (
const auto *Entry =
CostTableLookup(AVX512ShuffleTbl, Kind, LT.second))
1797 if (
auto KindCost = Entry->Cost[
CostKind])
1798 return LT.first * *KindCost;
1851 if (
const auto *Entry =
CostTableLookup(AVX2ShuffleTbl, Kind, LT.second))
1852 return LT.first * Entry->Cost;
1873 if (
const auto *Entry =
CostTableLookup(XOPShuffleTbl, Kind, LT.second))
1874 return LT.first * Entry->Cost;
1936 if (
const auto *Entry =
CostTableLookup(AVX1ShuffleTbl, Kind, LT.second))
1937 return LT.first * Entry->Cost;
1950 if (
const auto *Entry =
CostTableLookup(SSE41ShuffleTbl, Kind, LT.second))
1951 return LT.first * Entry->Cost;
1982 if (
const auto *Entry =
CostTableLookup(SSSE3ShuffleTbl, Kind, LT.second))
1983 return LT.first * Entry->Cost;
2039 llvm::any_of(Args, [](
const auto &V) {
return isa<LoadInst>(V); });
2041 if (
const auto *Entry =
2044 LT.second.getVectorElementCount()) &&
2045 "Table entry missing from isLegalBroadcastLoad()");
2046 return LT.first * Entry->Cost;
2049 if (
const auto *Entry =
CostTableLookup(SSE2ShuffleTbl, Kind, LT.second))
2050 return LT.first * Entry->Cost;
2063 if (
const auto *Entry =
CostTableLookup(SSE1ShuffleTbl, Kind, LT.second))
2064 return LT.first * Entry->Cost;
2075 assert(ISD &&
"Invalid opcode");
2080 return Cost == 0 ? 0 : 1;
2894 AVX512BWConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2895 return AdjustCost(Entry->Cost);
2899 AVX512DQConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2900 return AdjustCost(Entry->Cost);
2904 AVX512FConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2905 return AdjustCost(Entry->Cost);
2910 AVX512BWVLConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2911 return AdjustCost(Entry->Cost);
2915 AVX512DQVLConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2916 return AdjustCost(Entry->Cost);
2920 SimpleDstTy, SimpleSrcTy))
2921 return AdjustCost(Entry->Cost);
2925 SimpleDstTy, SimpleSrcTy))
2926 return AdjustCost(Entry->Cost);
2931 SimpleDstTy, SimpleSrcTy))
2932 return AdjustCost(Entry->Cost);
2937 SimpleDstTy, SimpleSrcTy))
2938 return AdjustCost(Entry->Cost);
2943 SimpleDstTy, SimpleSrcTy))
2944 return AdjustCost(Entry->Cost);
2959 AVX512BWConversionTbl, ISD, LTDest.second, LTSrc.second))
2960 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2964 AVX512DQConversionTbl, ISD, LTDest.second, LTSrc.second))
2965 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2969 AVX512FConversionTbl, ISD, LTDest.second, LTSrc.second))
2970 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2975 LTDest.second, LTSrc.second))
2976 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2980 LTDest.second, LTSrc.second))
2981 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2985 LTDest.second, LTSrc.second))
2986 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2990 LTDest.second, LTSrc.second))
2991 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2995 LTDest.second, LTSrc.second))
2996 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3000 LTDest.second, LTSrc.second))
3001 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3005 LTDest.second, LTSrc.second))
3006 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3011 1 < Src->getScalarSizeInBits() && Src->getScalarSizeInBits() < 32) {
3012 Type *ExtSrc = Src->getWithNewBitWidth(32);
3018 if (!(Src->isIntegerTy() &&
I && isa<LoadInst>(
I->getOperand(0))))
3028 1 < Dst->getScalarSizeInBits() && Dst->getScalarSizeInBits() < 32) {
3029 Type *TruncDst = Dst->getWithNewBitWidth(32);
3052 MVT MTy = LT.second;
3055 assert(ISD &&
"Invalid opcode");
3058 if (Opcode == Instruction::ICmp || Opcode == Instruction::FCmp) {
3070 Pred = cast<CmpInst>(
I)->getPredicate();
3104 if (CondTy && !ST->
hasAVX())
3273 if (ST->useSLMArithCosts())
3275 if (
auto KindCost = Entry->Cost[
CostKind])
3276 return LT.first * (ExtraCost + *KindCost);
3280 if (
auto KindCost = Entry->Cost[
CostKind])
3281 return LT.first * (ExtraCost + *KindCost);
3285 if (
auto KindCost = Entry->Cost[
CostKind])
3286 return LT.first * (ExtraCost + *KindCost);
3290 if (
auto KindCost = Entry->Cost[
CostKind])
3291 return LT.first * (ExtraCost + *KindCost);
3295 if (
auto KindCost = Entry->Cost[
CostKind])
3296 return LT.first * (ExtraCost + *KindCost);
3300 if (
auto KindCost = Entry->Cost[
CostKind])
3301 return LT.first * (ExtraCost + *KindCost);
3305 if (
auto KindCost = Entry->Cost[
CostKind])
3306 return LT.first * (ExtraCost + *KindCost);
3310 if (
auto KindCost = Entry->Cost[
CostKind])
3311 return LT.first * (ExtraCost + *KindCost);
3315 if (
auto KindCost = Entry->Cost[
CostKind])
3316 return LT.first * (ExtraCost + *KindCost);
3320 if (
auto KindCost = Entry->Cost[
CostKind])
3321 return LT.first * (ExtraCost + *KindCost);
3346 {
ISD::FSHL, MVT::v8i64, { 1, 1, 1, 1 } },
3347 {
ISD::FSHL, MVT::v4i64, { 1, 1, 1, 1 } },
3348 {
ISD::FSHL, MVT::v2i64, { 1, 1, 1, 1 } },
3349 {
ISD::FSHL, MVT::v16i32, { 1, 1, 1, 1 } },
3350 {
ISD::FSHL, MVT::v8i32, { 1, 1, 1, 1 } },
3351 {
ISD::FSHL, MVT::v4i32, { 1, 1, 1, 1 } },
3352 {
ISD::FSHL, MVT::v32i16, { 1, 1, 1, 1 } },
3353 {
ISD::FSHL, MVT::v16i16, { 1, 1, 1, 1 } },
3354 {
ISD::FSHL, MVT::v8i16, { 1, 1, 1, 1 } },
3355 {
ISD::ROTL, MVT::v32i16, { 1, 1, 1, 1 } },
3356 {
ISD::ROTL, MVT::v16i16, { 1, 1, 1, 1 } },
3357 {
ISD::ROTL, MVT::v8i16, { 1, 1, 1, 1 } },
3358 {
ISD::ROTR, MVT::v32i16, { 1, 1, 1, 1 } },
3359 {
ISD::ROTR, MVT::v16i16, { 1, 1, 1, 1 } },
3360 {
ISD::ROTR, MVT::v8i16, { 1, 1, 1, 1 } },
3379 {
ISD::CTLZ, MVT::v8i64, { 1, 5, 1, 1 } },
3380 {
ISD::CTLZ, MVT::v16i32, { 1, 5, 1, 1 } },
3381 {
ISD::CTLZ, MVT::v32i16, { 18, 27, 23, 27 } },
3382 {
ISD::CTLZ, MVT::v64i8, { 3, 16, 9, 11 } },
3383 {
ISD::CTLZ, MVT::v4i64, { 1, 5, 1, 1 } },
3384 {
ISD::CTLZ, MVT::v8i32, { 1, 5, 1, 1 } },
3385 {
ISD::CTLZ, MVT::v16i16, { 8, 19, 11, 13 } },
3386 {
ISD::CTLZ, MVT::v32i8, { 2, 11, 9, 10 } },
3387 {
ISD::CTLZ, MVT::v2i64, { 1, 5, 1, 1 } },
3388 {
ISD::CTLZ, MVT::v4i32, { 1, 5, 1, 1 } },
3389 {
ISD::CTLZ, MVT::v8i16, { 3, 15, 4, 6 } },
3390 {
ISD::CTLZ, MVT::v16i8, { 2, 10, 9, 10 } },
3392 {
ISD::CTTZ, MVT::v8i64, { 2, 8, 6, 7 } },
3393 {
ISD::CTTZ, MVT::v16i32, { 2, 8, 6, 7 } },
3394 {
ISD::CTTZ, MVT::v4i64, { 1, 8, 6, 6 } },
3395 {
ISD::CTTZ, MVT::v8i32, { 1, 8, 6, 6 } },
3396 {
ISD::CTTZ, MVT::v2i64, { 1, 8, 6, 6 } },
3397 {
ISD::CTTZ, MVT::v4i32, { 1, 8, 6, 6 } },
3400 {
ISD::ABS, MVT::v32i16, { 1, 1, 1, 1 } },
3401 {
ISD::ABS, MVT::v64i8, { 1, 1, 1, 1 } },
3423 {
ISD::CTLZ, MVT::v8i64, { 8, 22, 23, 23 } },
3424 {
ISD::CTLZ, MVT::v16i32, { 8, 23, 25, 25 } },
3425 {
ISD::CTLZ, MVT::v32i16, { 4, 15, 15, 16 } },
3426 {
ISD::CTLZ, MVT::v64i8, { 3, 12, 10, 9 } },
3427 {
ISD::CTPOP, MVT::v2i64, { 3, 7, 10, 10 } },
3428 {
ISD::CTPOP, MVT::v4i64, { 3, 7, 10, 10 } },
3429 {
ISD::CTPOP, MVT::v8i64, { 3, 8, 10, 12 } },
3430 {
ISD::CTPOP, MVT::v4i32, { 7, 11, 14, 14 } },
3431 {
ISD::CTPOP, MVT::v8i32, { 7, 11, 14, 14 } },
3432 {
ISD::CTPOP, MVT::v16i32, { 7, 12, 14, 16 } },
3433 {
ISD::CTPOP, MVT::v8i16, { 2, 7, 11, 11 } },
3434 {
ISD::CTPOP, MVT::v16i16, { 2, 7, 11, 11 } },
3435 {
ISD::CTPOP, MVT::v32i16, { 3, 7, 11, 13 } },
3439 {
ISD::CTTZ, MVT::v8i16, { 3, 9, 14, 14 } },
3440 {
ISD::CTTZ, MVT::v16i16, { 3, 9, 14, 14 } },
3441 {
ISD::CTTZ, MVT::v32i16, { 3, 10, 14, 16 } },
3442 {
ISD::CTTZ, MVT::v16i8, { 2, 6, 11, 11 } },
3443 {
ISD::CTTZ, MVT::v32i8, { 2, 6, 11, 11 } },
3444 {
ISD::CTTZ, MVT::v64i8, { 3, 7, 11, 13 } },
3445 {
ISD::ROTL, MVT::v32i16, { 2, 8, 6, 8 } },
3446 {
ISD::ROTL, MVT::v16i16, { 2, 8, 6, 7 } },
3447 {
ISD::ROTL, MVT::v8i16, { 2, 7, 6, 7 } },
3448 {
ISD::ROTL, MVT::v64i8, { 5, 6, 11, 12 } },
3449 {
ISD::ROTL, MVT::v32i8, { 5, 15, 7, 10 } },
3450 {
ISD::ROTL, MVT::v16i8, { 5, 15, 7, 10 } },
3451 {
ISD::ROTR, MVT::v32i16, { 2, 8, 6, 8 } },
3452 {
ISD::ROTR, MVT::v16i16, { 2, 8, 6, 7 } },
3453 {
ISD::ROTR, MVT::v8i16, { 2, 7, 6, 7 } },
3454 {
ISD::ROTR, MVT::v64i8, { 5, 6, 12, 14 } },
3455 {
ISD::ROTR, MVT::v32i8, { 5, 14, 6, 9 } },
3456 {
ISD::ROTR, MVT::v16i8, { 5, 14, 6, 9 } },
3459 {
ISD::SMAX, MVT::v32i16, { 1, 1, 1, 1 } },
3460 {
ISD::SMAX, MVT::v64i8, { 1, 1, 1, 1 } },
3461 {
ISD::SMIN, MVT::v32i16, { 1, 1, 1, 1 } },
3462 {
ISD::SMIN, MVT::v64i8, { 1, 1, 1, 1 } },
3467 {
ISD::UMAX, MVT::v32i16, { 1, 1, 1, 1 } },
3468 {
ISD::UMAX, MVT::v64i8, { 1, 1, 1, 1 } },
3469 {
ISD::UMIN, MVT::v32i16, { 1, 1, 1, 1 } },
3470 {
ISD::UMIN, MVT::v64i8, { 1, 1, 1, 1 } },
3475 {
ISD::ABS, MVT::v8i64, { 1, 1, 1, 1 } },
3476 {
ISD::ABS, MVT::v4i64, { 1, 1, 1, 1 } },
3477 {
ISD::ABS, MVT::v2i64, { 1, 1, 1, 1 } },
3478 {
ISD::ABS, MVT::v16i32, { 1, 1, 1, 1 } },
3479 {
ISD::ABS, MVT::v8i32, { 1, 1, 1, 1 } },
3480 {
ISD::ABS, MVT::v32i16, { 2, 7, 4, 4 } },
3481 {
ISD::ABS, MVT::v16i16, { 1, 1, 1, 1 } },
3482 {
ISD::ABS, MVT::v64i8, { 2, 7, 4, 4 } },
3483 {
ISD::ABS, MVT::v32i8, { 1, 1, 1, 1 } },
3491 {
ISD::CTLZ, MVT::v8i64, { 10, 28, 32, 32 } },
3492 {
ISD::CTLZ, MVT::v16i32, { 12, 30, 38, 38 } },
3493 {
ISD::CTLZ, MVT::v32i16, { 8, 15, 29, 29 } },
3494 {
ISD::CTLZ, MVT::v64i8, { 6, 11, 19, 19 } },
3495 {
ISD::CTPOP, MVT::v8i64, { 16, 16, 19, 19 } },
3496 {
ISD::CTPOP, MVT::v16i32, { 24, 19, 27, 27 } },
3497 {
ISD::CTPOP, MVT::v32i16, { 18, 15, 22, 22 } },
3498 {
ISD::CTPOP, MVT::v64i8, { 12, 11, 16, 16 } },
3499 {
ISD::CTTZ, MVT::v8i64, { 2, 8, 6, 7 } },
3500 {
ISD::CTTZ, MVT::v16i32, { 2, 8, 6, 7 } },
3501 {
ISD::CTTZ, MVT::v32i16, { 7, 17, 27, 27 } },
3502 {
ISD::CTTZ, MVT::v64i8, { 6, 13, 21, 21 } },
3503 {
ISD::ROTL, MVT::v8i64, { 1, 1, 1, 1 } },
3504 {
ISD::ROTL, MVT::v4i64, { 1, 1, 1, 1 } },
3505 {
ISD::ROTL, MVT::v2i64, { 1, 1, 1, 1 } },
3506 {
ISD::ROTL, MVT::v16i32, { 1, 1, 1, 1 } },
3507 {
ISD::ROTL, MVT::v8i32, { 1, 1, 1, 1 } },
3508 {
ISD::ROTL, MVT::v4i32, { 1, 1, 1, 1 } },
3509 {
ISD::ROTR, MVT::v8i64, { 1, 1, 1, 1 } },
3510 {
ISD::ROTR, MVT::v4i64, { 1, 1, 1, 1 } },
3511 {
ISD::ROTR, MVT::v2i64, { 1, 1, 1, 1 } },
3512 {
ISD::ROTR, MVT::v16i32, { 1, 1, 1, 1 } },
3513 {
ISD::ROTR, MVT::v8i32, { 1, 1, 1, 1 } },
3514 {
ISD::ROTR, MVT::v4i32, { 1, 1, 1, 1 } },
3515 {
ISD::SMAX, MVT::v8i64, { 1, 3, 1, 1 } },
3516 {
ISD::SMAX, MVT::v16i32, { 1, 1, 1, 1 } },
3517 {
ISD::SMAX, MVT::v32i16, { 3, 7, 5, 5 } },
3518 {
ISD::SMAX, MVT::v64i8, { 3, 7, 5, 5 } },
3519 {
ISD::SMAX, MVT::v4i64, { 1, 3, 1, 1 } },
3520 {
ISD::SMAX, MVT::v2i64, { 1, 3, 1, 1 } },
3521 {
ISD::SMIN, MVT::v8i64, { 1, 3, 1, 1 } },
3522 {
ISD::SMIN, MVT::v16i32, { 1, 1, 1, 1 } },
3523 {
ISD::SMIN, MVT::v32i16, { 3, 7, 5, 5 } },
3524 {
ISD::SMIN, MVT::v64i8, { 3, 7, 5, 5 } },
3525 {
ISD::SMIN, MVT::v4i64, { 1, 3, 1, 1 } },
3526 {
ISD::SMIN, MVT::v2i64, { 1, 3, 1, 1 } },
3527 {
ISD::UMAX, MVT::v8i64, { 1, 3, 1, 1 } },
3528 {
ISD::UMAX, MVT::v16i32, { 1, 1, 1, 1 } },
3529 {
ISD::UMAX, MVT::v32i16, { 3, 7, 5, 5 } },
3530 {
ISD::UMAX, MVT::v64i8, { 3, 7, 5, 5 } },
3531 {
ISD::UMAX, MVT::v4i64, { 1, 3, 1, 1 } },
3532 {
ISD::UMAX, MVT::v2i64, { 1, 3, 1, 1 } },
3533 {
ISD::UMIN, MVT::v8i64, { 1, 3, 1, 1 } },
3534 {
ISD::UMIN, MVT::v16i32, { 1, 1, 1, 1 } },
3535 {
ISD::UMIN, MVT::v32i16, { 3, 7, 5, 5 } },
3536 {
ISD::UMIN, MVT::v64i8, { 3, 7, 5, 5 } },
3537 {
ISD::UMIN, MVT::v4i64, { 1, 3, 1, 1 } },
3538 {
ISD::UMIN, MVT::v2i64, { 1, 3, 1, 1 } },
3566 {
ISD::FSQRT, MVT::v16f32, { 12, 20, 1, 3 } },
3569 {
ISD::FSQRT, MVT::v4f64, { 12, 18, 1, 1 } },
3570 {
ISD::FSQRT, MVT::v8f64, { 24, 32, 1, 3 } },
3586 {
ISD::ROTL, MVT::v4i64, { 4, 7, 5, 6 } },
3587 {
ISD::ROTL, MVT::v8i32, { 4, 7, 5, 6 } },
3588 {
ISD::ROTL, MVT::v16i16, { 4, 7, 5, 6 } },
3589 {
ISD::ROTL, MVT::v32i8, { 4, 7, 5, 6 } },
3590 {
ISD::ROTL, MVT::v2i64, { 1, 3, 1, 1 } },
3591 {
ISD::ROTL, MVT::v4i32, { 1, 3, 1, 1 } },
3592 {
ISD::ROTL, MVT::v8i16, { 1, 3, 1, 1 } },
3593 {
ISD::ROTL, MVT::v16i8, { 1, 3, 1, 1 } },
3594 {
ISD::ROTR, MVT::v4i64, { 4, 7, 8, 9 } },
3595 {
ISD::ROTR, MVT::v8i32, { 4, 7, 8, 9 } },
3596 {
ISD::ROTR, MVT::v16i16, { 4, 7, 8, 9 } },
3597 {
ISD::ROTR, MVT::v32i8, { 4, 7, 8, 9 } },
3598 {
ISD::ROTR, MVT::v2i64, { 1, 3, 3, 3 } },
3599 {
ISD::ROTR, MVT::v4i32, { 1, 3, 3, 3 } },
3600 {
ISD::ROTR, MVT::v8i16, { 1, 3, 3, 3 } },
3601 {
ISD::ROTR, MVT::v16i8, { 1, 3, 3, 3 } }
3604 {
ISD::ABS, MVT::v2i64, { 2, 4, 3, 5 } },
3605 {
ISD::ABS, MVT::v4i64, { 2, 4, 3, 5 } },
3606 {
ISD::ABS, MVT::v4i32, { 1, 1, 1, 1 } },
3607 {
ISD::ABS, MVT::v8i32, { 1, 1, 1, 2 } },
3608 {
ISD::ABS, MVT::v8i16, { 1, 1, 1, 1 } },
3609 {
ISD::ABS, MVT::v16i16, { 1, 1, 1, 2 } },
3610 {
ISD::ABS, MVT::v16i8, { 1, 1, 1, 1 } },
3611 {
ISD::ABS, MVT::v32i8, { 1, 1, 1, 2 } },
3626 {
ISD::CTLZ, MVT::v2i64, { 7, 18, 24, 25 } },
3627 {
ISD::CTLZ, MVT::v4i64, { 14, 18, 24, 44 } },
3628 {
ISD::CTLZ, MVT::v4i32, { 5, 16, 19, 20 } },
3629 {
ISD::CTLZ, MVT::v8i32, { 10, 16, 19, 34 } },
3630 {
ISD::CTLZ, MVT::v8i16, { 4, 13, 14, 15 } },
3631 {
ISD::CTLZ, MVT::v16i16, { 6, 14, 14, 24 } },
3632 {
ISD::CTLZ, MVT::v16i8, { 3, 12, 9, 10 } },
3633 {
ISD::CTLZ, MVT::v32i8, { 4, 12, 9, 14 } },
3634 {
ISD::CTPOP, MVT::v2i64, { 3, 9, 10, 10 } },
3635 {
ISD::CTPOP, MVT::v4i64, { 4, 9, 10, 14 } },
3636 {
ISD::CTPOP, MVT::v4i32, { 7, 12, 14, 14 } },
3637 {
ISD::CTPOP, MVT::v8i32, { 7, 12, 14, 18 } },
3638 {
ISD::CTPOP, MVT::v8i16, { 3, 7, 11, 11 } },
3639 {
ISD::CTPOP, MVT::v16i16, { 6, 8, 11, 18 } },
3642 {
ISD::CTTZ, MVT::v2i64, { 4, 11, 13, 13 } },
3643 {
ISD::CTTZ, MVT::v4i64, { 5, 11, 13, 20 } },
3644 {
ISD::CTTZ, MVT::v4i32, { 7, 14, 17, 17 } },
3645 {
ISD::CTTZ, MVT::v8i32, { 7, 15, 17, 24 } },
3646 {
ISD::CTTZ, MVT::v8i16, { 4, 9, 14, 14 } },
3647 {
ISD::CTTZ, MVT::v16i16, { 6, 9, 14, 24 } },
3648 {
ISD::CTTZ, MVT::v16i8, { 3, 7, 11, 11 } },
3649 {
ISD::CTTZ, MVT::v32i8, { 5, 7, 11, 18 } },
3652 {
ISD::SMAX, MVT::v2i64, { 2, 7, 2, 3 } },
3653 {
ISD::SMAX, MVT::v4i64, { 2, 7, 2, 3 } },
3654 {
ISD::SMAX, MVT::v8i32, { 1, 1, 1, 2 } },
3655 {
ISD::SMAX, MVT::v16i16, { 1, 1, 1, 2 } },
3656 {
ISD::SMAX, MVT::v32i8, { 1, 1, 1, 2 } },
3657 {
ISD::SMIN, MVT::v2i64, { 2, 7, 2, 3 } },
3658 {
ISD::SMIN, MVT::v4i64, { 2, 7, 2, 3 } },
3659 {
ISD::SMIN, MVT::v8i32, { 1, 1, 1, 2 } },
3660 {
ISD::SMIN, MVT::v16i16, { 1, 1, 1, 2 } },
3661 {
ISD::SMIN, MVT::v32i8, { 1, 1, 1, 2 } },
3667 {
ISD::UMAX, MVT::v2i64, { 2, 8, 5, 6 } },
3668 {
ISD::UMAX, MVT::v4i64, { 2, 8, 5, 8 } },
3669 {
ISD::UMAX, MVT::v8i32, { 1, 1, 1, 2 } },
3670 {
ISD::UMAX, MVT::v16i16, { 1, 1, 1, 2 } },
3671 {
ISD::UMAX, MVT::v32i8, { 1, 1, 1, 2 } },
3672 {
ISD::UMIN, MVT::v2i64, { 2, 8, 5, 6 } },
3673 {
ISD::UMIN, MVT::v4i64, { 2, 8, 5, 8 } },
3674 {
ISD::UMIN, MVT::v8i32, { 1, 1, 1, 2 } },
3675 {
ISD::UMIN, MVT::v16i16, { 1, 1, 1, 2 } },
3676 {
ISD::UMIN, MVT::v32i8, { 1, 1, 1, 2 } },
3688 {
ISD::FSQRT, MVT::v8f32, { 14, 21, 1, 3 } },
3690 {
ISD::FSQRT, MVT::v2f64, { 14, 21, 1, 1 } },
3691 {
ISD::FSQRT, MVT::v4f64, { 28, 35, 1, 3 } },
3694 {
ISD::ABS, MVT::v4i64, { 6, 8, 6, 12 } },
3695 {
ISD::ABS, MVT::v8i32, { 3, 6, 4, 5 } },
3696 {
ISD::ABS, MVT::v16i16, { 3, 6, 4, 5 } },
3697 {
ISD::ABS, MVT::v32i8, { 3, 6, 4, 5 } },
3710 {
ISD::BSWAP, MVT::v16i16, { 5, 6, 5, 10 } },
3712 {
ISD::CTLZ, MVT::v4i64, { 29, 33, 49, 58 } },
3713 {
ISD::CTLZ, MVT::v2i64, { 14, 24, 24, 28 } },
3714 {
ISD::CTLZ, MVT::v8i32, { 24, 28, 39, 48 } },
3715 {
ISD::CTLZ, MVT::v4i32, { 12, 20, 19, 23 } },
3716 {
ISD::CTLZ, MVT::v16i16, { 19, 22, 29, 38 } },
3717 {
ISD::CTLZ, MVT::v8i16, { 9, 16, 14, 18 } },
3718 {
ISD::CTLZ, MVT::v32i8, { 14, 15, 19, 28 } },
3719 {
ISD::CTLZ, MVT::v16i8, { 7, 12, 9, 13 } },
3720 {
ISD::CTPOP, MVT::v4i64, { 14, 18, 19, 28 } },
3721 {
ISD::CTPOP, MVT::v2i64, { 7, 14, 10, 14 } },
3722 {
ISD::CTPOP, MVT::v8i32, { 18, 24, 27, 36 } },
3723 {
ISD::CTPOP, MVT::v4i32, { 9, 20, 14, 18 } },
3724 {
ISD::CTPOP, MVT::v16i16, { 16, 21, 22, 31 } },
3725 {
ISD::CTPOP, MVT::v8i16, { 8, 18, 11, 15 } },
3726 {
ISD::CTPOP, MVT::v32i8, { 13, 15, 16, 25 } },
3727 {
ISD::CTPOP, MVT::v16i8, { 6, 12, 8, 12 } },
3728 {
ISD::CTTZ, MVT::v4i64, { 17, 22, 24, 33 } },
3729 {
ISD::CTTZ, MVT::v2i64, { 9, 19, 13, 17 } },
3730 {
ISD::CTTZ, MVT::v8i32, { 21, 27, 32, 41 } },
3731 {
ISD::CTTZ, MVT::v4i32, { 11, 24, 17, 21 } },
3732 {
ISD::CTTZ, MVT::v16i16, { 18, 24, 27, 36 } },
3733 {
ISD::CTTZ, MVT::v8i16, { 9, 21, 14, 18 } },
3734 {
ISD::CTTZ, MVT::v32i8, { 15, 18, 21, 30 } },
3735 {
ISD::CTTZ, MVT::v16i8, { 8, 16, 11, 15 } },
3738 {
ISD::SMAX, MVT::v4i64, { 6, 9, 6, 12 } },
3739 {
ISD::SMAX, MVT::v2i64, { 3, 7, 2, 4 } },
3740 {
ISD::SMAX, MVT::v8i32, { 4, 6, 5, 6 } },
3741 {
ISD::SMAX, MVT::v16i16, { 4, 6, 5, 6 } },
3742 {
ISD::SMAX, MVT::v32i8, { 4, 6, 5, 6 } },
3743 {
ISD::SMIN, MVT::v4i64, { 6, 9, 6, 12 } },
3744 {
ISD::SMIN, MVT::v2i64, { 3, 7, 2, 3 } },
3745 {
ISD::SMIN, MVT::v8i32, { 4, 6, 5, 6 } },
3746 {
ISD::SMIN, MVT::v16i16, { 4, 6, 5, 6 } },
3747 {
ISD::SMIN, MVT::v32i8, { 4, 6, 5, 6 } },
3753 {
ISD::UMAX, MVT::v4i64, { 9, 10, 11, 17 } },
3754 {
ISD::UMAX, MVT::v2i64, { 4, 8, 5, 7 } },
3755 {
ISD::UMAX, MVT::v8i32, { 4, 6, 5, 6 } },
3756 {
ISD::UMAX, MVT::v16i16, { 4, 6, 5, 6 } },
3757 {
ISD::UMAX, MVT::v32i8, { 4, 6, 5, 6 } },
3758 {
ISD::UMIN, MVT::v4i64, { 9, 10, 11, 17 } },
3759 {
ISD::UMIN, MVT::v2i64, { 4, 8, 5, 7 } },
3760 {
ISD::UMIN, MVT::v8i32, { 4, 6, 5, 6 } },
3761 {
ISD::UMIN, MVT::v16i16, { 4, 6, 5, 6 } },
3762 {
ISD::UMIN, MVT::v32i8, { 4, 6, 5, 6 } },
3773 {
ISD::FSQRT, MVT::v4f32, { 21, 21, 1, 1 } },
3774 {
ISD::FSQRT, MVT::v8f32, { 42, 42, 1, 3 } },
3776 {
ISD::FSQRT, MVT::v2f64, { 27, 27, 1, 1 } },
3777 {
ISD::FSQRT, MVT::v4f64, { 54, 54, 1, 3 } },
3781 {
ISD::FSQRT, MVT::v4f32, { 37, 41, 1, 5 } },
3783 {
ISD::FSQRT, MVT::v2f64, { 67, 71, 1, 5 } },
3787 {
ISD::FSQRT, MVT::v4f32, { 40, 41, 1, 5 } },
3789 {
ISD::FSQRT, MVT::v2f64, { 70, 71, 1, 5 } },
3799 {
ISD::FSQRT, MVT::v4f32, { 18, 18, 1, 1 } },
3802 {
ISD::ABS, MVT::v2i64, { 3, 4, 3, 5 } },
3803 {
ISD::SMAX, MVT::v2i64, { 3, 7, 2, 3 } },
3804 {
ISD::SMAX, MVT::v4i32, { 1, 1, 1, 1 } },
3805 {
ISD::SMAX, MVT::v16i8, { 1, 1, 1, 1 } },
3806 {
ISD::SMIN, MVT::v2i64, { 3, 7, 2, 3 } },
3807 {
ISD::SMIN, MVT::v4i32, { 1, 1, 1, 1 } },
3808 {
ISD::SMIN, MVT::v16i8, { 1, 1, 1, 1 } },
3809 {
ISD::UMAX, MVT::v2i64, { 2, 11, 6, 7 } },
3810 {
ISD::UMAX, MVT::v4i32, { 1, 1, 1, 1 } },
3811 {
ISD::UMAX, MVT::v8i16, { 1, 1, 1, 1 } },
3812 {
ISD::UMIN, MVT::v2i64, { 2, 11, 6, 7 } },
3813 {
ISD::UMIN, MVT::v4i32, { 1, 1, 1, 1 } },
3814 {
ISD::UMIN, MVT::v8i16, { 1, 1, 1, 1 } },
3817 {
ISD::ABS, MVT::v4i32, { 1, 2, 1, 1 } },
3818 {
ISD::ABS, MVT::v8i16, { 1, 2, 1, 1 } },
3819 {
ISD::ABS, MVT::v16i8, { 1, 2, 1, 1 } },
3827 {
ISD::CTLZ, MVT::v2i64, { 18, 28, 28, 35 } },
3828 {
ISD::CTLZ, MVT::v4i32, { 15, 20, 22, 28 } },
3829 {
ISD::CTLZ, MVT::v8i16, { 13, 17, 16, 22 } },
3830 {
ISD::CTLZ, MVT::v16i8, { 11, 15, 10, 16 } },
3831 {
ISD::CTPOP, MVT::v2i64, { 13, 19, 12, 18 } },
3832 {
ISD::CTPOP, MVT::v4i32, { 18, 24, 16, 22 } },
3833 {
ISD::CTPOP, MVT::v8i16, { 13, 18, 14, 20 } },
3834 {
ISD::CTPOP, MVT::v16i8, { 11, 12, 10, 16 } },
3835 {
ISD::CTTZ, MVT::v2i64, { 13, 25, 15, 22 } },
3836 {
ISD::CTTZ, MVT::v4i32, { 18, 26, 19, 25 } },
3837 {
ISD::CTTZ, MVT::v8i16, { 13, 20, 17, 23 } },
3838 {
ISD::CTTZ, MVT::v16i8, { 11, 16, 13, 19 } }
3841 {
ISD::ABS, MVT::v2i64, { 3, 6, 5, 5 } },
3842 {
ISD::ABS, MVT::v4i32, { 1, 4, 4, 4 } },
3843 {
ISD::ABS, MVT::v8i16, { 1, 2, 3, 3 } },
3844 {
ISD::ABS, MVT::v16i8, { 1, 2, 3, 3 } },
3849 {
ISD::BSWAP, MVT::v2i64, { 5, 6, 11, 11 } },
3852 {
ISD::CTLZ, MVT::v2i64, { 10, 45, 36, 38 } },
3853 {
ISD::CTLZ, MVT::v4i32, { 10, 45, 38, 40 } },
3854 {
ISD::CTLZ, MVT::v8i16, { 9, 38, 32, 34 } },
3855 {
ISD::CTLZ, MVT::v16i8, { 8, 39, 29, 32 } },
3856 {
ISD::CTPOP, MVT::v2i64, { 12, 26, 16, 18 } },
3857 {
ISD::CTPOP, MVT::v4i32, { 15, 29, 21, 23 } },
3858 {
ISD::CTPOP, MVT::v8i16, { 13, 25, 18, 20 } },
3859 {
ISD::CTPOP, MVT::v16i8, { 10, 21, 14, 16 } },
3860 {
ISD::CTTZ, MVT::v2i64, { 14, 28, 19, 21 } },
3861 {
ISD::CTTZ, MVT::v4i32, { 18, 31, 24, 26 } },
3862 {
ISD::CTTZ, MVT::v8i16, { 16, 27, 21, 23 } },
3863 {
ISD::CTTZ, MVT::v16i8, { 13, 23, 17, 19 } },
3866 {
ISD::SMAX, MVT::v2i64, { 4, 8, 15, 15 } },
3867 {
ISD::SMAX, MVT::v4i32, { 2, 4, 5, 5 } },
3868 {
ISD::SMAX, MVT::v8i16, { 1, 1, 1, 1 } },
3869 {
ISD::SMAX, MVT::v16i8, { 2, 4, 5, 5 } },
3870 {
ISD::SMIN, MVT::v2i64, { 4, 8, 15, 15 } },
3871 {
ISD::SMIN, MVT::v4i32, { 2, 4, 5, 5 } },
3872 {
ISD::SMIN, MVT::v8i16, { 1, 1, 1, 1 } },
3873 {
ISD::SMIN, MVT::v16i8, { 2, 4, 5, 5 } },
3878 {
ISD::UMAX, MVT::v2i64, { 4, 8, 15, 15 } },
3879 {
ISD::UMAX, MVT::v4i32, { 2, 5, 8, 8 } },
3880 {
ISD::UMAX, MVT::v8i16, { 1, 3, 3, 3 } },
3881 {
ISD::UMAX, MVT::v16i8, { 1, 1, 1, 1 } },
3882 {
ISD::UMIN, MVT::v2i64, { 4, 8, 15, 15 } },
3883 {
ISD::UMIN, MVT::v4i32, { 2, 5, 8, 8 } },
3884 {
ISD::UMIN, MVT::v8i16, { 1, 3, 3, 3 } },
3885 {
ISD::UMIN, MVT::v16i8, { 1, 1, 1, 1 } },
3891 {
ISD::FSQRT, MVT::v2f64, { 32, 32, 1, 1 } },
3897 {
ISD::FSQRT, MVT::v4f32, { 56, 56, 1, 2 } },
3924 {
ISD::ABS, MVT::i64, { 1, 2, 3, 4 } },
3932 {
ISD::ROTL, MVT::i64, { 2, 3, 1, 3 } },
3933 {
ISD::ROTR, MVT::i64, { 2, 3, 1, 3 } },
3934 {
ISD::FSHL, MVT::i64, { 4, 4, 1, 4 } },
3935 {
ISD::SMAX, MVT::i64, { 1, 3, 2, 3 } },
3936 {
ISD::SMIN, MVT::i64, { 1, 3, 2, 3 } },
3937 {
ISD::UMAX, MVT::i64, { 1, 3, 2, 3 } },
3938 {
ISD::UMIN, MVT::i64, { 1, 3, 2, 3 } },
3944 {
ISD::ABS, MVT::i32, { 1, 2, 3, 4 } },
3945 {
ISD::ABS, MVT::i16, { 2, 2, 3, 4 } },
3946 {
ISD::ABS, MVT::i8, { 2, 4, 4, 4 } },
3967 {
ISD::ROTL, MVT::i32, { 2, 3, 1, 3 } },
3968 {
ISD::ROTL, MVT::i16, { 2, 3, 1, 3 } },
3970 {
ISD::ROTR, MVT::i32, { 2, 3, 1, 3 } },
3971 {
ISD::ROTR, MVT::i16, { 2, 3, 1, 3 } },
3973 {
ISD::FSHL, MVT::i32, { 4, 4, 1, 4 } },
3974 {
ISD::FSHL, MVT::i16, { 4, 4, 2, 5 } },
3976 {
ISD::SMAX, MVT::i32, { 1, 2, 2, 3 } },
3977 {
ISD::SMAX, MVT::i16, { 1, 4, 2, 4 } },
3979 {
ISD::SMIN, MVT::i32, { 1, 2, 2, 3 } },
3980 {
ISD::SMIN, MVT::i16, { 1, 4, 2, 4 } },
3982 {
ISD::UMAX, MVT::i32, { 1, 2, 2, 3 } },
3983 {
ISD::UMAX, MVT::i16, { 1, 4, 2, 4 } },
3985 {
ISD::UMIN, MVT::i32, { 1, 2, 2, 3 } },
3986 {
ISD::UMIN, MVT::i16, { 1, 4, 2, 4 } },
4006 case Intrinsic::abs:
4009 case Intrinsic::bitreverse:
4012 case Intrinsic::bswap:
4015 case Intrinsic::ctlz:
4018 case Intrinsic::ctpop:
4021 case Intrinsic::cttz:
4024 case Intrinsic::fshl:
4028 if (Args[0] == Args[1])
4032 case Intrinsic::fshr:
4037 if (Args[0] == Args[1])
4041 case Intrinsic::maxnum:
4042 case Intrinsic::minnum:
4046 case Intrinsic::sadd_sat:
4049 case Intrinsic::smax:
4052 case Intrinsic::smin:
4055 case Intrinsic::ssub_sat:
4058 case Intrinsic::uadd_sat:
4061 case Intrinsic::umax:
4064 case Intrinsic::umin:
4067 case Intrinsic::usub_sat:
4070 case Intrinsic::sqrt:
4073 case Intrinsic::sadd_with_overflow:
4074 case Intrinsic::ssub_with_overflow:
4077 OpTy =
RetTy->getContainedType(0);
4079 case Intrinsic::uadd_with_overflow:
4080 case Intrinsic::usub_with_overflow:
4083 OpTy =
RetTy->getContainedType(0);
4085 case Intrinsic::umul_with_overflow:
4086 case Intrinsic::smul_with_overflow:
4089 OpTy =
RetTy->getContainedType(0);
4096 MVT MTy = LT.second;
4112 return LT.first *
Cost;
4116 if (((ISD ==
ISD::CTTZ && !ST->hasBMI()) ||
4117 (ISD ==
ISD::CTLZ && !ST->hasLZCNT())) &&
4120 if (
auto *Cst = dyn_cast<ConstantInt>(Args[1]))
4121 if (Cst->isAllOnesValue())
4129 auto adjustTableCost = [](
int ISD,
unsigned Cost,