63#define DEBUG_TYPE "x86tti"
79 std::optional<unsigned>
164 bool Vector = (ClassID == 1);
183 if (ST->
hasAVX512() && ST->hasEVEX512() && PreferVectorWidth >= 512)
185 if (ST->
hasAVX() && PreferVectorWidth >= 256)
187 if (ST->
hasSSE1() && PreferVectorWidth >= 128)
245 assert(ISD &&
"Invalid opcode");
247 if (ISD ==
ISD::MUL && Args.size() == 2 && LT.second.isVector() &&
248 (LT.second.getScalarType() == MVT::i32 ||
249 LT.second.getScalarType() == MVT::i64)) {
251 bool Op1Signed =
false, Op2Signed =
false;
254 unsigned OpMinSize = std::max(Op1MinSize, Op2MinSize);
255 bool SignedMode = Op1Signed || Op2Signed;
260 if (OpMinSize <= 15 && !ST->isPMADDWDSlow() &&
261 LT.second.getScalarType() == MVT::i32) {
263 isa<ConstantDataVector>(Args[0]) || isa<ConstantVector>(Args[0]);
265 isa<ConstantDataVector>(Args[1]) || isa<ConstantVector>(Args[1]);
266 bool Op1Sext = isa<SExtInst>(Args[0]) &&
267 (Op1MinSize == 15 || (Op1MinSize < 15 && !ST->
hasSSE41()));
268 bool Op2Sext = isa<SExtInst>(Args[1]) &&
269 (Op2MinSize == 15 || (Op2MinSize < 15 && !ST->
hasSSE41()));
271 bool IsZeroExtended = !Op1Signed || !Op2Signed;
272 bool IsConstant = Op1Constant || Op2Constant;
273 bool IsSext = Op1Sext || Op2Sext;
274 if (IsConstant || IsZeroExtended || IsSext)
282 if (ST->useSLMArithCosts() && LT.second == MVT::v4i32) {
285 if (!SignedMode && OpMinSize <= 8)
289 if (!SignedMode && OpMinSize <= 16)
296 if (!SignedMode && OpMinSize <= 32 && LT.second.getScalarType() == MVT::i64)
349 {
ISD::SHL, MVT::v16i8, { 1, 7, 2, 3 } },
350 {
ISD::SRL, MVT::v16i8, { 1, 7, 2, 3 } },
351 {
ISD::SRA, MVT::v16i8, { 1, 8, 4, 5 } },
352 {
ISD::SHL, MVT::v32i8, { 1, 8, 2, 3 } },
353 {
ISD::SRL, MVT::v32i8, { 1, 8, 2, 3 } },
354 {
ISD::SRA, MVT::v32i8, { 1, 9, 4, 5 } },
355 {
ISD::SHL, MVT::v64i8, { 1, 8, 2, 3 } },
356 {
ISD::SRL, MVT::v64i8, { 1, 8, 2, 3 } },
357 {
ISD::SRA, MVT::v64i8, { 1, 9, 4, 6 } },
359 {
ISD::SHL, MVT::v16i16, { 1, 1, 1, 1 } },
360 {
ISD::SRL, MVT::v16i16, { 1, 1, 1, 1 } },
361 {
ISD::SRA, MVT::v16i16, { 1, 1, 1, 1 } },
362 {
ISD::SHL, MVT::v32i16, { 1, 1, 1, 1 } },
363 {
ISD::SRL, MVT::v32i16, { 1, 1, 1, 1 } },
364 {
ISD::SRA, MVT::v32i16, { 1, 1, 1, 1 } },
368 if (
const auto *Entry =
370 if (
auto KindCost = Entry->Cost[
CostKind])
371 return LT.first * *KindCost;
374 {
ISD::SHL, MVT::v64i8, { 2, 12, 5, 6 } },
375 {
ISD::SRL, MVT::v64i8, { 2, 12, 5, 6 } },
376 {
ISD::SRA, MVT::v64i8, { 3, 10, 12, 12 } },
378 {
ISD::SHL, MVT::v16i16, { 2, 7, 4, 4 } },
379 {
ISD::SRL, MVT::v16i16, { 2, 7, 4, 4 } },
380 {
ISD::SRA, MVT::v16i16, { 2, 7, 4, 4 } },
382 {
ISD::SHL, MVT::v8i32, { 1, 1, 1, 1 } },
383 {
ISD::SRL, MVT::v8i32, { 1, 1, 1, 1 } },
384 {
ISD::SRA, MVT::v8i32, { 1, 1, 1, 1 } },
385 {
ISD::SHL, MVT::v16i32, { 1, 1, 1, 1 } },
386 {
ISD::SRL, MVT::v16i32, { 1, 1, 1, 1 } },
387 {
ISD::SRA, MVT::v16i32, { 1, 1, 1, 1 } },
389 {
ISD::SRA, MVT::v2i64, { 1, 1, 1, 1 } },
390 {
ISD::SHL, MVT::v4i64, { 1, 1, 1, 1 } },
391 {
ISD::SRL, MVT::v4i64, { 1, 1, 1, 1 } },
392 {
ISD::SRA, MVT::v4i64, { 1, 1, 1, 1 } },
393 {
ISD::SHL, MVT::v8i64, { 1, 1, 1, 1 } },
394 {
ISD::SRL, MVT::v8i64, { 1, 1, 1, 1 } },
395 {
ISD::SRA, MVT::v8i64, { 1, 1, 1, 1 } },
404 if (
const auto *Entry =
406 if (
auto KindCost = Entry->Cost[
CostKind])
407 return LT.first * *KindCost;
410 {
ISD::SHL, MVT::v16i8, { 1, 8, 2, 3 } },
411 {
ISD::SRL, MVT::v16i8, { 1, 8, 2, 3 } },
412 {
ISD::SRA, MVT::v16i8, { 2, 10, 5, 6 } },
413 {
ISD::SHL, MVT::v32i8, { 2, 8, 2, 4 } },
414 {
ISD::SRL, MVT::v32i8, { 2, 8, 2, 4 } },
415 {
ISD::SRA, MVT::v32i8, { 3, 10, 5, 9 } },
417 {
ISD::SHL, MVT::v8i16, { 1, 1, 1, 1 } },
418 {
ISD::SRL, MVT::v8i16, { 1, 1, 1, 1 } },
419 {
ISD::SRA, MVT::v8i16, { 1, 1, 1, 1 } },
420 {
ISD::SHL, MVT::v16i16,{ 2, 2, 1, 2 } },
421 {
ISD::SRL, MVT::v16i16,{ 2, 2, 1, 2 } },
422 {
ISD::SRA, MVT::v16i16,{ 2, 2, 1, 2 } },
424 {
ISD::SHL, MVT::v4i32, { 1, 1, 1, 1 } },
425 {
ISD::SRL, MVT::v4i32, { 1, 1, 1, 1 } },
426 {
ISD::SRA, MVT::v4i32, { 1, 1, 1, 1 } },
427 {
ISD::SHL, MVT::v8i32, { 2, 2, 1, 2 } },
428 {
ISD::SRL, MVT::v8i32, { 2, 2, 1, 2 } },
429 {
ISD::SRA, MVT::v8i32, { 2, 2, 1, 2 } },
431 {
ISD::SHL, MVT::v2i64, { 1, 1, 1, 1 } },
432 {
ISD::SRL, MVT::v2i64, { 1, 1, 1, 1 } },
433 {
ISD::SRA, MVT::v2i64, { 2, 3, 3, 3 } },
434 {
ISD::SHL, MVT::v4i64, { 2, 2, 1, 2 } },
435 {
ISD::SRL, MVT::v4i64, { 2, 2, 1, 2 } },
436 {
ISD::SRA, MVT::v4i64, { 4, 4, 3, 6 } },
445 if (
const auto *Entry =
447 if (
auto KindCost = Entry->Cost[
CostKind])
448 return LT.first * *KindCost;
451 {
ISD::SHL, MVT::v16i8, { 2, 7, 2, 3 } },
452 {
ISD::SRL, MVT::v16i8, { 2, 7, 2, 3 } },
453 {
ISD::SRA, MVT::v16i8, { 3, 9, 5, 6 } },
454 {
ISD::SHL, MVT::v32i8, { 4, 7, 7, 8 } },
455 {
ISD::SRL, MVT::v32i8, { 4, 7, 7, 8 } },
456 {
ISD::SRA, MVT::v32i8, { 7, 7, 12, 13 } },
458 {
ISD::SHL, MVT::v8i16, { 1, 2, 1, 1 } },
459 {
ISD::SRL, MVT::v8i16, { 1, 2, 1, 1 } },
460 {
ISD::SRA, MVT::v8i16, { 1, 2, 1, 1 } },
461 {
ISD::SHL, MVT::v16i16,{ 3, 6, 4, 5 } },
462 {
ISD::SRL, MVT::v16i16,{ 3, 6, 4, 5 } },
463 {
ISD::SRA, MVT::v16i16,{ 3, 6, 4, 5 } },
465 {
ISD::SHL, MVT::v4i32, { 1, 2, 1, 1 } },
466 {
ISD::SRL, MVT::v4i32, { 1, 2, 1, 1 } },
467 {
ISD::SRA, MVT::v4i32, { 1, 2, 1, 1 } },
468 {
ISD::SHL, MVT::v8i32, { 3, 6, 4, 5 } },
469 {
ISD::SRL, MVT::v8i32, { 3, 6, 4, 5 } },
470 {
ISD::SRA, MVT::v8i32, { 3, 6, 4, 5 } },
472 {
ISD::SHL, MVT::v2i64, { 1, 2, 1, 1 } },
473 {
ISD::SRL, MVT::v2i64, { 1, 2, 1, 1 } },
474 {
ISD::SRA, MVT::v2i64, { 2, 3, 3, 3 } },
475 {
ISD::SHL, MVT::v4i64, { 3, 6, 4, 5 } },
476 {
ISD::SRL, MVT::v4i64, { 3, 6, 4, 5 } },
477 {
ISD::SRA, MVT::v4i64, { 5, 7, 8, 9 } },
487 (!ST->hasXOP() || LT.second.getScalarSizeInBits() != 8))
488 if (
const auto *Entry =
490 if (
auto KindCost = Entry->Cost[
CostKind])
491 return LT.first * *KindCost;
494 {
ISD::SHL, MVT::v16i8, { 1, 7, 2, 3 } },
495 {
ISD::SRL, MVT::v16i8, { 1, 7, 2, 3 } },
496 {
ISD::SRA, MVT::v16i8, { 3, 9, 5, 6 } },
498 {
ISD::SHL, MVT::v8i16, { 1, 1, 1, 1 } },
499 {
ISD::SRL, MVT::v8i16, { 1, 1, 1, 1 } },
500 {
ISD::SRA, MVT::v8i16, { 1, 1, 1, 1 } },
502 {
ISD::SHL, MVT::v4i32, { 1, 1, 1, 1 } },
503 {
ISD::SRL, MVT::v4i32, { 1, 1, 1, 1 } },
504 {
ISD::SRA, MVT::v4i32, { 1, 1, 1, 1 } },
506 {
ISD::SHL, MVT::v2i64, { 1, 1, 1, 1 } },
507 {
ISD::SRL, MVT::v2i64, { 1, 1, 1, 1 } },
508 {
ISD::SRA, MVT::v2i64, { 3, 5, 6, 6 } },
518 (!ST->hasXOP() || LT.second.getScalarSizeInBits() != 8))
519 if (
const auto *Entry =
521 if (
auto KindCost = Entry->Cost[
CostKind])
522 return LT.first * *KindCost;
537 if (
const auto *Entry =
539 if (
auto KindCost = Entry->Cost[
CostKind])
540 return LT.first * *KindCost;
560 if (
const auto *Entry =
562 if (
auto KindCost = Entry->Cost[
CostKind])
563 return LT.first * *KindCost;
583 if (
const auto *Entry =
CostTableLookup(AVX2ConstCostTable, ISD, LT.second))
584 if (
auto KindCost = Entry->Cost[
CostKind])
585 return LT.first * *KindCost;
605 if (
const auto *Entry =
CostTableLookup(AVXConstCostTable, ISD, LT.second))
606 if (
auto KindCost = Entry->Cost[
CostKind])
607 return LT.first * *KindCost;
615 if (
const auto *Entry =
617 if (
auto KindCost = Entry->Cost[
CostKind])
618 return LT.first * *KindCost;
638 if (
const auto *Entry =
CostTableLookup(SSE2ConstCostTable, ISD, LT.second))
639 if (
auto KindCost = Entry->Cost[
CostKind])
640 return LT.first * *KindCost;
643 {
ISD::SHL, MVT::v16i8, { 3, 5, 5, 7 } },
644 {
ISD::SRL, MVT::v16i8, { 3,10, 5, 8 } },
645 {
ISD::SRA, MVT::v16i8, { 4,12, 8,12 } },
646 {
ISD::SHL, MVT::v32i8, { 4, 7, 6, 8 } },
647 {
ISD::SRL, MVT::v32i8, { 4, 8, 7, 9 } },
648 {
ISD::SRA, MVT::v32i8, { 5,10,10,13 } },
649 {
ISD::SHL, MVT::v64i8, { 4, 7, 6, 8 } },
650 {
ISD::SRL, MVT::v64i8, { 4, 8, 7,10 } },
651 {
ISD::SRA, MVT::v64i8, { 5,10,10,15 } },
653 {
ISD::SHL, MVT::v32i16, { 2, 4, 2, 3 } },
654 {
ISD::SRL, MVT::v32i16, { 2, 4, 2, 3 } },
655 {
ISD::SRA, MVT::v32i16, { 2, 4, 2, 3 } },
659 if (
const auto *Entry =
661 if (
auto KindCost = Entry->Cost[
CostKind])
662 return LT.first * *KindCost;
665 {
ISD::SHL, MVT::v32i16, { 5,10, 5, 7 } },
666 {
ISD::SRL, MVT::v32i16, { 5,10, 5, 7 } },
667 {
ISD::SRA, MVT::v32i16, { 5,10, 5, 7 } },
669 {
ISD::SHL, MVT::v16i32, { 2, 4, 2, 3 } },
670 {
ISD::SRL, MVT::v16i32, { 2, 4, 2, 3 } },
671 {
ISD::SRA, MVT::v16i32, { 2, 4, 2, 3 } },
673 {
ISD::SRA, MVT::v2i64, { 1, 2, 1, 2 } },
674 {
ISD::SHL, MVT::v4i64, { 1, 4, 1, 2 } },
675 {
ISD::SRL, MVT::v4i64, { 1, 4, 1, 2 } },
676 {
ISD::SRA, MVT::v4i64, { 1, 4, 1, 2 } },
677 {
ISD::SHL, MVT::v8i64, { 1, 4, 1, 2 } },
678 {
ISD::SRL, MVT::v8i64, { 1, 4, 1, 2 } },
679 {
ISD::SRA, MVT::v8i64, { 1, 4, 1, 2 } },
683 if (
const auto *Entry =
685 if (
auto KindCost = Entry->Cost[
CostKind])
686 return LT.first * *KindCost;
690 {
ISD::SHL, MVT::v16i8, { 3, 5, 5, 7 } },
691 {
ISD::SRL, MVT::v16i8, { 3, 9, 5, 8 } },
692 {
ISD::SRA, MVT::v16i8, { 4, 5, 9,13 } },
693 {
ISD::SHL, MVT::v32i8, { 4, 7, 6, 8 } },
694 {
ISD::SRL, MVT::v32i8, { 4, 8, 7, 9 } },
695 {
ISD::SRA, MVT::v32i8, { 6, 9,11,16 } },
697 {
ISD::SHL, MVT::v8i16, { 1, 2, 1, 2 } },
698 {
ISD::SRL, MVT::v8i16, { 1, 2, 1, 2 } },
699 {
ISD::SRA, MVT::v8i16, { 1, 2, 1, 2 } },
700 {
ISD::SHL, MVT::v16i16, { 2, 4, 2, 3 } },
701 {
ISD::SRL, MVT::v16i16, { 2, 4, 2, 3 } },
702 {
ISD::SRA, MVT::v16i16, { 2, 4, 2, 3 } },
704 {
ISD::SHL, MVT::v4i32, { 1, 2, 1, 2 } },
705 {
ISD::SRL, MVT::v4i32, { 1, 2, 1, 2 } },
706 {
ISD::SRA, MVT::v4i32, { 1, 2, 1, 2 } },
707 {
ISD::SHL, MVT::v8i32, { 2, 4, 2, 3 } },
708 {
ISD::SRL, MVT::v8i32, { 2, 4, 2, 3 } },
709 {
ISD::SRA, MVT::v8i32, { 2, 4, 2, 3 } },
711 {
ISD::SHL, MVT::v2i64, { 1, 2, 1, 2 } },
712 {
ISD::SRL, MVT::v2i64, { 1, 2, 1, 2 } },
713 {
ISD::SRA, MVT::v2i64, { 2, 4, 5, 7 } },
714 {
ISD::SHL, MVT::v4i64, { 2, 4, 1, 2 } },
715 {
ISD::SRL, MVT::v4i64, { 2, 4, 1, 2 } },
716 {
ISD::SRA, MVT::v4i64, { 4, 6, 5, 9 } },
720 if (
const auto *Entry =
722 if (
auto KindCost = Entry->Cost[
CostKind])
723 return LT.first * *KindCost;
726 {
ISD::SHL, MVT::v16i8, { 4, 4, 6, 8 } },
727 {
ISD::SRL, MVT::v16i8, { 4, 8, 5, 8 } },
728 {
ISD::SRA, MVT::v16i8, { 6, 6, 9,13 } },
729 {
ISD::SHL, MVT::v32i8, { 7, 8,11,14 } },
730 {
ISD::SRL, MVT::v32i8, { 7, 9,10,14 } },
731 {
ISD::SRA, MVT::v32i8, { 10,11,16,21 } },
733 {
ISD::SHL, MVT::v8i16, { 1, 3, 1, 2 } },
734 {
ISD::SRL, MVT::v8i16, { 1, 3, 1, 2 } },
735 {
ISD::SRA, MVT::v8i16, { 1, 3, 1, 2 } },
736 {
ISD::SHL, MVT::v16i16, { 3, 7, 5, 7 } },
737 {
ISD::SRL, MVT::v16i16, { 3, 7, 5, 7 } },
738 {
ISD::SRA, MVT::v16i16, { 3, 7, 5, 7 } },
740 {
ISD::SHL, MVT::v4i32, { 1, 3, 1, 2 } },
741 {
ISD::SRL, MVT::v4i32, { 1, 3, 1, 2 } },
742 {
ISD::SRA, MVT::v4i32, { 1, 3, 1, 2 } },
743 {
ISD::SHL, MVT::v8i32, { 3, 7, 5, 7 } },
744 {
ISD::SRL, MVT::v8i32, { 3, 7, 5, 7 } },
745 {
ISD::SRA, MVT::v8i32, { 3, 7, 5, 7 } },
747 {
ISD::SHL, MVT::v2i64, { 1, 3, 1, 2 } },
748 {
ISD::SRL, MVT::v2i64, { 1, 3, 1, 2 } },
749 {
ISD::SRA, MVT::v2i64, { 3, 4, 5, 7 } },
750 {
ISD::SHL, MVT::v4i64, { 3, 7, 4, 6 } },
751 {
ISD::SRL, MVT::v4i64, { 3, 7, 4, 6 } },
752 {
ISD::SRA, MVT::v4i64, { 6, 7,10,13 } },
757 (!ST->hasXOP() || LT.second.getScalarSizeInBits() != 8))
758 if (
const auto *Entry =
760 if (
auto KindCost = Entry->Cost[
CostKind])
761 return LT.first * *KindCost;
765 {
ISD::SHL, MVT::v16i8, { 9, 10, 6, 9 } },
766 {
ISD::SRL, MVT::v16i8, { 9, 13, 5, 9 } },
767 {
ISD::SRA, MVT::v16i8, { 11, 15, 9,13 } },
769 {
ISD::SHL, MVT::v8i16, { 2, 2, 1, 2 } },
770 {
ISD::SRL, MVT::v8i16, { 2, 2, 1, 2 } },
771 {
ISD::SRA, MVT::v8i16, { 2, 2, 1, 2 } },
773 {
ISD::SHL, MVT::v4i32, { 2, 2, 1, 2 } },
774 {
ISD::SRL, MVT::v4i32, { 2, 2, 1, 2 } },
775 {
ISD::SRA, MVT::v4i32, { 2, 2, 1, 2 } },
777 {
ISD::SHL, MVT::v2i64, { 2, 2, 1, 2 } },
778 {
ISD::SRL, MVT::v2i64, { 2, 2, 1, 2 } },
779 {
ISD::SRA, MVT::v2i64, { 5, 9, 5, 7 } },
783 (!ST->hasXOP() || LT.second.getScalarSizeInBits() != 8))
784 if (
const auto *Entry =
786 if (
auto KindCost = Entry->Cost[
CostKind])
787 return LT.first * *KindCost;
790 {
ISD::MUL, MVT::v2i64, { 2, 15, 1, 3 } },
791 {
ISD::MUL, MVT::v4i64, { 2, 15, 1, 3 } },
792 {
ISD::MUL, MVT::v8i64, { 3, 15, 1, 3 } }
797 if (
const auto *Entry =
CostTableLookup(AVX512DQCostTable, ISD, LT.second))
798 if (
auto KindCost = Entry->Cost[
CostKind])
799 return LT.first * *KindCost;
802 {
ISD::SHL, MVT::v16i8, { 4, 8, 4, 5 } },
803 {
ISD::SRL, MVT::v16i8, { 4, 8, 4, 5 } },
804 {
ISD::SRA, MVT::v16i8, { 4, 8, 4, 5 } },
805 {
ISD::SHL, MVT::v32i8, { 4, 23,11,16 } },
806 {
ISD::SRL, MVT::v32i8, { 4, 30,12,18 } },
807 {
ISD::SRA, MVT::v32i8, { 6, 13,24,30 } },
808 {
ISD::SHL, MVT::v64i8, { 6, 19,13,15 } },
809 {
ISD::SRL, MVT::v64i8, { 7, 27,15,18 } },
810 {
ISD::SRA, MVT::v64i8, { 15, 15,30,30 } },
812 {
ISD::SHL, MVT::v8i16, { 1, 1, 1, 1 } },
813 {
ISD::SRL, MVT::v8i16, { 1, 1, 1, 1 } },
814 {
ISD::SRA, MVT::v8i16, { 1, 1, 1, 1 } },
815 {
ISD::SHL, MVT::v16i16, { 1, 1, 1, 1 } },
816 {
ISD::SRL, MVT::v16i16, { 1, 1, 1, 1 } },
817 {
ISD::SRA, MVT::v16i16, { 1, 1, 1, 1 } },
818 {
ISD::SHL, MVT::v32i16, { 1, 1, 1, 1 } },
819 {
ISD::SRL, MVT::v32i16, { 1, 1, 1, 1 } },
820 {
ISD::SRA, MVT::v32i16, { 1, 1, 1, 1 } },
822 {
ISD::ADD, MVT::v64i8, { 1, 1, 1, 1 } },
823 {
ISD::ADD, MVT::v32i16, { 1, 1, 1, 1 } },
825 {
ISD::ADD, MVT::v32i8, { 1, 1, 1, 1 } },
826 {
ISD::ADD, MVT::v16i16, { 1, 1, 1, 1 } },
827 {
ISD::ADD, MVT::v8i32, { 1, 1, 1, 1 } },
828 {
ISD::ADD, MVT::v4i64, { 1, 1, 1, 1 } },
830 {
ISD::SUB, MVT::v64i8, { 1, 1, 1, 1 } },
831 {
ISD::SUB, MVT::v32i16, { 1, 1, 1, 1 } },
833 {
ISD::MUL, MVT::v64i8, { 5, 10,10,11 } },
834 {
ISD::MUL, MVT::v32i16, { 1, 5, 1, 1 } },
836 {
ISD::SUB, MVT::v32i8, { 1, 1, 1, 1 } },
837 {
ISD::SUB, MVT::v16i16, { 1, 1, 1, 1 } },
838 {
ISD::SUB, MVT::v8i32, { 1, 1, 1, 1 } },
839 {
ISD::SUB, MVT::v4i64, { 1, 1, 1, 1 } },
844 if (
const auto *Entry =
CostTableLookup(AVX512BWCostTable, ISD, LT.second))
845 if (
auto KindCost = Entry->Cost[
CostKind])
846 return LT.first * *KindCost;
849 {
ISD::SHL, MVT::v64i8, { 15, 19,27,33 } },
850 {
ISD::SRL, MVT::v64i8, { 15, 19,30,36 } },
851 {
ISD::SRA, MVT::v64i8, { 37, 37,51,63 } },
853 {
ISD::SHL, MVT::v32i16, { 11, 16,11,15 } },
854 {
ISD::SRL, MVT::v32i16, { 11, 16,11,15 } },
855 {
ISD::SRA, MVT::v32i16, { 11, 16,11,15 } },
857 {
ISD::SHL, MVT::v4i32, { 1, 1, 1, 1 } },
858 {
ISD::SRL, MVT::v4i32, { 1, 1, 1, 1 } },
859 {
ISD::SRA, MVT::v4i32, { 1, 1, 1, 1 } },
860 {
ISD::SHL, MVT::v8i32, { 1, 1, 1, 1 } },
861 {
ISD::SRL, MVT::v8i32, { 1, 1, 1, 1 } },
862 {
ISD::SRA, MVT::v8i32, { 1, 1, 1, 1 } },
863 {
ISD::SHL, MVT::v16i32, { 1, 1, 1, 1 } },
864 {
ISD::SRL, MVT::v16i32, { 1, 1, 1, 1 } },
865 {
ISD::SRA, MVT::v16i32, { 1, 1, 1, 1 } },
867 {
ISD::SHL, MVT::v2i64, { 1, 1, 1, 1 } },
868 {
ISD::SRL, MVT::v2i64, { 1, 1, 1, 1 } },
869 {
ISD::SRA, MVT::v2i64, { 1, 1, 1, 1 } },
870 {
ISD::SHL, MVT::v4i64, { 1, 1, 1, 1 } },
871 {
ISD::SRL, MVT::v4i64, { 1, 1, 1, 1 } },
872 {
ISD::SRA, MVT::v4i64, { 1, 1, 1, 1 } },
873 {
ISD::SHL, MVT::v8i64, { 1, 1, 1, 1 } },
874 {
ISD::SRL, MVT::v8i64, { 1, 1, 1, 1 } },
875 {
ISD::SRA, MVT::v8i64, { 1, 1, 1, 1 } },
877 {
ISD::ADD, MVT::v64i8, { 3, 7, 5, 5 } },
878 {
ISD::ADD, MVT::v32i16, { 3, 7, 5, 5 } },
880 {
ISD::SUB, MVT::v64i8, { 3, 7, 5, 5 } },
881 {
ISD::SUB, MVT::v32i16, { 3, 7, 5, 5 } },
883 {
ISD::AND, MVT::v32i8, { 1, 1, 1, 1 } },
884 {
ISD::AND, MVT::v16i16, { 1, 1, 1, 1 } },
885 {
ISD::AND, MVT::v8i32, { 1, 1, 1, 1 } },
886 {
ISD::AND, MVT::v4i64, { 1, 1, 1, 1 } },
888 {
ISD::OR, MVT::v32i8, { 1, 1, 1, 1 } },
889 {
ISD::OR, MVT::v16i16, { 1, 1, 1, 1 } },
890 {
ISD::OR, MVT::v8i32, { 1, 1, 1, 1 } },
891 {
ISD::OR, MVT::v4i64, { 1, 1, 1, 1 } },
893 {
ISD::XOR, MVT::v32i8, { 1, 1, 1, 1 } },
894 {
ISD::XOR, MVT::v16i16, { 1, 1, 1, 1 } },
895 {
ISD::XOR, MVT::v8i32, { 1, 1, 1, 1 } },
896 {
ISD::XOR, MVT::v4i64, { 1, 1, 1, 1 } },
898 {
ISD::MUL, MVT::v16i32, { 1, 10, 1, 2 } },
899 {
ISD::MUL, MVT::v8i32, { 1, 10, 1, 2 } },
900 {
ISD::MUL, MVT::v4i32, { 1, 10, 1, 2 } },
901 {
ISD::MUL, MVT::v8i64, { 6, 9, 8, 8 } },
906 {
ISD::FNEG, MVT::v8f64, { 1, 1, 1, 2 } },
907 {
ISD::FADD, MVT::v8f64, { 1, 4, 1, 1 } },
908 {
ISD::FADD, MVT::v4f64, { 1, 4, 1, 1 } },
909 {
ISD::FSUB, MVT::v8f64, { 1, 4, 1, 1 } },
910 {
ISD::FSUB, MVT::v4f64, { 1, 4, 1, 1 } },
911 {
ISD::FMUL, MVT::v8f64, { 1, 4, 1, 1 } },
912 {
ISD::FMUL, MVT::v4f64, { 1, 4, 1, 1 } },
913 {
ISD::FMUL, MVT::v2f64, { 1, 4, 1, 1 } },
916 {
ISD::FDIV, MVT::f64, { 4, 14, 1, 1 } },
917 {
ISD::FDIV, MVT::v2f64, { 4, 14, 1, 1 } },
918 {
ISD::FDIV, MVT::v4f64, { 8, 14, 1, 1 } },
919 {
ISD::FDIV, MVT::v8f64, { 16, 23, 1, 3 } },
921 {
ISD::FNEG, MVT::v16f32, { 1, 1, 1, 2 } },
922 {
ISD::FADD, MVT::v16f32, { 1, 4, 1, 1 } },
923 {
ISD::FADD, MVT::v8f32, { 1, 4, 1, 1 } },
924 {
ISD::FSUB, MVT::v16f32, { 1, 4, 1, 1 } },
925 {
ISD::FSUB, MVT::v8f32, { 1, 4, 1, 1 } },
926 {
ISD::FMUL, MVT::v16f32, { 1, 4, 1, 1 } },
927 {
ISD::FMUL, MVT::v8f32, { 1, 4, 1, 1 } },
928 {
ISD::FMUL, MVT::v4f32, { 1, 4, 1, 1 } },
931 {
ISD::FDIV, MVT::f32, { 3, 11, 1, 1 } },
932 {
ISD::FDIV, MVT::v4f32, { 3, 11, 1, 1 } },
933 {
ISD::FDIV, MVT::v8f32, { 5, 11, 1, 1 } },
934 {
ISD::FDIV, MVT::v16f32, { 10, 18, 1, 3 } },
938 if (
const auto *Entry =
CostTableLookup(AVX512CostTable, ISD, LT.second))
939 if (
auto KindCost = Entry->Cost[
CostKind])
940 return LT.first * *KindCost;
945 {
ISD::SHL, MVT::v4i32, { 2, 3, 1, 3 } },
946 {
ISD::SRL, MVT::v4i32, { 2, 3, 1, 3 } },
947 {
ISD::SRA, MVT::v4i32, { 2, 3, 1, 3 } },
948 {
ISD::SHL, MVT::v8i32, { 4, 4, 1, 3 } },
949 {
ISD::SRL, MVT::v8i32, { 4, 4, 1, 3 } },
950 {
ISD::SRA, MVT::v8i32, { 4, 4, 1, 3 } },
951 {
ISD::SHL, MVT::v2i64, { 2, 3, 1, 1 } },
952 {
ISD::SRL, MVT::v2i64, { 2, 3, 1, 1 } },
953 {
ISD::SHL, MVT::v4i64, { 4, 4, 1, 2 } },
954 {
ISD::SRL, MVT::v4i64, { 4, 4, 1, 2 } },
966 if (ST->
hasAVX2() && !(ST->hasXOP() && LT.second == MVT::v4i32)) {
967 if (ISD ==
ISD::SHL && LT.second == MVT::v16i16 &&
974 if (
const auto *Entry =
CostTableLookup(AVX2ShiftCostTable, ISD, LT.second))
975 if (
auto KindCost = Entry->Cost[
CostKind])
976 return LT.first * *KindCost;
981 {
ISD::SHL, MVT::v16i8, { 1, 3, 1, 1 } },
982 {
ISD::SRL, MVT::v16i8, { 2, 3, 1, 1 } },
983 {
ISD::SRA, MVT::v16i8, { 2, 3, 1, 1 } },
984 {
ISD::SHL, MVT::v8i16, { 1, 3, 1, 1 } },
985 {
ISD::SRL, MVT::v8i16, { 2, 3, 1, 1 } },
986 {
ISD::SRA, MVT::v8i16, { 2, 3, 1, 1 } },
987 {
ISD::SHL, MVT::v4i32, { 1, 3, 1, 1 } },
988 {
ISD::SRL, MVT::v4i32, { 2, 3, 1, 1 } },
989 {
ISD::SRA, MVT::v4i32, { 2, 3, 1, 1 } },
990 {
ISD::SHL, MVT::v2i64, { 1, 3, 1, 1 } },
991 {
ISD::SRL, MVT::v2i64, { 2, 3, 1, 1 } },
992 {
ISD::SRA, MVT::v2i64, { 2, 3, 1, 1 } },
994 {
ISD::SHL, MVT::v32i8, { 4, 7, 5, 6 } },
995 {
ISD::SRL, MVT::v32i8, { 6, 7, 5, 6 } },
996 {
ISD::SRA, MVT::v32i8, { 6, 7, 5, 6 } },
997 {
ISD::SHL, MVT::v16i16, { 4, 7, 5, 6 } },
998 {
ISD::SRL, MVT::v16i16, { 6, 7, 5, 6 } },
999 {
ISD::SRA, MVT::v16i16, { 6, 7, 5, 6 } },
1000 {
ISD::SHL, MVT::v8i32, { 4, 7, 5, 6 } },
1001 {
ISD::SRL, MVT::v8i32, { 6, 7, 5, 6 } },
1002 {
ISD::SRA, MVT::v8i32, { 6, 7, 5, 6 } },
1003 {
ISD::SHL, MVT::v4i64, { 4, 7, 5, 6 } },
1004 {
ISD::SRL, MVT::v4i64, { 6, 7, 5, 6 } },
1005 {
ISD::SRA, MVT::v4i64, { 6, 7, 5, 6 } },
1015 if (
const auto *Entry =
1017 if (
auto KindCost = Entry->Cost[
CostKind])
1018 return LT.first * *KindCost;
1025 if (((VT == MVT::v8i16 || VT == MVT::v4i32) && ST->
hasSSE2()) ||
1026 ((VT == MVT::v16i16 || VT == MVT::v8i32) && ST->
hasAVX()))
1031 {
ISD::FDIV, MVT::f32, { 18, 19, 1, 1 } },
1032 {
ISD::FDIV, MVT::v4f32, { 35, 36, 1, 1 } },
1033 {
ISD::FDIV, MVT::f64, { 33, 34, 1, 1 } },
1034 {
ISD::FDIV, MVT::v2f64, { 65, 66, 1, 1 } },
1037 if (ST->useGLMDivSqrtCosts())
1038 if (
const auto *Entry =
CostTableLookup(GLMCostTable, ISD, LT.second))
1039 if (
auto KindCost = Entry->Cost[
CostKind])
1040 return LT.first * *KindCost;
1043 {
ISD::MUL, MVT::v4i32, { 11, 11, 1, 7 } },
1044 {
ISD::MUL, MVT::v8i16, { 2, 5, 1, 1 } },
1045 {
ISD::FMUL, MVT::f64, { 2, 5, 1, 1 } },
1046 {
ISD::FMUL, MVT::f32, { 1, 4, 1, 1 } },
1047 {
ISD::FMUL, MVT::v2f64, { 4, 7, 1, 1 } },
1048 {
ISD::FMUL, MVT::v4f32, { 2, 5, 1, 1 } },
1049 {
ISD::FDIV, MVT::f32, { 17, 19, 1, 1 } },
1050 {
ISD::FDIV, MVT::v4f32, { 39, 39, 1, 6 } },
1051 {
ISD::FDIV, MVT::f64, { 32, 34, 1, 1 } },
1052 {
ISD::FDIV, MVT::v2f64, { 69, 69, 1, 6 } },
1053 {
ISD::FADD, MVT::v2f64, { 2, 4, 1, 1 } },
1054 {
ISD::FSUB, MVT::v2f64, { 2, 4, 1, 1 } },
1060 {
ISD::MUL, MVT::v2i64, { 17, 22, 9, 9 } },
1062 {
ISD::ADD, MVT::v2i64, { 4, 2, 1, 2 } },
1063 {
ISD::SUB, MVT::v2i64, { 4, 2, 1, 2 } },
1066 if (ST->useSLMArithCosts())
1067 if (
const auto *Entry =
CostTableLookup(SLMCostTable, ISD, LT.second))
1068 if (
auto KindCost = Entry->Cost[
CostKind])
1069 return LT.first * *KindCost;
1072 {
ISD::SHL, MVT::v16i8, { 6, 21,11,16 } },
1073 {
ISD::SHL, MVT::v32i8, { 6, 23,11,22 } },
1074 {
ISD::SHL, MVT::v8i16, { 5, 18, 5,10 } },
1075 {
ISD::SHL, MVT::v16i16, { 8, 10,10,14 } },
1077 {
ISD::SRL, MVT::v16i8, { 6, 27,12,18 } },
1078 {
ISD::SRL, MVT::v32i8, { 8, 30,12,24 } },
1079 {
ISD::SRL, MVT::v8i16, { 5, 11, 5,10 } },
1080 {
ISD::SRL, MVT::v16i16, { 8, 10,10,14 } },
1082 {
ISD::SRA, MVT::v16i8, { 17, 17,24,30 } },
1083 {
ISD::SRA, MVT::v32i8, { 18, 20,24,43 } },
1084 {
ISD::SRA, MVT::v8i16, { 5, 11, 5,10 } },
1085 {
ISD::SRA, MVT::v16i16, { 8, 10,10,14 } },
1086 {
ISD::SRA, MVT::v2i64, { 4, 5, 5, 5 } },
1087 {
ISD::SRA, MVT::v4i64, { 8, 8, 5, 9 } },
1089 {
ISD::SUB, MVT::v32i8, { 1, 1, 1, 2 } },
1090 {
ISD::ADD, MVT::v32i8, { 1, 1, 1, 2 } },
1091 {
ISD::SUB, MVT::v16i16, { 1, 1, 1, 2 } },
1092 {
ISD::ADD, MVT::v16i16, { 1, 1, 1, 2 } },
1093 {
ISD::SUB, MVT::v8i32, { 1, 1, 1, 2 } },
1094 {
ISD::ADD, MVT::v8i32, { 1, 1, 1, 2 } },
1095 {
ISD::SUB, MVT::v4i64, { 1, 1, 1, 2 } },
1096 {
ISD::ADD, MVT::v4i64, { 1, 1, 1, 2 } },
1098 {
ISD::MUL, MVT::v16i8, { 5, 18, 6,12 } },
1099 {
ISD::MUL, MVT::v32i8, { 6, 11,10,19 } },
1100 {
ISD::MUL, MVT::v16i16, { 2, 5, 1, 2 } },
1101 {
ISD::MUL, MVT::v8i32, { 4, 10, 1, 2 } },
1102 {
ISD::MUL, MVT::v4i32, { 2, 10, 1, 2 } },
1103 {
ISD::MUL, MVT::v4i64, { 6, 10, 8,13 } },
1104 {
ISD::MUL, MVT::v2i64, { 6, 10, 8, 8 } },
1108 {
ISD::FNEG, MVT::v4f64, { 1, 1, 1, 2 } },
1109 {
ISD::FNEG, MVT::v8f32, { 1, 1, 1, 2 } },
1111 {
ISD::FADD, MVT::f64, { 1, 4, 1, 1 } },
1112 {
ISD::FADD, MVT::f32, { 1, 4, 1, 1 } },
1113 {
ISD::FADD, MVT::v2f64, { 1, 4, 1, 1 } },
1114 {
ISD::FADD, MVT::v4f32, { 1, 4, 1, 1 } },
1115 {
ISD::FADD, MVT::v4f64, { 1, 4, 1, 2 } },
1116 {
ISD::FADD, MVT::v8f32, { 1, 4, 1, 2 } },
1118 {
ISD::FSUB, MVT::f64, { 1, 4, 1, 1 } },
1119 {
ISD::FSUB, MVT::f32, { 1, 4, 1, 1 } },
1120 {
ISD::FSUB, MVT::v2f64, { 1, 4, 1, 1 } },
1121 {
ISD::FSUB, MVT::v4f32, { 1, 4, 1, 1 } },
1122 {
ISD::FSUB, MVT::v4f64, { 1, 4, 1, 2 } },
1123 {
ISD::FSUB, MVT::v8f32, { 1, 4, 1, 2 } },
1125 {
ISD::FMUL, MVT::f64, { 1, 5, 1, 1 } },
1126 {
ISD::FMUL, MVT::f32, { 1, 5, 1, 1 } },
1127 {
ISD::FMUL, MVT::v2f64, { 1, 5, 1, 1 } },
1128 {
ISD::FMUL, MVT::v4f32, { 1, 5, 1, 1 } },
1129 {
ISD::FMUL, MVT::v4f64, { 1, 5, 1, 2 } },
1130 {
ISD::FMUL, MVT::v8f32, { 1, 5, 1, 2 } },
1132 {
ISD::FDIV, MVT::f32, { 7, 13, 1, 1 } },
1133 {
ISD::FDIV, MVT::v4f32, { 7, 13, 1, 1 } },
1134 {
ISD::FDIV, MVT::v8f32, { 14, 21, 1, 3 } },
1135 {
ISD::FDIV, MVT::f64, { 14, 20, 1, 1 } },
1136 {
ISD::FDIV, MVT::v2f64, { 14, 20, 1, 1 } },
1137 {
ISD::FDIV, MVT::v4f64, { 28, 35, 1, 3 } },
1142 if (
const auto *Entry =
CostTableLookup(AVX2CostTable, ISD, LT.second))
1143 if (
auto KindCost = Entry->Cost[
CostKind])
1144 return LT.first * *KindCost;
1150 {
ISD::MUL, MVT::v32i8, { 12, 13, 22, 23 } },
1151 {
ISD::MUL, MVT::v16i16, { 4, 8, 5, 6 } },
1152 {
ISD::MUL, MVT::v8i32, { 5, 8, 5, 10 } },
1153 {
ISD::MUL, MVT::v4i32, { 2, 5, 1, 3 } },
1154 {
ISD::MUL, MVT::v4i64, { 12, 15, 19, 20 } },
1156 {
ISD::AND, MVT::v32i8, { 1, 1, 1, 2 } },
1157 {
ISD::AND, MVT::v16i16, { 1, 1, 1, 2 } },
1158 {
ISD::AND, MVT::v8i32, { 1, 1, 1, 2 } },
1159 {
ISD::AND, MVT::v4i64, { 1, 1, 1, 2 } },
1161 {
ISD::OR, MVT::v32i8, { 1, 1, 1, 2 } },
1162 {
ISD::OR, MVT::v16i16, { 1, 1, 1, 2 } },
1163 {
ISD::OR, MVT::v8i32, { 1, 1, 1, 2 } },
1164 {
ISD::OR, MVT::v4i64, { 1, 1, 1, 2 } },
1166 {
ISD::XOR, MVT::v32i8, { 1, 1, 1, 2 } },
1167 {
ISD::XOR, MVT::v16i16, { 1, 1, 1, 2 } },
1168 {
ISD::XOR, MVT::v8i32, { 1, 1, 1, 2 } },
1169 {
ISD::XOR, MVT::v4i64, { 1, 1, 1, 2 } },
1171 {
ISD::SUB, MVT::v32i8, { 4, 2, 5, 6 } },
1172 {
ISD::ADD, MVT::v32i8, { 4, 2, 5, 6 } },
1173 {
ISD::SUB, MVT::v16i16, { 4, 2, 5, 6 } },
1174 {
ISD::ADD, MVT::v16i16, { 4, 2, 5, 6 } },
1175 {
ISD::SUB, MVT::v8i32, { 4, 2, 5, 6 } },
1176 {
ISD::ADD, MVT::v8i32, { 4, 2, 5, 6 } },
1177 {
ISD::SUB, MVT::v4i64, { 4, 2, 5, 6 } },
1178 {
ISD::ADD, MVT::v4i64, { 4, 2, 5, 6 } },
1179 {
ISD::SUB, MVT::v2i64, { 1, 1, 1, 1 } },
1180 {
ISD::ADD, MVT::v2i64, { 1, 1, 1, 1 } },
1182 {
ISD::SHL, MVT::v16i8, { 10, 21,11,17 } },
1183 {
ISD::SHL, MVT::v32i8, { 22, 22,27,40 } },
1184 {
ISD::SHL, MVT::v8i16, { 6, 9,11,11 } },
1185 {
ISD::SHL, MVT::v16i16, { 13, 16,24,25 } },
1186 {
ISD::SHL, MVT::v4i32, { 3, 11, 4, 6 } },
1187 {
ISD::SHL, MVT::v8i32, { 9, 11,12,17 } },
1188 {
ISD::SHL, MVT::v2i64, { 2, 4, 4, 6 } },
1189 {
ISD::SHL, MVT::v4i64, { 6, 7,11,15 } },
1191 {
ISD::SRL, MVT::v16i8, { 11, 27,12,18 } },
1192 {
ISD::SRL, MVT::v32i8, { 23, 23,30,43 } },
1193 {
ISD::SRL, MVT::v8i16, { 13, 16,14,22 } },
1194 {
ISD::SRL, MVT::v16i16, { 28, 30,31,48 } },
1195 {
ISD::SRL, MVT::v4i32, { 6, 7,12,16 } },
1196 {
ISD::SRL, MVT::v8i32, { 14, 14,26,34 } },
1197 {
ISD::SRL, MVT::v2i64, { 2, 4, 4, 6 } },
1198 {
ISD::SRL, MVT::v4i64, { 6, 7,11,15 } },
1200 {
ISD::SRA, MVT::v16i8, { 21, 22,24,36 } },
1201 {
ISD::SRA, MVT::v32i8, { 44, 45,51,76 } },
1202 {
ISD::SRA, MVT::v8i16, { 13, 16,14,22 } },
1203 {
ISD::SRA, MVT::v16i16, { 28, 30,31,48 } },
1204 {
ISD::SRA, MVT::v4i32, { 6, 7,12,16 } },
1205 {
ISD::SRA, MVT::v8i32, { 14, 14,26,34 } },
1206 {
ISD::SRA, MVT::v2i64, { 5, 6,10,14 } },
1207 {
ISD::SRA, MVT::v4i64, { 12, 12,22,30 } },
1209 {
ISD::FNEG, MVT::v4f64, { 2, 2, 1, 2 } },
1210 {
ISD::FNEG, MVT::v8f32, { 2, 2, 1, 2 } },
1212 {
ISD::FADD, MVT::f64, { 1, 5, 1, 1 } },
1213 {
ISD::FADD, MVT::f32, { 1, 5, 1, 1 } },
1214 {
ISD::FADD, MVT::v2f64, { 1, 5, 1, 1 } },
1215 {
ISD::FADD, MVT::v4f32, { 1, 5, 1, 1 } },
1216 {
ISD::FADD, MVT::v4f64, { 2, 5, 1, 2 } },
1217 {
ISD::FADD, MVT::v8f32, { 2, 5, 1, 2 } },
1219 {
ISD::FSUB, MVT::f64, { 1, 5, 1, 1 } },
1220 {
ISD::FSUB, MVT::f32, { 1, 5, 1, 1 } },
1221 {
ISD::FSUB, MVT::v2f64, { 1, 5, 1, 1 } },
1222 {
ISD::FSUB, MVT::v4f32, { 1, 5, 1, 1 } },
1223 {
ISD::FSUB, MVT::v4f64, { 2, 5, 1, 2 } },
1224 {
ISD::FSUB, MVT::v8f32, { 2, 5, 1, 2 } },
1226 {
ISD::FMUL, MVT::f64, { 2, 5, 1, 1 } },
1227 {
ISD::FMUL, MVT::f32, { 1, 5, 1, 1 } },
1228 {
ISD::FMUL, MVT::v2f64, { 2, 5, 1, 1 } },
1229 {
ISD::FMUL, MVT::v4f32, { 1, 5, 1, 1 } },
1230 {
ISD::FMUL, MVT::v4f64, { 4, 5, 1, 2 } },
1231 {
ISD::FMUL, MVT::v8f32, { 2, 5, 1, 2 } },
1233 {
ISD::FDIV, MVT::f32, { 14, 14, 1, 1 } },
1234 {
ISD::FDIV, MVT::v4f32, { 14, 14, 1, 1 } },
1235 {
ISD::FDIV, MVT::v8f32, { 28, 29, 1, 3 } },
1236 {
ISD::FDIV, MVT::f64, { 22, 22, 1, 1 } },
1237 {
ISD::FDIV, MVT::v2f64, { 22, 22, 1, 1 } },
1238 {
ISD::FDIV, MVT::v4f64, { 44, 45, 1, 3 } },
1242 if (
const auto *Entry =
CostTableLookup(AVX1CostTable, ISD, LT.second))
1243 if (
auto KindCost = Entry->Cost[
CostKind])
1244 return LT.first * *KindCost;
1247 {
ISD::FADD, MVT::f64, { 1, 3, 1, 1 } },
1248 {
ISD::FADD, MVT::f32, { 1, 3, 1, 1 } },
1249 {
ISD::FADD, MVT::v2f64, { 1, 3, 1, 1 } },
1250 {
ISD::FADD, MVT::v4f32, { 1, 3, 1, 1 } },
1252 {
ISD::FSUB, MVT::f64, { 1, 3, 1, 1 } },
1253 {
ISD::FSUB, MVT::f32 , { 1, 3, 1, 1 } },
1254 {
ISD::FSUB, MVT::v2f64, { 1, 3, 1, 1 } },
1255 {
ISD::FSUB, MVT::v4f32, { 1, 3, 1, 1 } },
1257 {
ISD::FMUL, MVT::f64, { 1, 5, 1, 1 } },
1258 {
ISD::FMUL, MVT::f32, { 1, 5, 1, 1 } },
1259 {
ISD::FMUL, MVT::v2f64, { 1, 5, 1, 1 } },
1260 {
ISD::FMUL, MVT::v4f32, { 1, 5, 1, 1 } },
1262 {
ISD::FDIV, MVT::f32, { 14, 14, 1, 1 } },
1263 {
ISD::FDIV, MVT::v4f32, { 14, 14, 1, 1 } },
1264 {
ISD::FDIV, MVT::f64, { 22, 22, 1, 1 } },
1265 {
ISD::FDIV, MVT::v2f64, { 22, 22, 1, 1 } },
1267 {
ISD::MUL, MVT::v2i64, { 6, 10,10,10 } }
1271 if (
const auto *Entry =
CostTableLookup(SSE42CostTable, ISD, LT.second))
1272 if (
auto KindCost = Entry->Cost[
CostKind])
1273 return LT.first * *KindCost;
1276 {
ISD::SHL, MVT::v16i8, { 15, 24,17,22 } },
1277 {
ISD::SHL, MVT::v8i16, { 11, 14,11,11 } },
1278 {
ISD::SHL, MVT::v4i32, { 14, 20, 4,10 } },
1280 {
ISD::SRL, MVT::v16i8, { 16, 27,18,24 } },
1281 {
ISD::SRL, MVT::v8i16, { 22, 26,23,27 } },
1282 {
ISD::SRL, MVT::v4i32, { 16, 17,15,19 } },
1283 {
ISD::SRL, MVT::v2i64, { 4, 6, 5, 7 } },
1285 {
ISD::SRA, MVT::v16i8, { 38, 41,30,36 } },
1286 {
ISD::SRA, MVT::v8i16, { 22, 26,23,27 } },
1287 {
ISD::SRA, MVT::v4i32, { 16, 17,15,19 } },
1288 {
ISD::SRA, MVT::v2i64, { 8, 17, 5, 7 } },
1290 {
ISD::MUL, MVT::v16i8, { 5, 18,10,12 } },
1291 {
ISD::MUL, MVT::v4i32, { 2, 11, 1, 1 } }
1295 if (
const auto *Entry =
CostTableLookup(SSE41CostTable, ISD, LT.second))
1296 if (
auto KindCost = Entry->Cost[
CostKind])
1297 return LT.first * *KindCost;
1302 {
ISD::SHL, MVT::v16i8, { 13, 21,26,28 } },
1303 {
ISD::SHL, MVT::v8i16, { 24, 27,16,20 } },
1304 {
ISD::SHL, MVT::v4i32, { 17, 19,10,12 } },
1305 {
ISD::SHL, MVT::v2i64, { 4, 6, 5, 7 } },
1307 {
ISD::SRL, MVT::v16i8, { 14, 28,27,30 } },
1308 {
ISD::SRL, MVT::v8i16, { 16, 19,31,31 } },
1309 {
ISD::SRL, MVT::v4i32, { 12, 12,15,19 } },
1310 {
ISD::SRL, MVT::v2i64, { 4, 6, 5, 7 } },
1312 {
ISD::SRA, MVT::v16i8, { 27, 30,54,54 } },
1313 {
ISD::SRA, MVT::v8i16, { 16, 19,31,31 } },
1314 {
ISD::SRA, MVT::v4i32, { 12, 12,15,19 } },
1315 {
ISD::SRA, MVT::v2i64, { 8, 11,12,16 } },
1317 {
ISD::AND, MVT::v16i8, { 1, 1, 1, 1 } },
1318 {
ISD::AND, MVT::v8i16, { 1, 1, 1, 1 } },
1319 {
ISD::AND, MVT::v4i32, { 1, 1, 1, 1 } },
1320 {
ISD::AND, MVT::v2i64, { 1, 1, 1, 1 } },
1322 {
ISD::OR, MVT::v16i8, { 1, 1, 1, 1 } },
1323 {
ISD::OR, MVT::v8i16, { 1, 1, 1, 1 } },
1324 {
ISD::OR, MVT::v4i32, { 1, 1, 1, 1 } },
1325 {
ISD::OR, MVT::v2i64, { 1, 1, 1, 1 } },
1327 {
ISD::XOR, MVT::v16i8, { 1, 1, 1, 1 } },
1328 {
ISD::XOR, MVT::v8i16, { 1, 1, 1, 1 } },
1329 {
ISD::XOR, MVT::v4i32, { 1, 1, 1, 1 } },
1330 {
ISD::XOR, MVT::v2i64, { 1, 1, 1, 1 } },
1332 {
ISD::ADD, MVT::v2i64, { 1, 2, 1, 2 } },
1333 {
ISD::SUB, MVT::v2i64, { 1, 2, 1, 2 } },
1335 {
ISD::MUL, MVT::v16i8, { 5, 18,12,12 } },
1336 {
ISD::MUL, MVT::v8i16, { 1, 5, 1, 1 } },
1337 {
ISD::MUL, MVT::v4i32, { 6, 8, 7, 7 } },
1338 {
ISD::MUL, MVT::v2i64, { 7, 10,10,10 } },
1342 {
ISD::FDIV, MVT::f32, { 23, 23, 1, 1 } },
1343 {
ISD::FDIV, MVT::v4f32, { 39, 39, 1, 1 } },
1344 {
ISD::FDIV, MVT::f64, { 38, 38, 1, 1 } },
1345 {
ISD::FDIV, MVT::v2f64, { 69, 69, 1, 1 } },
1347 {
ISD::FNEG, MVT::f32, { 1, 1, 1, 1 } },
1348 {
ISD::FNEG, MVT::f64, { 1, 1, 1, 1 } },
1349 {
ISD::FNEG, MVT::v4f32, { 1, 1, 1, 1 } },
1350 {
ISD::FNEG, MVT::v2f64, { 1, 1, 1, 1 } },
1352 {
ISD::FADD, MVT::f32, { 2, 3, 1, 1 } },
1353 {
ISD::FADD, MVT::f64, { 2, 3, 1, 1 } },
1354 {
ISD::FADD, MVT::v2f64, { 2, 3, 1, 1 } },
1356 {
ISD::FSUB, MVT::f32, { 2, 3, 1, 1 } },
1357 {
ISD::FSUB, MVT::f64, { 2, 3, 1, 1 } },
1358 {
ISD::FSUB, MVT::v2f64, { 2, 3, 1, 1 } },
1360 {
ISD::FMUL, MVT::f64, { 2, 5, 1, 1 } },
1361 {
ISD::FMUL, MVT::v2f64, { 2, 5, 1, 1 } },
1365 if (
const auto *Entry =
CostTableLookup(SSE2CostTable, ISD, LT.second))
1366 if (
auto KindCost = Entry->Cost[
CostKind])
1367 return LT.first * *KindCost;
1370 {
ISD::FDIV, MVT::f32, { 17, 18, 1, 1 } },
1371 {
ISD::FDIV, MVT::v4f32, { 34, 48, 1, 1 } },
1373 {
ISD::FNEG, MVT::f32, { 2, 2, 1, 2 } },
1374 {
ISD::FNEG, MVT::v4f32, { 2, 2, 1, 2 } },
1376 {
ISD::FADD, MVT::f32, { 1, 3, 1, 1 } },
1377 {
ISD::FADD, MVT::v4f32, { 2, 3, 1, 1 } },
1379 {
ISD::FSUB, MVT::f32, { 1, 3, 1, 1 } },
1380 {
ISD::FSUB, MVT::v4f32, { 2, 3, 1, 1 } },
1382 {
ISD::FMUL, MVT::f32, { 2, 5, 1, 1 } },
1383 {
ISD::FMUL, MVT::v4f32, { 2, 5, 1, 1 } },
1387 if (
const auto *Entry =
CostTableLookup(SSE1CostTable, ISD, LT.second))
1388 if (
auto KindCost = Entry->Cost[
CostKind])
1389 return LT.first * *KindCost;
1394 {
ISD::MUL, MVT::i64, { 2, 6, 1, 2 } },
1399 if (
auto KindCost = Entry->Cost[
CostKind])
1400 return LT.first * *KindCost;
1411 {
ISD::MUL, MVT::i8, { 3, 4, 1, 1 } },
1412 {
ISD::MUL, MVT::i16, { 2, 4, 1, 1 } },
1413 {
ISD::MUL, MVT::i32, { 1, 4, 1, 1 } },
1415 {
ISD::FNEG, MVT::f64, { 2, 2, 1, 3 } },
1416 {
ISD::FADD, MVT::f64, { 2, 3, 1, 1 } },
1417 {
ISD::FSUB, MVT::f64, { 2, 3, 1, 1 } },
1418 {
ISD::FMUL, MVT::f64, { 2, 5, 1, 1 } },
1419 {
ISD::FDIV, MVT::f64, { 38, 38, 1, 1 } },
1423 if (
auto KindCost = Entry->Cost[
CostKind])
1424 return LT.first * *KindCost;
1438 return 20 * LT.first * LT.second.getVectorNumElements() * ScalarCost;
1485 if (LT.second.isVector() && LT.second.getScalarType() == MVT::bf16)
1486 LT.second = LT.second.changeVectorElementType(MVT::f16);
1491 int NumElts = LT.second.getVectorNumElements();
1492 if ((
Index % NumElts) == 0)
1495 if (SubLT.second.isVector()) {
1496 int NumSubElts = SubLT.second.getVectorNumElements();
1497 if ((
Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0)
1505 int OrigSubElts = cast<FixedVectorType>(SubTp)->getNumElements();
1506 if (NumSubElts > OrigSubElts && (
Index % OrigSubElts) == 0 &&
1507 (NumSubElts % OrigSubElts) == 0 &&
1508 LT.second.getVectorElementType() ==
1509 SubLT.second.getVectorElementType() &&
1510 LT.second.getVectorElementType().getSizeInBits() ==
1512 assert(NumElts >= NumSubElts && NumElts > OrigSubElts &&
1513 "Unexpected number of elements!");
1515 LT.second.getVectorNumElements());
1517 SubLT.second.getVectorNumElements());
1526 return ExtractCost + 1;
1529 "Unexpected vector size");
1531 return ExtractCost + 2;
1540 int NumElts = LT.second.getVectorNumElements();
1542 if (SubLT.second.isVector()) {
1543 int NumSubElts = SubLT.second.getVectorNumElements();
1544 if ((
Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0)
1557 static const CostTblEntry SSE2SubVectorShuffleTbl[] = {
1588 if (
const auto *Entry =
1597 MVT LegalVT = LT.second;
1602 cast<FixedVectorType>(BaseTp)->getNumElements()) {
1606 unsigned NumOfSrcs = (VecTySize + LegalVTSize - 1) / LegalVTSize;
1613 if (!Mask.empty() && NumOfDests.
isValid()) {
1632 unsigned NormalizedVF =
1638 unsigned PrevSrcReg = 0;
1642 NormalizedMask, NumOfSrcRegs, NumOfDestRegs, NumOfDestRegs, []() {},
1643 [
this, SingleOpTy,
CostKind, &PrevSrcReg, &PrevRegMask,
1648 if (PrevRegMask.
empty() || PrevSrcReg != SrcReg ||
1657 if (SrcReg != DestReg &&
1662 PrevSrcReg = SrcReg;
1676 std::nullopt,
CostKind, 0,
nullptr);
1687 LT.first = NumOfDests * NumOfShufflesPerDest;
1703 if (
const auto *Entry =
1705 return LT.first * Entry->Cost;
1738 if (
const auto *Entry =
1740 return LT.first * Entry->Cost;
1817 if (
const auto *Entry =
CostTableLookup(AVX512ShuffleTbl, Kind, LT.second))
1818 if (
auto KindCost = Entry->Cost[
CostKind])
1819 return LT.first * *KindCost;
1872 if (
const auto *Entry =
CostTableLookup(AVX2ShuffleTbl, Kind, LT.second))
1873 return LT.first * Entry->Cost;
1894 if (
const auto *Entry =
CostTableLookup(XOPShuffleTbl, Kind, LT.second))
1895 return LT.first * Entry->Cost;
1957 if (
const auto *Entry =
CostTableLookup(AVX1ShuffleTbl, Kind, LT.second))
1958 return LT.first * Entry->Cost;
1971 if (
const auto *Entry =
CostTableLookup(SSE41ShuffleTbl, Kind, LT.second))
1972 return LT.first * Entry->Cost;
2003 if (
const auto *Entry =
CostTableLookup(SSSE3ShuffleTbl, Kind, LT.second))
2004 return LT.first * Entry->Cost;
2060 llvm::any_of(Args, [](
const auto &V) {
return isa<LoadInst>(V); });
2062 if (
const auto *Entry =
2065 LT.second.getVectorElementCount()) &&
2066 "Table entry missing from isLegalBroadcastLoad()");
2067 return LT.first * Entry->Cost;
2070 if (
const auto *Entry =
CostTableLookup(SSE2ShuffleTbl, Kind, LT.second))
2071 return LT.first * Entry->Cost;
2084 if (
const auto *Entry =
CostTableLookup(SSE1ShuffleTbl, Kind, LT.second))
2085 return LT.first * Entry->Cost;
2096 assert(ISD &&
"Invalid opcode");
2101 return Cost == 0 ? 0 : 1;
2915 AVX512BWConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2916 return AdjustCost(Entry->Cost);
2920 AVX512DQConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2921 return AdjustCost(Entry->Cost);
2925 AVX512FConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2926 return AdjustCost(Entry->Cost);
2931 AVX512BWVLConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2932 return AdjustCost(Entry->Cost);
2936 AVX512DQVLConversionTbl, ISD, SimpleDstTy, SimpleSrcTy))
2937 return AdjustCost(Entry->Cost);
2941 SimpleDstTy, SimpleSrcTy))
2942 return AdjustCost(Entry->Cost);
2946 SimpleDstTy, SimpleSrcTy))
2947 return AdjustCost(Entry->Cost);
2952 SimpleDstTy, SimpleSrcTy))
2953 return AdjustCost(Entry->Cost);
2958 SimpleDstTy, SimpleSrcTy))
2959 return AdjustCost(Entry->Cost);
2964 SimpleDstTy, SimpleSrcTy))
2965 return AdjustCost(Entry->Cost);
2980 AVX512BWConversionTbl, ISD, LTDest.second, LTSrc.second))
2981 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2985 AVX512DQConversionTbl, ISD, LTDest.second, LTSrc.second))
2986 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2990 AVX512FConversionTbl, ISD, LTDest.second, LTSrc.second))
2991 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
2996 LTDest.second, LTSrc.second))
2997 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3001 LTDest.second, LTSrc.second))
3002 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3006 LTDest.second, LTSrc.second))
3007 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3011 LTDest.second, LTSrc.second))
3012 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3016 LTDest.second, LTSrc.second))
3017 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3021 LTDest.second, LTSrc.second))
3022 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3026 LTDest.second, LTSrc.second))
3027 return AdjustCost(std::max(LTSrc.first, LTDest.first) * Entry->Cost);
3032 1 < Src->getScalarSizeInBits() && Src->getScalarSizeInBits() < 32) {
3033 Type *ExtSrc = Src->getWithNewBitWidth(32);
3039 if (!(Src->isIntegerTy() &&
I && isa<LoadInst>(
I->getOperand(0))))
3049 1 < Dst->getScalarSizeInBits() && Dst->getScalarSizeInBits() < 32) {
3050 Type *TruncDst = Dst->getWithNewBitWidth(32);
3073 MVT MTy = LT.second;
3076 assert(ISD &&
"Invalid opcode");
3079 if (
Opcode == Instruction::ICmp ||
Opcode == Instruction::FCmp) {
3091 Pred = cast<CmpInst>(
I)->getPredicate();
3125 if (CondTy && !ST->
hasAVX())
3294 if (ST->useSLMArithCosts())
3296 if (
auto KindCost = Entry->Cost[
CostKind])
3297 return LT.first * (ExtraCost + *KindCost);
3301 if (
auto KindCost = Entry->Cost[
CostKind])
3302 return LT.first * (ExtraCost + *KindCost);
3306 if (
auto KindCost = Entry->Cost[
CostKind])
3307 return LT.first * (ExtraCost + *KindCost);
3311 if (
auto KindCost = Entry->Cost[
CostKind])
3312 return LT.first * (ExtraCost + *KindCost);
3316 if (
auto KindCost = Entry->Cost[
CostKind])
3317 return LT.first * (ExtraCost + *KindCost);
3321 if (
auto KindCost = Entry->Cost[
CostKind])
3322 return LT.first * (ExtraCost + *KindCost);
3326 if (
auto KindCost = Entry->Cost[
CostKind])
3327 return LT.first * (ExtraCost + *KindCost);
3331 if (
auto KindCost = Entry->Cost[
CostKind])
3332 return LT.first * (ExtraCost + *KindCost);
3336 if (
auto KindCost = Entry->Cost[
CostKind])
3337 return LT.first * (ExtraCost + *KindCost);
3341 if (
auto KindCost = Entry->Cost[
CostKind])
3342 return LT.first * (ExtraCost + *KindCost);
3367 {
ISD::FSHL, MVT::v8i64, { 1, 1, 1, 1 } },
3368 {
ISD::FSHL, MVT::v4i64, { 1, 1, 1, 1 } },
3369 {
ISD::FSHL, MVT::v2i64, { 1, 1, 1, 1 } },
3370 {
ISD::FSHL, MVT::v16i32, { 1, 1, 1, 1 } },
3371 {
ISD::FSHL, MVT::v8i32, { 1, 1, 1, 1 } },
3372 {
ISD::FSHL, MVT::v4i32, { 1, 1, 1, 1 } },
3373 {
ISD::FSHL, MVT::v32i16, { 1, 1, 1, 1 } },
3374 {
ISD::FSHL, MVT::v16i16, { 1, 1, 1, 1 } },
3375 {
ISD::FSHL, MVT::v8i16, { 1, 1, 1, 1 } },
3376 {
ISD::ROTL, MVT::v32i16, { 1, 1, 1, 1 } },
3377 {
ISD::ROTL, MVT::v16i16, { 1, 1, 1, 1 } },
3378 {
ISD::ROTL, MVT::v8i16, { 1, 1, 1, 1 } },
3379 {
ISD::ROTR, MVT::v32i16, { 1, 1, 1, 1 } },
3380 {
ISD::ROTR, MVT::v16i16, { 1, 1, 1, 1 } },
3381 {
ISD::ROTR, MVT::v8i16, { 1, 1, 1, 1 } },
3400 {
ISD::CTLZ, MVT::v8i64, { 1, 5, 1, 1 } },
3401 {
ISD::CTLZ, MVT::v16i32, { 1, 5, 1, 1 } },
3402 {
ISD::CTLZ, MVT::v32i16, { 18, 27, 23, 27 } },
3403 {
ISD::CTLZ, MVT::v64i8, { 3, 16, 9, 11 } },
3404 {
ISD::CTLZ, MVT::v4i64, { 1, 5, 1, 1 } },
3405 {
ISD::CTLZ, MVT::v8i32, { 1, 5, 1, 1 } },
3406 {
ISD::CTLZ, MVT::v16i16, { 8, 19, 11, 13 } },
3407 {
ISD::CTLZ, MVT::v32i8, { 2, 11, 9, 10 } },
3408 {
ISD::CTLZ, MVT::v2i64, { 1, 5, 1, 1 } },
3409 {
ISD::CTLZ, MVT::v4i32, { 1, 5, 1, 1 } },
3410 {
ISD::CTLZ, MVT::v8i16, { 3, 15, 4, 6 } },
3411 {
ISD::CTLZ, MVT::v16i8, { 2, 10, 9, 10 } },
3413 {
ISD::CTTZ, MVT::v8i64, { 2, 8, 6, 7 } },
3414 {
ISD::CTTZ, MVT::v16i32, { 2, 8, 6, 7 } },
3415 {
ISD::CTTZ, MVT::v4i64, { 1, 8, 6, 6 } },
3416 {
ISD::CTTZ, MVT::v8i32, { 1, 8, 6, 6 } },
3417 {
ISD::CTTZ, MVT::v2i64, { 1, 8, 6, 6 } },
3418 {
ISD::CTTZ, MVT::v4i32, { 1, 8, 6, 6 } },
3421 {
ISD::ABS, MVT::v32i16, { 1, 1, 1, 1 } },
3422 {
ISD::ABS, MVT::v64i8, { 1, 1, 1, 1 } },
3444 {
ISD::CTLZ, MVT::v8i64, { 8, 22, 23, 23 } },
3445 {
ISD::CTLZ, MVT::v16i32, { 8, 23, 25, 25 } },
3446 {
ISD::CTLZ, MVT::v32i16, { 4, 15, 15, 16 } },
3447 {
ISD::CTLZ, MVT::v64i8, { 3, 12, 10, 9 } },
3448 {
ISD::CTPOP, MVT::v2i64, { 3, 7, 10, 10 } },
3449 {
ISD::CTPOP, MVT::v4i64, { 3, 7, 10, 10 } },
3450 {
ISD::CTPOP, MVT::v8i64, { 3, 8, 10, 12 } },
3451 {
ISD::CTPOP, MVT::v4i32, { 7, 11, 14, 14 } },
3452 {
ISD::CTPOP, MVT::v8i32, { 7, 11, 14, 14 } },
3453 {
ISD::CTPOP, MVT::v16i32, { 7, 12, 14, 16 } },
3454 {
ISD::CTPOP, MVT::v8i16, { 2, 7, 11, 11 } },
3455 {
ISD::CTPOP, MVT::v16i16, { 2, 7, 11, 11 } },
3456 {
ISD::CTPOP, MVT::v32i16, { 3, 7, 11, 13 } },
3460 {
ISD::CTTZ, MVT::v8i16, { 3, 9, 14, 14 } },
3461 {
ISD::CTTZ, MVT::v16i16, { 3, 9, 14, 14 } },
3462 {
ISD::CTTZ, MVT::v32i16, { 3, 10, 14, 16 } },
3463 {
ISD::CTTZ, MVT::v16i8, { 2, 6, 11, 11 } },
3464 {
ISD::CTTZ, MVT::v32i8, { 2, 6, 11, 11 } },
3465 {
ISD::CTTZ, MVT::v64i8, { 3, 7, 11, 13 } },
3466 {
ISD::ROTL, MVT::v32i16, { 2, 8, 6, 8 } },
3467 {
ISD::ROTL, MVT::v16i16, { 2, 8, 6, 7 } },
3468 {
ISD::ROTL, MVT::v8i16, { 2, 7, 6, 7 } },
3469 {
ISD::ROTL, MVT::v64i8, { 5, 6, 11, 12 } },
3470 {
ISD::ROTL, MVT::v32i8, { 5, 15, 7, 10 } },
3471 {
ISD::ROTL, MVT::v16i8, { 5, 15, 7, 10 } },
3472 {
ISD::ROTR, MVT::v32i16, { 2, 8, 6, 8 } },
3473 {
ISD::ROTR, MVT::v16i16, { 2, 8, 6, 7 } },
3474 {
ISD::ROTR, MVT::v8i16, { 2, 7, 6, 7 } },
3475 {
ISD::ROTR, MVT::v64i8, { 5, 6, 12, 14 } },
3476 {
ISD::ROTR, MVT::v32i8, { 5, 14, 6, 9 } },
3477 {
ISD::ROTR, MVT::v16i8, { 5, 14, 6, 9 } },
3480 {
ISD::SMAX, MVT::v32i16, { 1, 1, 1, 1 } },
3481 {
ISD::SMAX, MVT::v64i8, { 1, 1, 1, 1 } },
3482 {
ISD::SMIN, MVT::v32i16, { 1, 1, 1, 1 } },
3483 {
ISD::SMIN, MVT::v64i8, { 1, 1, 1, 1 } },
3488 {
ISD::UMAX, MVT::v32i16, { 1, 1, 1, 1 } },
3489 {
ISD::UMAX, MVT::v64i8, { 1, 1, 1, 1 } },
3490 {
ISD::UMIN, MVT::v32i16, { 1, 1, 1, 1 } },
3491 {
ISD::UMIN, MVT::v64i8, { 1, 1, 1, 1 } },
3496 {
ISD::ABS, MVT::v8i64, { 1, 1, 1, 1 } },
3497 {
ISD::ABS, MVT::v4i64, { 1, 1, 1, 1 } },
3498 {
ISD::ABS, MVT::v2i64, { 1, 1, 1, 1 } },
3499 {
ISD::ABS, MVT::v16i32, { 1, 1, 1, 1 } },
3500 {
ISD::ABS, MVT::v8i32, { 1, 1, 1, 1 } },
3501 {
ISD::ABS, MVT::v32i16, { 2, 7, 4, 4 } },
3502 {
ISD::ABS, MVT::v16i16, { 1, 1, 1, 1 } },
3503 {
ISD::ABS, MVT::v64i8, { 2, 7, 4, 4 } },
3504 {
ISD::ABS, MVT::v32i8, { 1, 1, 1, 1 } },
3512 {
ISD::CTLZ, MVT::v8i64, { 10, 28, 32, 32 } },
3513 {
ISD::CTLZ, MVT::v16i32, { 12, 30, 38, 38 } },
3514 {
ISD::CTLZ, MVT::v32i16, { 8, 15, 29, 29 } },
3515 {
ISD::CTLZ, MVT::v64i8, { 6, 11, 19, 19 } },
3516 {
ISD::CTPOP, MVT::v8i64, { 16, 16, 19, 19 } },
3517 {
ISD::CTPOP, MVT::v16i32, { 24, 19, 27, 27 } },
3518 {
ISD::CTPOP, MVT::v32i16, { 18, 15, 22, 22 } },
3519 {
ISD::CTPOP, MVT::v64i8, { 12, 11, 16, 16 } },
3520 {
ISD::CTTZ, MVT::v8i64, { 2, 8, 6, 7 } },
3521 {
ISD::CTTZ, MVT::v16i32, { 2, 8, 6, 7 } },
3522 {
ISD::CTTZ, MVT::v32i16, { 7, 17, 27, 27 } },
3523 {
ISD::CTTZ, MVT::v64i8, { 6, 13, 21, 21 } },
3524 {
ISD::ROTL, MVT::v8i64, { 1, 1, 1, 1 } },
3525 {
ISD::ROTL, MVT::v4i64, { 1, 1, 1, 1 } },
3526 {
ISD::ROTL, MVT::v2i64, { 1, 1, 1, 1 } },
3527 {
ISD::ROTL, MVT::v16i32, { 1, 1, 1, 1 } },
3528 {
ISD::ROTL, MVT::v8i32, { 1, 1, 1, 1 } },
3529 {
ISD::ROTL, MVT::v4i32, { 1, 1, 1, 1 } },
3530 {
ISD::ROTR, MVT::v8i64, { 1, 1, 1, 1 } },
3531 {
ISD::ROTR, MVT::v4i64, { 1, 1, 1, 1 } },
3532 {
ISD::ROTR, MVT::v2i64, { 1, 1, 1, 1 } },
3533 {
ISD::ROTR, MVT::v16i32, { 1, 1, 1, 1 } },
3534 {
ISD::ROTR, MVT::v8i32, { 1, 1, 1, 1 } },
3535 {
ISD::ROTR, MVT::v4i32, { 1, 1, 1, 1 } },
3536 {
ISD::SMAX, MVT::v8i64, { 1, 3, 1, 1 } },
3537 {
ISD::SMAX, MVT::v16i32, { 1, 1, 1, 1 } },
3538 {
ISD::SMAX, MVT::v32i16, { 3, 7, 5, 5 } },
3539 {
ISD::SMAX, MVT::v64i8, { 3, 7, 5, 5 } },
3540 {
ISD::SMAX, MVT::v4i64, { 1, 3, 1, 1 } },
3541 {
ISD::SMAX, MVT::v2i64, { 1, 3, 1, 1 } },
3542 {
ISD::SMIN, MVT::v8i64, { 1, 3, 1, 1 } },
3543 {
ISD::SMIN, MVT::v16i32, { 1, 1, 1, 1 } },
3544 {
ISD::SMIN, MVT::v32i16, { 3, 7, 5, 5 } },
3545 {
ISD::SMIN, MVT::v64i8, { 3, 7, 5, 5 } },
3546 {
ISD::SMIN, MVT::v4i64, { 1, 3, 1, 1 } },
3547 {
ISD::SMIN, MVT::v2i64, { 1, 3, 1, 1 } },
3548 {
ISD::UMAX, MVT::v8i64, { 1, 3, 1, 1 } },
3549 {
ISD::UMAX, MVT::v16i32, { 1, 1, 1, 1 } },
3550 {
ISD::UMAX, MVT::v32i16, { 3, 7, 5, 5 } },
3551 {
ISD::UMAX, MVT::v64i8, { 3, 7, 5, 5 } },
3552 {
ISD::UMAX, MVT::v4i64, { 1, 3, 1, 1 } },
3553 {
ISD::UMAX, MVT::v2i64, { 1, 3, 1, 1 } },
3554 {
ISD::UMIN, MVT::v8i64, { 1, 3, 1, 1 } },
3555 {
ISD::UMIN, MVT::v16i32, { 1, 1, 1, 1 } },
3556 {
ISD::UMIN, MVT::v32i16, { 3, 7, 5, 5 } },
3557 {
ISD::UMIN, MVT::v64i8, { 3, 7, 5, 5 } },
3558 {
ISD::UMIN, MVT::v4i64, { 1, 3, 1, 1 } },
3559 {
ISD::UMIN, MVT::v2i64, { 1, 3, 1, 1 } },
3587 {
ISD::FSQRT, MVT::v16f32, { 12, 20, 1, 3 } },
3590 {
ISD::FSQRT, MVT::v4f64, { 12, 18, 1, 1 } },
3591 {
ISD::FSQRT, MVT::v8f64, { 24, 32, 1, 3 } },
3607 {
ISD::ROTL, MVT::v4i64, { 4, 7, 5, 6 } },
3608 {
ISD::ROTL, MVT::v8i32, { 4, 7, 5, 6 } },
3609 {
ISD::ROTL, MVT::v16i16, { 4, 7, 5, 6 } },
3610 {
ISD::ROTL, MVT::v32i8, { 4, 7, 5, 6 } },
3611 {
ISD::ROTL, MVT::v2i64, { 1, 3, 1, 1 } },
3612 {
ISD::ROTL, MVT::v4i32, { 1, 3, 1, 1 } },
3613 {
ISD::ROTL, MVT::v8i16, { 1, 3, 1, 1 } },
3614 {
ISD::ROTL, MVT::v16i8, { 1, 3, 1, 1 } },
3615 {
ISD::ROTR, MVT::v4i64, { 4, 7, 8, 9 } },
3616 {
ISD::ROTR, MVT::v8i32, { 4, 7, 8, 9 } },
3617 {
ISD::ROTR, MVT::v16i16, { 4, 7, 8, 9 } },
3618 {
ISD::ROTR, MVT::v32i8, { 4, 7, 8, 9 } },
3619 {
ISD::ROTR, MVT::v2i64, { 1, 3, 3, 3 } },
3620 {
ISD::ROTR, MVT::v4i32, { 1, 3, 3, 3 } },
3621 {
ISD::ROTR, MVT::v8i16, { 1, 3, 3, 3 } },
3622 {
ISD::ROTR, MVT::v16i8, { 1, 3, 3, 3 } }
3625 {
ISD::ABS, MVT::v2i64, { 2, 4, 3, 5 } },
3626 {
ISD::ABS, MVT::v4i64, { 2, 4, 3, 5 } },
3627 {
ISD::ABS, MVT::v4i32, { 1, 1, 1, 1 } },
3628 {
ISD::ABS, MVT::v8i32, { 1, 1, 1, 2 } },
3629 {
ISD::ABS, MVT::v8i16, { 1, 1, 1, 1 } },
3630 {
ISD::ABS, MVT::v16i16, { 1, 1, 1, 2 } },
3631 {
ISD::ABS, MVT::v16i8, { 1, 1, 1, 1 } },
3632 {
ISD::ABS, MVT::v32i8, { 1, 1, 1, 2 } },
3647 {
ISD::CTLZ, MVT::v2i64, { 7, 18, 24, 25 } },
3648 {
ISD::CTLZ, MVT::v4i64, { 14, 18, 24, 44 } },
3649 {
ISD::CTLZ, MVT::v4i32, { 5, 16, 19, 20 } },
3650 {
ISD::CTLZ, MVT::v8i32, { 10, 16, 19, 34 } },
3651 {
ISD::CTLZ, MVT::v8i16, { 4, 13, 14, 15 } },
3652 {
ISD::CTLZ, MVT::v16i16, { 6, 14, 14, 24 } },
3653 {
ISD::CTLZ, MVT::v16i8, { 3, 12, 9, 10 } },
3654 {
ISD::CTLZ, MVT::v32i8, { 4, 12, 9, 14 } },
3655 {
ISD::CTPOP, MVT::v2i64, { 3, 9, 10, 10 } },
3656 {
ISD::CTPOP, MVT::v4i64, { 4, 9, 10, 14 } },
3657 {
ISD::CTPOP, MVT::v4i32, { 7, 12, 14, 14 } },
3658 {
ISD::CTPOP, MVT::v8i32, { 7, 12, 14, 18 } },
3659 {
ISD::CTPOP, MVT::v8i16, { 3, 7, 11, 11 } },
3660 {
ISD::CTPOP, MVT::v16i16, { 6, 8, 11, 18 } },
3663 {
ISD::CTTZ, MVT::v2i64, { 4, 11, 13, 13 } },
3664 {
ISD::CTTZ, MVT::v4i64, { 5, 11, 13, 20 } },
3665 {
ISD::CTTZ, MVT::v4i32, { 7, 14, 17, 17 } },
3666 {
ISD::CTTZ, MVT::v8i32, { 7, 15, 17, 24 } },
3667 {
ISD::CTTZ, MVT::v8i16, { 4, 9, 14, 14 } },
3668 {
ISD::CTTZ, MVT::v16i16, { 6, 9, 14, 24 } },
3669 {
ISD::CTTZ, MVT::v16i8, { 3, 7, 11, 11 } },
3670 {
ISD::CTTZ, MVT::v32i8, { 5, 7, 11, 18 } },
3673 {
ISD::SMAX, MVT::v2i64, { 2, 7, 2, 3 } },
3674 {
ISD::SMAX, MVT::v4i64, { 2, 7, 2, 3 } },
3675 {
ISD::SMAX, MVT::v8i32, { 1, 1, 1, 2 } },
3676 {
ISD::SMAX, MVT::v16i16, { 1, 1, 1, 2 } },
3677 {
ISD::SMAX, MVT::v32i8, { 1, 1, 1, 2 } },
3678 {
ISD::SMIN, MVT::v2i64, { 2, 7, 2, 3 } },
3679 {
ISD::SMIN, MVT::v4i64, { 2, 7, 2, 3 } },
3680 {
ISD::SMIN, MVT::v8i32, { 1, 1, 1, 2 } },
3681 {
ISD::SMIN, MVT::v16i16, { 1, 1, 1, 2 } },
3682 {
ISD::SMIN, MVT::v32i8, { 1, 1, 1, 2 } },
3688 {
ISD::UMAX, MVT::v2i64, { 2, 8, 5, 6 } },
3689 {
ISD::UMAX, MVT::v4i64, { 2, 8, 5, 8 } },
3690 {
ISD::UMAX, MVT::v8i32, { 1, 1, 1, 2 } },
3691 {
ISD::UMAX, MVT::v16i16, { 1, 1, 1, 2 } },
3692 {
ISD::UMAX, MVT::v32i8, { 1, 1, 1, 2 } },
3693 {
ISD::UMIN, MVT::v2i64, { 2, 8, 5, 6 } },
3694 {
ISD::UMIN, MVT::v4i64, { 2, 8, 5, 8 } },
3695 {
ISD::UMIN, MVT::v8i32, { 1, 1, 1, 2 } },
3696 {
ISD::UMIN, MVT::v16i16, { 1, 1, 1, 2 } },
3697 {
ISD::UMIN, MVT::v32i8, { 1, 1, 1, 2 } },
3709 {
ISD::FSQRT, MVT::v8f32, { 14, 21, 1, 3 } },
3711 {
ISD::FSQRT, MVT::v2f64, { 14, 21, 1, 1 } },
3712 {
ISD::FSQRT, MVT::v4f64, { 28, 35, 1, 3 } },
3715 {
ISD::ABS, MVT::v4i64, { 6, 8, 6, 12 } },
3716 {
ISD::ABS, MVT::v8i32, { 3, 6, 4, 5 } },
3717 {
ISD::ABS, MVT::v16i16, { 3, 6, 4, 5 } },
3718 {
ISD::ABS, MVT::v32i8, { 3, 6, 4, 5 } },
3731 {
ISD::BSWAP, MVT::v16i16, { 5, 6, 5, 10 } },
3733 {
ISD::CTLZ, MVT::v4i64, { 29, 33, 49, 58 } },
3734 {
ISD::CTLZ, MVT::v2i64, { 14, 24, 24, 28 } },
3735 {
ISD::CTLZ, MVT::v8i32, { 24, 28, 39, 48 } },
3736 {
ISD::CTLZ, MVT::v4i32, { 12, 20, 19, 23 } },
3737 {
ISD::CTLZ, MVT::v16i16, { 19, 22, 29, 38 } },
3738 {
ISD::CTLZ, MVT::v8i16, { 9, 16, 14, 18 } },
3739 {
ISD::CTLZ, MVT::v32i8, { 14, 15, 19, 28 } },
3740 {
ISD::CTLZ, MVT::v16i8, { 7, 12, 9, 13 } },
3741 {
ISD::CTPOP, MVT::v4i64, { 14, 18, 19, 28 } },
3742 {
ISD::CTPOP, MVT::v2i64, { 7, 14, 10, 14 } },
3743 {
ISD::CTPOP, MVT::v8i32, { 18, 24, 27, 36 } },
3744 {
ISD::CTPOP, MVT::v4i32, { 9, 20, 14, 18 } },
3745 {
ISD::CTPOP, MVT::v16i16, { 16, 21, 22, 31 } },
3746 {
ISD::CTPOP, MVT::v8i16, { 8, 18, 11, 15 } },
3747 {
ISD::CTPOP, MVT::v32i8, { 13, 15, 16, 25 } },
3748 {
ISD::CTPOP, MVT::v16i8, { 6, 12, 8, 12 } },
3749 {
ISD::CTTZ, MVT::v4i64, { 17, 22, 24, 33 } },
3750 {
ISD::CTTZ, MVT::v2i64, { 9, 19, 13, 17 } },
3751 {
ISD::CTTZ, MVT::v8i32, { 21, 27, 32, 41 } },
3752 {
ISD::CTTZ, MVT::v4i32, { 11, 24, 17, 21 } },
3753 {
ISD::CTTZ, MVT::v16i16, { 18, 24, 27, 36 } },
3754 {
ISD::CTTZ, MVT::v8i16, { 9, 21, 14, 18 } },
3755 {
ISD::CTTZ, MVT::v32i8, { 15, 18, 21, 30 } },
3756 {
ISD::CTTZ, MVT::v16i8, { 8, 16, 11, 15 } },
3759 {
ISD::SMAX, MVT::v4i64, { 6, 9, 6, 12 } },
3760 {
ISD::SMAX, MVT::v2i64, { 3, 7, 2, 4 } },
3761 {
ISD::SMAX, MVT::v8i32, { 4, 6, 5, 6 } },
3762 {
ISD::SMAX, MVT::v16i16, { 4, 6, 5, 6 } },
3763 {
ISD::SMAX, MVT::v32i8, { 4, 6, 5, 6 } },
3764 {
ISD::SMIN, MVT::v4i64, { 6, 9, 6, 12 } },
3765 {
ISD::SMIN, MVT::v2i64, { 3, 7, 2, 3 } },
3766 {
ISD::SMIN, MVT::v8i32, { 4, 6, 5, 6 } },
3767 {
ISD::SMIN, MVT::v16i16, { 4, 6, 5, 6 } },
3768 {
ISD::SMIN, MVT::v32i8, { 4, 6, 5, 6 } },
3774 {
ISD::UMAX, MVT::v4i64, { 9, 10, 11, 17 } },
3775 {
ISD::UMAX, MVT::v2i64, { 4, 8, 5, 7 } },
3776 {
ISD::UMAX, MVT::v8i32, { 4, 6, 5, 6 } },
3777 {
ISD::UMAX, MVT::v16i16, { 4, 6, 5, 6 } },
3778 {
ISD::UMAX, MVT::v32i8, { 4, 6, 5, 6 } },
3779 {
ISD::UMIN, MVT::v4i64, { 9, 10, 11, 17 } },
3780 {
ISD::UMIN, MVT::v2i64, { 4, 8, 5, 7 } },
3781 {
ISD::UMIN, MVT::v8i32, { 4, 6, 5, 6 } },
3782 {
ISD::UMIN, MVT::v16i16, { 4, 6, 5, 6 } },
3783 {
ISD::UMIN, MVT::v32i8, { 4, 6, 5, 6 } },
3794 {
ISD::FSQRT, MVT::v4f32, { 21, 21, 1, 1 } },
3795 {
ISD::FSQRT, MVT::v8f32, { 42, 42, 1, 3 } },
3797 {
ISD::FSQRT, MVT::v2f64, { 27, 27, 1, 1 } },
3798 {
ISD::FSQRT, MVT::v4f64, { 54, 54, 1, 3 } },
3802 {
ISD::FSQRT, MVT::v4f32, { 37, 41, 1, 5 } },
3804 {
ISD::FSQRT, MVT::v2f64, { 67, 71, 1, 5 } },
3808 {
ISD::FSQRT, MVT::v4f32, { 40, 41, 1, 5 } },
3810 {
ISD::FSQRT, MVT::v2f64, { 70, 71, 1, 5 } },
3820 {
ISD::FSQRT, MVT::v4f32, { 18, 18, 1, 1 } },
3823 {
ISD::ABS, MVT::v2i64, { 3, 4, 3, 5 } },
3824 {
ISD::SMAX, MVT::v2i64, { 3, 7, 2, 3 } },
3825 {
ISD::SMAX, MVT::v4i32, { 1, 1, 1, 1 } },
3826 {
ISD::SMAX, MVT::v16i8, { 1, 1, 1, 1 } },
3827 {
ISD::SMIN, MVT::v2i64, { 3, 7, 2, 3 } },
3828 {
ISD::SMIN, MVT::v4i32, { 1, 1, 1, 1 } },
3829 {
ISD::SMIN, MVT::v16i8, { 1, 1, 1, 1 } },
3830 {
ISD::UMAX, MVT::v2i64, { 2, 11, 6, 7 } },
3831 {
ISD::UMAX, MVT::v4i32, { 1, 1, 1, 1 } },
3832 {
ISD::UMAX, MVT::v8i16, { 1, 1, 1, 1 } },
3833 {
ISD::UMIN, MVT::v2i64, { 2, 11, 6, 7 } },
3834 {
ISD::UMIN, MVT::v4i32, { 1, 1, 1, 1 } },
3835 {
ISD::UMIN, MVT::v8i16, { 1, 1, 1, 1 } },
3838 {
ISD::ABS, MVT::v4i32, { 1, 2, 1, 1 } },
3839 {
ISD::ABS, MVT::v8i16, { 1, 2, 1, 1 } },
3840 {
ISD::ABS, MVT::v16i8, { 1, 2, 1, 1 } },
3848 {
ISD::CTLZ, MVT::v2i64, { 18, 28, 28, 35 } },
3849 {
ISD::CTLZ, MVT::v4i32, { 15, 20, 22, 28 } },
3850 {
ISD::CTLZ, MVT::v8i16, { 13, 17, 16, 22 } },
3851 {
ISD::CTLZ, MVT::v16i8, { 11, 15, 10, 16 } },
3852 {
ISD::CTPOP, MVT::v2i64, { 13, 19, 12, 18 } },
3853 {
ISD::CTPOP, MVT::v4i32, { 18, 24, 16, 22 } },
3854 {
ISD::CTPOP, MVT::v8i16, { 13, 18, 14, 20 } },
3855 {
ISD::CTPOP, MVT::v16i8, { 11, 12, 10, 16 } },
3856 {
ISD::CTTZ, MVT::v2i64, { 13, 25, 15, 22 } },
3857 {
ISD::CTTZ, MVT::v4i32, { 18, 26, 19, 25 } },
3858 {
ISD::CTTZ, MVT::v8i16, { 13, 20, 17, 23 } },
3859 {
ISD::CTTZ, MVT::v16i8, { 11, 16, 13, 19 } }
3862 {
ISD::ABS, MVT::v2i64, { 3, 6, 5, 5 } },
3863 {
ISD::ABS, MVT::v4i32, { 1, 4, 4, 4 } },
3864 {
ISD::ABS, MVT::v8i16, { 1, 2, 3, 3 } },
3865 {
ISD::ABS, MVT::v16i8, { 1, 2, 3, 3 } },
3870 {
ISD::BSWAP, MVT::v2i64, { 5, 6, 11, 11 } },
3873 {
ISD::CTLZ, MVT::v2i64, { 10, 45, 36, 38 } },
3874 {
ISD::CTLZ, MVT::v4i32, { 10, 45, 38, 40 } },
3875 {
ISD::CTLZ, MVT::v8i16, { 9, 38, 32, 34 } },
3876 {
ISD::CTLZ, MVT::v16i8, { 8, 39, 29, 32 } },
3877 {
ISD::CTPOP, MVT::v2i64, { 12, 26, 16, 18 } },
3878 {
ISD::CTPOP, MVT::v4i32, { 15, 29, 21, 23 } },
3879 {
ISD::CTPOP, MVT::v8i16, { 13, 25, 18, 20 } },
3880 {
ISD::CTPOP, MVT::v16i8, { 10, 21, 14, 16 } },
3881 {
ISD::CTTZ, MVT::v2i64, { 14, 28, 19, 21 } },
3882 {
ISD::CTTZ, MVT::v4i32, { 18, 31, 24, 26 } },
3883 {
ISD::CTTZ, MVT::v8i16, { 16, 27, 21, 23 } },
3884 {
ISD::CTTZ, MVT::v16i8, { 13, 23, 17, 19 } },
3887 {
ISD::SMAX, MVT::v2i64, { 4, 8, 15, 15 } },
3888 {
ISD::SMAX, MVT::v4i32, { 2, 4, 5, 5 } },
3889 {
ISD::SMAX, MVT::v8i16, { 1, 1, 1, 1 } },
3890 {
ISD::SMAX, MVT::v16i8, { 2, 4, 5, 5 } },
3891 {
ISD::SMIN, MVT::v2i64, { 4, 8, 15, 15 } },
3892 {
ISD::SMIN, MVT::v4i32, { 2, 4, 5, 5 } },
3893 {
ISD::SMIN, MVT::v8i16, { 1, 1, 1, 1 } },
3894 {
ISD::SMIN, MVT::v16i8, { 2, 4, 5, 5 } },
3899 {
ISD::UMAX, MVT::v2i64, { 4, 8, 15, 15 } },
3900 {
ISD::UMAX, MVT::v4i32, { 2, 5, 8, 8 } },
3901 {
ISD::UMAX, MVT::v8i16, { 1, 3, 3, 3 } },
3902 {
ISD::UMAX, MVT::v16i8, { 1, 1, 1, 1 } },
3903 {
ISD::UMIN, MVT::v2i64, { 4, 8, 15, 15 } },
3904 {
ISD::UMIN, MVT::v4i32, { 2, 5, 8, 8 } },
3905 {
ISD::UMIN, MVT::v8i16, { 1, 3, 3, 3 } },
3906 {
ISD::UMIN, MVT::v16i8, { 1, 1, 1, 1 } },
3912 {
ISD::FSQRT, MVT::v2f64, { 32, 32, 1, 1 } },
3918 {
ISD::FSQRT, MVT::v4f32, { 56, 56, 1, 2 } },
3945 {
ISD::ABS, MVT::i64, { 1, 2, 3, 4 } },
3953 {
ISD::ROTL, MVT::i64, { 2, 3, 1, 3 } },
3954 {
ISD::ROTR, MVT::i64, { 2, 3, 1, 3 } },
3956 {
ISD::FSHL, MVT::i64, { 4, 4, 1, 4 } },
3957 {
ISD::SMAX, MVT::i64, { 1, 3, 2, 3 } },
3958 {
ISD::SMIN, MVT::i64, { 1, 3, 2, 3 } },
3959 {
ISD::UMAX, MVT::i64, { 1, 3, 2, 3 } },
3960 {
ISD::UMIN, MVT::i64, { 1, 3, 2, 3 } },
3966 {
ISD::ABS, MVT::i32, { 1, 2, 3, 4 } },
3967 {
ISD::ABS, MVT::i16, { 2, 2, 3, 4 } },
3968 {
ISD::ABS, MVT::i8, { 2, 4, 4, 4 } },
3989 {
ISD::ROTL, MVT::i32, { 2, 3, 1, 3 } },
3990 {
ISD::ROTL, MVT::i16, { 2, 3, 1, 3 } },
3992 {
ISD::ROTR, MVT::i32, { 2, 3, 1, 3 } },
3993 {
ISD::ROTR, MVT::i16, { 2, 3, 1, 3 } },
3998 {
ISD::FSHL, MVT::i32, { 4, 4, 1, 4 } },
3999 {
ISD::FSHL, MVT::i16, { 4, 4, 2, 5 } },
4001 {
ISD::SMAX, MVT::i32, { 1, 2, 2, 3 } },
4002 {
ISD::SMAX, MVT::i16, { 1, 4, 2, 4 } },
4004 {
ISD::SMIN, MVT::i32, { 1, 2, 2, 3 } },
4005 {
ISD::SMIN, MVT::i16, { 1, 4, 2, 4 } },
4007 {
ISD::UMAX, MVT::i32, { 1, 2, 2, 3 } },
4008 {
ISD::UMAX, MVT::i16, { 1, 4, 2, 4 } },
4010 {
ISD::UMIN, MVT::i32, { 1, 2, 2, 3 } },
4011 {
ISD::UMIN, MVT::i16, { 1, 4, 2, 4 } },
4031 case Intrinsic::abs:
4034 case Intrinsic::bitreverse:
4037 case Intrinsic::bswap:
4040 case Intrinsic::ctlz:
4043 case Intrinsic::ctpop:
4046 case Intrinsic::cttz:
4049 case Intrinsic::fshl:
4053 if (Args[0] == Args[1]) {
4057 if (isa_and_nonnull<ConstantInt>(Args[2]))
4062 case Intrinsic::fshr:
4067 if (Args[0] == Args[1]) {
4071 if (isa_and_nonnull<ConstantInt>(Args[2]))
4076 case Intrinsic::maxnum:
4077 case Intrinsic::minnum:
4081 case Intrinsic::sadd_sat:
4084 case Intrinsic::smax:
4087 case Intrinsic::smin:
4090 case Intrinsic::ssub_sat:
4093 case Intrinsic::uadd_sat:
4096 case Intrinsic::umax:
4099 case Intrinsic::umin:
4102 case Intrinsic::usub_sat:
4105 case Intrinsic::sqrt:
4108 case Intrinsic::sadd_with_overflow:
4109 case Intrinsic::ssub_with_overflow:
4112 OpTy =
RetTy->getContainedType(0);
4114 case Intrinsic::uadd_with_overflow:
4115 case Intrinsic::usub_with_overflow:
4118 OpTy =
RetTy->getContainedType(0);
4120 case Intrinsic::umul_with_overflow:
4121 case Intrinsic::smul_with_overflow:
4124 OpTy =
RetTy->getContainedType(0);