LLVM  13.0.0git
AArch64SelectionDAGInfo.cpp
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1 //===-- AArch64SelectionDAGInfo.cpp - AArch64 SelectionDAG Info -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the AArch64SelectionDAGInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "AArch64TargetMachine.h"
14 using namespace llvm;
15 
16 #define DEBUG_TYPE "aarch64-selectiondag-info"
17 
19  SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
20  SDValue Size, Align Alignment, bool isVolatile,
21  MachinePointerInfo DstPtrInfo) const {
22  // Check to see if there is a specialized entry-point for memory zeroing.
23  ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
24  ConstantSDNode *SizeValue = dyn_cast<ConstantSDNode>(Size);
25  const AArch64Subtarget &STI =
27  const char *bzeroName = (V && V->isNullValue())
28  ? DAG.getTargetLoweringInfo().getLibcallName(RTLIB::BZERO) : nullptr;
29  // For small size (< 256), it is not beneficial to use bzero
30  // instead of memset.
31  if (bzeroName && (!SizeValue || SizeValue->getZExtValue() > 256)) {
32  const AArch64TargetLowering &TLI = *STI.getTargetLowering();
33 
34  EVT IntPtr = TLI.getPointerTy(DAG.getDataLayout());
35  Type *IntPtrTy = Type::getInt8PtrTy(*DAG.getContext());
38  Entry.Node = Dst;
39  Entry.Ty = IntPtrTy;
40  Args.push_back(Entry);
41  Entry.Node = Size;
42  Args.push_back(Entry);
44  CLI.setDebugLoc(dl)
45  .setChain(Chain)
47  DAG.getExternalSymbol(bzeroName, IntPtr),
48  std::move(Args))
50  std::pair<SDValue, SDValue> CallResult = TLI.LowerCallTo(CLI);
51  return CallResult.second;
52  }
53  return SDValue();
54 }
55 
56 static const int kSetTagLoopThreshold = 176;
57 
59  SDValue Chain, SDValue Ptr, uint64_t ObjSize,
60  const MachineMemOperand *BaseMemOperand,
61  bool ZeroData) {
63  unsigned ObjSizeScaled = ObjSize / 16;
64 
65  SDValue TagSrc = Ptr;
66  if (Ptr.getOpcode() == ISD::FrameIndex) {
67  int FI = cast<FrameIndexSDNode>(Ptr)->getIndex();
68  Ptr = DAG.getTargetFrameIndex(FI, MVT::i64);
69  // A frame index operand may end up as [SP + offset] => it is fine to use SP
70  // register as the tag source.
71  TagSrc = DAG.getRegister(AArch64::SP, MVT::i64);
72  }
73 
74  const unsigned OpCode1 = ZeroData ? AArch64ISD::STZG : AArch64ISD::STG;
75  const unsigned OpCode2 = ZeroData ? AArch64ISD::STZ2G : AArch64ISD::ST2G;
76 
77  SmallVector<SDValue, 8> OutChains;
78  unsigned OffsetScaled = 0;
79  while (OffsetScaled < ObjSizeScaled) {
80  if (ObjSizeScaled - OffsetScaled >= 2) {
81  SDValue AddrNode =
82  DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(OffsetScaled * 16), dl);
84  OpCode2, dl, DAG.getVTList(MVT::Other),
85  {Chain, TagSrc, AddrNode},
86  MVT::v4i64,
87  MF.getMachineMemOperand(BaseMemOperand, OffsetScaled * 16, 16 * 2));
88  OffsetScaled += 2;
89  OutChains.push_back(St);
90  continue;
91  }
92 
93  if (ObjSizeScaled - OffsetScaled > 0) {
94  SDValue AddrNode =
95  DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(OffsetScaled * 16), dl);
97  OpCode1, dl, DAG.getVTList(MVT::Other),
98  {Chain, TagSrc, AddrNode},
99  MVT::v2i64,
100  MF.getMachineMemOperand(BaseMemOperand, OffsetScaled * 16, 16));
101  OffsetScaled += 1;
102  OutChains.push_back(St);
103  }
104  }
105 
106  SDValue Res = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
107  return Res;
108 }
109 
111  SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Addr,
112  SDValue Size, MachinePointerInfo DstPtrInfo, bool ZeroData) const {
113  uint64_t ObjSize = cast<ConstantSDNode>(Size)->getZExtValue();
114  assert(ObjSize % 16 == 0);
115 
117  MachineMemOperand *BaseMemOperand = MF.getMachineMemOperand(
118  DstPtrInfo, MachineMemOperand::MOStore, ObjSize, Align(16));
119 
120  bool UseSetTagRangeLoop =
121  kSetTagLoopThreshold >= 0 && (int)ObjSize >= kSetTagLoopThreshold;
122  if (!UseSetTagRangeLoop)
123  return EmitUnrolledSetTag(DAG, dl, Chain, Addr, ObjSize, BaseMemOperand,
124  ZeroData);
125 
126  const EVT ResTys[] = {MVT::i64, MVT::i64, MVT::Other};
127 
128  unsigned Opcode;
129  if (Addr.getOpcode() == ISD::FrameIndex) {
130  int FI = cast<FrameIndexSDNode>(Addr)->getIndex();
131  Addr = DAG.getTargetFrameIndex(FI, MVT::i64);
132  Opcode = ZeroData ? AArch64::STZGloop : AArch64::STGloop;
133  } else {
134  Opcode = ZeroData ? AArch64::STZGloop_wback : AArch64::STGloop_wback;
135  }
136  SDValue Ops[] = {DAG.getTargetConstant(ObjSize, dl, MVT::i64), Addr, Chain};
137  SDNode *St = DAG.getMachineNode(Opcode, dl, ResTys, Ops);
138 
139  DAG.setNodeMemRefs(cast<MachineSDNode>(St), {BaseMemOperand});
140  return SDValue(St, 2);
141 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::ConstantSDNode
Definition: SelectionDAGNodes.h:1536
llvm
Definition: AllocatorList.h:23
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1078
llvm::Type::getInt8PtrTy
static PointerType * getInt8PtrTy(LLVMContext &C, unsigned AS=0)
Definition: Type.cpp:256
llvm::TargetLowering::CallLoweringInfo::setChain
CallLoweringInfo & setChain(SDValue InChain)
Definition: TargetLowering.h:3736
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::SelectionDAG::getVTList
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
Definition: SelectionDAG.cpp:7967
llvm::MachineFunction::getMachineMemOperand
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Definition: MachineFunction.cpp:430
llvm::AArch64ISD::STG
@ STG
Definition: AArch64ISelLowering.h:432
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:455
llvm::TargetLoweringBase::getLibcallName
const char * getLibcallName(RTLIB::Libcall Call) const
Get the libcall routine name for the specified libcall.
Definition: TargetLowering.h:2811
llvm::SelectionDAG::getMemBasePlusOffset
SDValue getMemBasePlusOffset(SDValue Base, TypeSize Offset, const SDLoc &DL, const SDNodeFlags Flags=SDNodeFlags())
Returns sum of the base pointer and offset.
Definition: SelectionDAG.cpp:6153
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:46
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:127
llvm::TargetLowering::LowerCallTo
std::pair< SDValue, SDValue > LowerCallTo(CallLoweringInfo &CLI) const
This function lowers an abstract call to a function into an actual call.
Definition: SelectionDAGBuilder.cpp:9281
llvm::SelectionDAG::getContext
LLVMContext * getContext() const
Definition: SelectionDAG.h:447
llvm::AArch64Subtarget::getTargetLowering
const AArch64TargetLowering * getTargetLowering() const override
Definition: AArch64Subtarget.h:302
llvm::SelectionDAG::getRegister
SDValue getRegister(unsigned Reg, EVT VT)
Definition: SelectionDAG.cpp:1952
EmitUnrolledSetTag
static SDValue EmitUnrolledSetTag(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Ptr, uint64_t ObjSize, const MachineMemOperand *BaseMemOperand, bool ZeroData)
Definition: AArch64SelectionDAGInfo.cpp:58
llvm::SelectionDAG::getTargetFrameIndex
SDValue getTargetFrameIndex(int FI, EVT VT)
Definition: SelectionDAG.h:688
AArch64TargetMachine.h
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:216
llvm::SelectionDAG::getTargetLoweringInfo
const TargetLowering & getTargetLoweringInfo() const
Definition: SelectionDAG.h:443
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:35
int
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
Definition: README.txt:536
llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo) const override
Emit target-specific code that performs a memset.
Definition: AArch64SelectionDAGInfo.cpp:18
llvm::TargetLowering::CallLoweringInfo::setDebugLoc
CallLoweringInfo & setDebugLoc(const SDLoc &dl)
Definition: TargetLowering.h:3731
llvm::TypeSize::Fixed
static TypeSize Fixed(ScalarTy MinVal)
Definition: TypeSize.h:423
llvm::AArch64ISD::STZ2G
@ STZ2G
Definition: AArch64ISelLowering.h:435
llvm::SelectionDAG::getMemIntrinsicNode
SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags Flags=MachineMemOperand::MOLoad|MachineMemOperand::MOStore, uint64_t Size=0, const AAMDNodes &AAInfo=AAMDNodes())
Creates a MemIntrinsicNode that may produce a result and takes a list of operands.
Definition: SelectionDAG.cpp:7023
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::AArch64SelectionDAGInfo::EmitTargetCodeForSetTag
SDValue EmitTargetCodeForSetTag(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, MachinePointerInfo DstPtrInfo, bool ZeroData) const override
Definition: AArch64SelectionDAGInfo.cpp:110
llvm::MVT::v4i64
@ v4i64
Definition: MachineValueType.h:110
llvm::TargetLowering::CallLoweringInfo::setLibCallee
CallLoweringInfo & setLibCallee(CallingConv::ID CC, Type *ResultType, SDValue Target, ArgListTy &&ArgsList)
Definition: TargetLowering.h:3742
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:555
llvm::MVT::v2i64
@ v2i64
Definition: MachineValueType.h:109
Addr
uint64_t Addr
Definition: ELFObjHandler.cpp:80
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:37
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::SelectionDAG::getNode
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition: SelectionDAG.cpp:7732
llvm::TargetLowering::CallLoweringInfo
This structure contains all information that is necessary for lowering calls.
Definition: TargetLowering.h:3692
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MVT::Other
@ Other
Definition: MachineValueType.h:39
llvm::TargetLoweringBase::ArgListEntry
Definition: TargetLowering.h:270
llvm::ConstantSDNode::getZExtValue
uint64_t getZExtValue() const
Definition: SelectionDAGNodes.h:1551
llvm::SelectionDAG::getMachineNode
MachineSDNode * getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT)
These are used for target selectors to create a new node with specified return type(s),...
Definition: SelectionDAG.cpp:8405
llvm::SelectionDAG::setNodeMemRefs
void setNodeMemRefs(MachineSDNode *N, ArrayRef< MachineMemOperand * > NewMemRefs)
Mutate the specified machine node's memory references to the provided list.
Definition: SelectionDAG.cpp:8173
llvm::MachineFunction
Definition: MachineFunction.h:227
llvm::MVT::i64
@ i64
Definition: MachineValueType.h:44
llvm::TargetLoweringBase::ArgListTy
std::vector< ArgListEntry > ArgListTy
Definition: TargetLowering.h:300
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:73
kSetTagLoopThreshold
static const int kSetTagLoopThreshold
Definition: AArch64SelectionDAGInfo.cpp:56
llvm::CallingConv::C
@ C
C - The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
llvm::AArch64ISD::STZG
@ STZG
Definition: AArch64ISelLowering.h:433
llvm::TargetLowering::CallLoweringInfo::setDiscardResult
CallLoweringInfo & setDiscardResult(bool Value=true)
Definition: TargetLowering.h:3811
llvm::SelectionDAG::getDataLayout
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:440
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:138
llvm::MachineMemOperand::MOStore
@ MOStore
The memory access writes data.
Definition: MachineMemOperand.h:136
llvm::AArch64ISD::ST2G
@ ST2G
Definition: AArch64ISelLowering.h:434
llvm::Type::getVoidTy
static Type * getVoidTy(LLVMContext &C)
Definition: Type.cpp:187
llvm::ConstantSDNode::isNullValue
bool isNullValue() const
Definition: SelectionDAGNodes.h:1560
llvm::SDValue::getOpcode
unsigned getOpcode() const
Definition: SelectionDAGNodes.h:1109
llvm::SelectionDAG::getTargetConstant
SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
Definition: SelectionDAG.h:637
llvm::SelectionDAG::getMachineFunction
MachineFunction & getMachineFunction() const
Definition: SelectionDAG.h:437
llvm::SelectionDAG::getExternalSymbol
SDValue getExternalSymbol(const char *Sym, EVT VT)
Definition: SelectionDAG.cpp:1710
llvm::AMDGPU::HSAMD::Kernel::Key::Args
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Definition: AMDGPUMetadata.h:389
llvm::AArch64Subtarget
Definition: AArch64Subtarget.h:38
llvm::AArch64TargetLowering
Definition: AArch64ISelLowering.h:479
llvm::AArch64TargetLowering::getPointerTy
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const override
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
Definition: AArch64ISelLowering.h:497
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition: ISDOpcodes.h:52