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AMDGPUTargetMachine.h
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1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// The AMDGPU TargetMachine interface definition for hw codegen targets.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
16 
17 #include "GCNSubtarget.h"
20 #include <utility>
21 
22 namespace llvm {
23 
24 //===----------------------------------------------------------------------===//
25 // AMDGPU Target Machine (R600+)
26 //===----------------------------------------------------------------------===//
27 
29 protected:
30  std::unique_ptr<TargetLoweringObjectFile> TLOF;
31 
32  StringRef getGPUName(const Function &F) const;
33  StringRef getFeatureString(const Function &F) const;
34 
35 public:
37  static bool EnableFunctionCalls;
38  static bool EnableLowerModuleLDS;
39 
40  AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
44  ~AMDGPUTargetMachine() override;
45 
47  const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
48 
50  return TLOF.get();
51  }
52 
54  void registerDefaultAliasAnalyses(AAManager &) override;
55 
56  /// Get the integer value of a null pointer in the given address space.
57  static int64_t getNullPointerValue(unsigned AddrSpace);
58 
59  bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
60 
61  unsigned getAssumedAddrSpace(const Value *V) const override;
62 
63  std::pair<const Value *, unsigned>
64  getPredicatedAddrSpace(const Value *V) const override;
65 
66  unsigned getAddressSpaceForPseudoSourceKind(unsigned Kind) const override;
67 };
68 
69 //===----------------------------------------------------------------------===//
70 // GCN Target Machine (SI+)
71 //===----------------------------------------------------------------------===//
72 
73 class GCNTargetMachine final : public AMDGPUTargetMachine {
74 private:
75  mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
76 
77 public:
78  GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
81  CodeGenOpt::Level OL, bool JIT);
82 
84 
85  const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override;
86 
88 
89  bool useIPRA() const override {
90  return true;
91  }
92 
95  convertFuncInfoToYAML(const MachineFunction &MF) const override;
99  SMRange &SourceRange) const override;
100 };
101 
102 //===----------------------------------------------------------------------===//
103 // AMDGPU Pass Setup
104 //===----------------------------------------------------------------------===//
105 
107 public:
109 
111  return getTM<AMDGPUTargetMachine>();
112  }
113 
116 
117  void addEarlyCSEOrGVNPass();
119  void addIRPasses() override;
120  void addCodeGenPrepare() override;
121  bool addPreISel() override;
122  bool addInstSelector() override;
123  bool addGCPasses() override;
124 
125  std::unique_ptr<CSEConfigBase> getCSEConfig() const override;
126 
127  /// Check if a pass is enabled given \p Opt option. The option always
128  /// overrides defaults if explicitly used. Otherwise its default will
129  /// be used given that a pass shall work at an optimization \p Level
130  /// minimum.
131  bool isPassEnabled(const cl::opt<bool> &Opt,
132  CodeGenOpt::Level Level = CodeGenOpt::Default) const {
133  if (Opt.getNumOccurrences())
134  return Opt;
135  if (TM->getOptLevel() < Level)
136  return false;
137  return Opt;
138  }
139 };
140 
141 } // end namespace llvm
142 
143 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
llvm::TargetMachine::getOptLevel
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
Definition: TargetMachine.cpp:182
llvm::AAManager
A manager for alias analyses.
Definition: AliasAnalysis.h:876
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::AMDGPUTargetMachine::registerDefaultAliasAnalyses
void registerDefaultAliasAnalyses(AAManager &) override
Allow the target to register alias analyses with the AAManager for use with the new pass manager.
Definition: AMDGPUTargetMachine.cpp:578
llvm::GCNTargetMachine::convertFuncInfoToYAML
yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const override
Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
Definition: AMDGPUTargetMachine.cpp:1406
llvm::TargetOptions
Definition: TargetOptions.h:124
llvm::Function
Definition: Function.h:60
llvm::yaml::MachineFunctionInfo
Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.
Definition: MIRYamlMapping.h:676
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:149
llvm::TargetTransformInfo
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Definition: TargetTransformInfo.h:173
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::AMDGPUTargetMachine::TLOF
std::unique_ptr< TargetLoweringObjectFile > TLOF
Definition: AMDGPUTargetMachine.h:30
llvm::X86AS::FS
@ FS
Definition: X86.h:200
llvm::AMDGPUPassConfig
Definition: AMDGPUTargetMachine.h:106
llvm::TargetMachine::RM
Reloc::Model RM
Definition: TargetMachine.h:99
llvm::Optional< Reloc::Model >
T
#define T
Definition: Mips16ISelLowering.cpp:341
llvm::GCNTargetMachine::parseMachineFunctionInfo
bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
Parse out the target's MachineFunctionInfo from the YAML reprsentation.
Definition: AMDGPUTargetMachine.cpp:1412
llvm::AMDGPUPassConfig::addGCPasses
bool addGCPasses() override
addGCPasses - Add late codegen passes that analyze code for garbage collection.
Definition: AMDGPUTargetMachine.cpp:1070
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::TargetLoweringObjectFile
Definition: TargetLoweringObjectFile.h:45
llvm::AMDGPUPassConfig::addIRPasses
void addIRPasses() override
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
Definition: AMDGPUTargetMachine.cpp:944
llvm::GCNTargetMachine::GCNTargetMachine
GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, TargetOptions Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
Definition: AMDGPUTargetMachine.cpp:801
llvm::TargetPassConfig::TM
LLVMTargetMachine * TM
Definition: TargetPassConfig.h:122
llvm::AMDGPUTargetMachine
Definition: AMDGPUTargetMachine.h:28
TargetMachine.h
GCNSubtarget.h
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::PassBuilder
This class provides access to building LLVM's passes.
Definition: PassBuilder.h:97
llvm::SMDiagnostic
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:281
llvm::AMDGPUTargetMachine::getNullPointerValue
static int64_t getNullPointerValue(unsigned AddrSpace)
Get the integer value of a null pointer in the given address space.
Definition: AMDGPUTargetMachine.cpp:720
llvm::cl::Option::getNumOccurrences
int getNumOccurrences() const
Definition: CommandLine.h:403
llvm::AMDGPUTargetMachine::getAddressSpaceForPseudoSourceKind
unsigned getAddressSpaceForPseudoSourceKind(unsigned Kind) const override
getAddressSpaceForPseudoSourceKind - Given the kind of memory (e.g.
Definition: AMDGPUTargetMachine.cpp:781
llvm::AMDGPUPassConfig::addCodeGenPrepare
void addCodeGenPrepare() override
Add pass to prepare the LLVM IR for code generation.
Definition: AMDGPUTargetMachine.cpp:1034
llvm::AMDGPUTargetMachine::~AMDGPUTargetMachine
~AMDGPUTargetMachine() override
llvm::AMDGPUTargetMachine::getSubtargetImpl
const TargetSubtargetInfo * getSubtargetImpl() const
llvm::StringMap
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:110
llvm::AMDGPUPassConfig::addInstSelector
bool addInstSelector() override
addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...
Definition: AMDGPUTargetMachine.cpp:1065
PB
PassBuilder PB(Machine, PassOpts->PTO, None, &PIC)
llvm::TargetPassConfig
Target-Independent Code Generator Pass Configuration Options.
Definition: TargetPassConfig.h:84
llvm::AMDGPUTargetMachine::getFeatureString
StringRef getFeatureString(const Function &F) const
Definition: AMDGPUTargetMachine.cpp:560
llvm::cl::opt< bool >
llvm::CodeGenOpt::Default
@ Default
Definition: CodeGen.h:55
llvm::EngineKind::JIT
@ JIT
Definition: ExecutionEngine.h:524
llvm::MachineSchedContext
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
Definition: MachineScheduler.h:127
llvm::AMDGPUPassConfig::createMachineScheduler
ScheduleDAGInstrs * createMachineScheduler(MachineSchedContext *C) const override
Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this ...
Definition: AMDGPUTargetMachine.cpp:1076
TargetPassConfig.h
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:117
llvm::AMDGPUPassConfig::addStraightLineScalarOptimizationPasses
void addStraightLineScalarOptimizationPasses()
Definition: AMDGPUTargetMachine.cpp:928
llvm::AMDGPUTargetMachine::getPredicatedAddrSpace
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
If the specified predicate checks whether a generic pointer falls within a specified address space,...
Definition: AMDGPUTargetMachine.cpp:754
llvm::AMDGPUPassConfig::getAMDGPUTargetMachine
AMDGPUTargetMachine & getAMDGPUTargetMachine() const
Definition: AMDGPUTargetMachine.h:110
llvm::AMDGPUPassConfig::AMDGPUPassConfig
AMDGPUPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
Definition: AMDGPUTargetMachine.cpp:910
llvm::AMDGPUTargetMachine::EnableLowerModuleLDS
static bool EnableLowerModuleLDS
Definition: AMDGPUTargetMachine.h:38
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::GCNTargetMachine
Definition: AMDGPUTargetMachine.h:73
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::AMDGPUPassConfig::addPreISel
bool addPreISel() override
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
Definition: AMDGPUTargetMachine.cpp:1059
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::AMDGPUPassConfig::getCSEConfig
std::unique_ptr< CSEConfigBase > getCSEConfig() const override
Returns the CSEConfig object to use for the current optimization level.
Definition: AMDGPUTargetMachine.cpp:840
llvm::AMDGPUTargetMachine::getObjFileLowering
TargetLoweringObjectFile * getObjFileLowering() const override
Definition: AMDGPUTargetMachine.h:49
llvm::TargetSubtargetInfo
TargetSubtargetInfo - Generic base class for all target subtargets.
Definition: TargetSubtargetInfo.h:62
llvm::GCNTargetMachine::createPassConfig
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
Definition: AMDGPUTargetMachine.cpp:1397
llvm::PerFunctionMIParsingState
Definition: MIParser.h:162
llvm::GCNTargetMachine::getTargetTransformInfo
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
Definition: AMDGPUTargetMachine.cpp:832
llvm::AMDGPUTargetMachine::registerPassBuilderCallbacks
void registerPassBuilderCallbacks(PassBuilder &PB) override
Allow the target to modify the pass pipeline.
Definition: AMDGPUTargetMachine.cpp:582
llvm::AMDGPUPassConfig::addEarlyCSEOrGVNPass
void addEarlyCSEOrGVNPass()
Definition: AMDGPUTargetMachine.cpp:921
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:155
llvm::AMDGPUTargetMachine::isNoopAddrSpaceCast
bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override
Returns true if a cast between SrcAS and DestAS is a noop.
Definition: AMDGPUTargetMachine.cpp:728
llvm::LLVMTargetMachine
This class describes a target machine that is implemented with the LLVM target-independent code gener...
Definition: TargetMachine.h:408
llvm::AMDGPUPassConfig::isPassEnabled
bool isPassEnabled(const cl::opt< bool > &Opt, CodeGenOpt::Level Level=CodeGenOpt::Default) const
Check if a pass is enabled given Opt option.
Definition: AMDGPUTargetMachine.h:131
llvm::AMDGPUTargetMachine::EnableFunctionCalls
static bool EnableFunctionCalls
Definition: AMDGPUTargetMachine.h:37
llvm::AMDGPUTargetMachine::getAssumedAddrSpace
unsigned getAssumedAddrSpace(const Value *V) const override
If the specified generic pointer could be assumed as a pointer to a specific address space,...
Definition: AMDGPUTargetMachine.cpp:734
llvm::SMRange
Represents a range in source code.
Definition: SMLoc.h:48
llvm::legacy::PassManagerBase
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
Definition: LegacyPassManager.h:39
llvm::AMDGPUTargetMachine::getGPUName
StringRef getGPUName(const Function &F) const
Definition: AMDGPUTargetMachine.cpp:555
llvm::GCNTargetMachine::useIPRA
bool useIPRA() const override
True if the target wants to use interprocedural register allocation by default.
Definition: AMDGPUTargetMachine.h:89
llvm::ScheduleDAGInstrs
A ScheduleDAG for scheduling lists of MachineInstr.
Definition: ScheduleDAGInstrs.h:120
llvm::AMDGPUTargetMachine::AMDGPUTargetMachine
AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, TargetOptions Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL)
Definition: AMDGPUTargetMachine.cpp:530
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::AMDGPUTargetMachine::EnableLateStructurizeCFG
static bool EnableLateStructurizeCFG
Definition: AMDGPUTargetMachine.h:36
llvm::GCNTargetMachine::createDefaultFuncInfoYAML
yaml::MachineFunctionInfo * createDefaultFuncInfoYAML() const override
Allocate and return a default initialized instance of the YAML representation for the MachineFunction...
Definition: AMDGPUTargetMachine.cpp:1401