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31 TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs),
Context(
C) {
47 if (MinSize > (
int)Size)
61 UsedRegs[*AI / 32] |= 1 << (*AI & 31);
66 UsedRegs[*AI / 32] &= ~(1 << (*AI & 31));
73 for (
auto const &ValAssign : Locs)
74 if (ValAssign.isRegLoc() && TRI.
regsOverlap(ValAssign.getLocReg(),
Reg))
84 unsigned NumArgs =
Ins.size();
86 for (
unsigned i = 0;
i != NumArgs; ++
i) {
99 for (
unsigned i = 0,
e = Outs.size();
i !=
e; ++
i) {
113 for (
unsigned i = 0,
e = Outs.size();
i !=
e; ++
i) {
125 unsigned NumOps = Outs.size();
126 for (
unsigned i = 0;
i != NumOps; ++
i) {
127 MVT ArgVT = Outs[
i].VT;
131 dbgs() <<
"Call operand #" <<
i <<
" has unhandled type "
143 unsigned NumOps = ArgVTs.size();
144 for (
unsigned i = 0;
i != NumOps; ++
i) {
145 MVT ArgVT = ArgVTs[
i];
149 dbgs() <<
"Call operand #" <<
i <<
" has unhandled type "
161 for (
unsigned i = 0,
e =
Ins.size();
i !=
e; ++
i) {
166 dbgs() <<
"Call result #" <<
i <<
" has unhandled type "
178 dbgs() <<
"Call result has unhandled type "
186 if (!AnalyzingMustTailForwardedRegs)
201 Align SavedMaxStackArgAlign = MaxStackArgAlign;
202 unsigned NumLocs = Locs.size();
216 <<
" while computing remaining regparms\n";
220 HaveRegParm = Locs.back().isRegLoc();
221 }
while (HaveRegParm);
224 assert(NumLocs < Locs.size() &&
"CC assignment failed to add location");
225 for (
unsigned I = NumLocs,
E = Locs.size();
I !=
E; ++
I)
226 if (Locs[
I].isRegLoc())
227 Regs.push_back(
MCPhysReg(Locs[
I].getLocReg()));
233 MaxStackArgAlign = SavedMaxStackArgAlign;
234 Locs.resize(NumLocs);
246 for (
MVT RegVT : RegParmTypes) {
263 if (CalleeCC == CallerCC)
266 CCState CCInfo1(CalleeCC,
false, MF, RVLocs1,
C);
270 CCState CCInfo2(CallerCC,
false, MF, RVLocs2,
C);
273 if (RVLocs1.size() != RVLocs2.size())
275 for (
unsigned I = 0,
E = RVLocs1.size();
I !=
E; ++
I) {
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
This is an optimization pass for GlobalISel generic memory operations.
virtual void HandleByVal(CCState *, unsigned &, Align) const
Target-specific cleanup for formal ByVal parameters.
bool isInteger() const
Return true if this is an integer or a vector integer type.
unsigned getExtraInfo() const
CCState - This class holds information needed while lowering arguments and return values.
void addLoc(const CCValAssign &V)
bool isVector() const
Return true if this is a vector value type.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Reg
All possible values of the reg field in the ModR/M byte.
static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT)
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
void clearByValRegsInfo()
unsigned const TargetRegisterInfo * TRI
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeCallOperands - Analyze the outgoing arguments to a call, incorporating info about the passed v...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)
Compute the set of registers that need to be preserved and forwarded to any musttail calls.
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
A and B are either alignments or offsets.
CCValAssign - Represent assignment of one arg/retval to a location.
bool IsShadowAllocatedReg(MCRegister Reg) const
A shadow allocated register is a register that was allocated but wasn't added to the location list (L...
void ensureMaxAlignment(Align Alignment)
Make sure the function is at least Align bytes aligned.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
(vector float) vec_cmpeq(*A, *B) C
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
LocInfo getLocInfo() const
This struct is a compact representation of a valid (non-zero power of two) alignment.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
void ensureMaxAlignment(Align Alignment)
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
bool regsOverlap(Register RegA, Register RegB) const
Returns true if the two registers are equal or alias each other.
Describes a register that needs to be forwarded from the prologue to a musttail call.
CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &locs, LLVMContext &C)
This is an important class for using LLVM in a threaded context.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static bool resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)
Returns true if the results of the two calling conventions are compatible.
Register addLiveIn(MCRegister PReg, const TargetRegisterClass *RC)
addLiveIn - Add the specified physical register as a live-in value and create a corresponding virtual...
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
A utility class that uses RAII to save and restore the value of a variable.
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
CheckReturn - Analyze the return values of a function, returning true if the return can be performed ...
Wrapper class representing virtual and physical registers.
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
unsigned getByValSize() const
unsigned AllocateStack(unsigned Size, Align Alignment)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
void getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)
Compute the remaining unused register parameters that would be used for the given value type.
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, Align MinAlign, ISD::ArgFlagsTy ArgFlags)
Allocate space on the stack large enough to pass an argument by value.
virtual const TargetLowering * getTargetLowering() const
Align getNonZeroByValAlign() const
virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const
Return the register class that should be used for the specified value type.
@ X86_FastCall
X86_FastCall - 'fast' analog of X86_StdCall.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
@ X86_VectorCall
MSVC calling convention that passes vectors and vector aggregates in SSE registers.
bool isAllocated(MCRegister Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
MCRegAliasIterator enumerates all registers aliasing Reg.
Wrapper class representing physical registers. Should be passed by value.