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38 #define DEBUG_TYPE "mips-isel"
60 processFunctionAfterISel(
MF);
155 unsigned MinSizeInBits)
const {
223 bool MipsDAGToDAGISel::selectVecAddAsVecSubIfProfitable(
SDNode *Node) {
224 assert(Node->getOpcode() ==
ISD::ADD &&
"Should only get 'add' here.");
226 EVT VT = Node->getValueType(0);
232 auto *BVN = dyn_cast<BuildVectorSDNode>(
C);
236 APInt SplatValue, SplatUndef;
237 unsigned SplatBitSize;
240 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs,
244 auto IsInlineConstant = [](
const APInt &
Imm) {
return Imm.isIntN(5); };
246 if (IsInlineConstant(SplatValue))
249 APInt NegSplatValue = 0 - SplatValue;
250 if (!IsInlineConstant(NegSplatValue))
257 assert(NegC &&
"Constant-folding failed!");
267 void MipsDAGToDAGISel::Select(
SDNode *Node) {
268 unsigned Opcode = Node->getOpcode();
271 if (Node->isMachineOpcode()) {
285 if (Node->getSimpleValueType(0).isVector() &&
286 selectVecAddAsVecSubIfProfitable(Node))
299 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
300 cast<MemSDNode>(Node)->getAlignment()) &&
301 "Unexpected unaligned loads/stores.");
310 bool MipsDAGToDAGISel::
311 SelectInlineAsmMemoryOperand(
const SDValue &
Op,
unsigned ConstraintID,
312 std::vector<SDValue> &OutOps) {
314 switch(ConstraintID) {
320 OutOps.push_back(
Op);
const TargetLowering * getTargetLowering() const
This is an optimization pass for GlobalISel generic memory operations.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
SDNode * getNode() const
get the SDNode which holds the desired result
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
bool systemSupportsUnalignedAccess() const
Does the system support unaligned memory access.
Represents one node in the SelectionDAG.
raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
SDValue getRegister(unsigned Reg, EVT VT)
const MipsSubtarget * Subtarget
Keep a pointer to the MipsSubtarget around so that we can make the right decision when generating cod...
@ GlobalBaseReg
The result of the mflr at function entry, used for PIC code.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
(vector float) vec_cmpeq(*A, *B) C
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
Represent the analysis usage information of a pass.
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
void ReplaceNode(SDNode *F, SDNode *T)
Replace all uses of F with T, then remove F from the DAG.
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Class for arbitrary precision integers.
bool isVector() const
Return true if this is a vector value type.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Wrapper class representing virtual and physical registers.
const DataLayout & getDataLayout() const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
SDValue FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDValue > Ops)
@ ADD
Simple integer binary arithmetic operators.
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
SDNode * getGlobalBaseReg()
getGlobalBaseReg - Output the instructions required to put the GOT address into a register.