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21 #define DEBUG_TYPE "si-fix-vgpr-copies"
36 StringRef getPassName()
const override {
return "SI Fix VGPR copies"; }
43 char SIFixVGPRCopies::
ID = 0;
55 switch (
MI.getOpcode()) {
57 if (
TII->isVGPRCopy(
MI) && !
MI.readsRegister(AMDGPU::EXEC,
TRI)) {
This is an optimization pass for GlobalISel generic memory operations.
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
unsigned const TargetRegisterInfo * TRI
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
const HexagonInstrInfo * TII
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Representation of each machine instruction.
StringRef - Represent a constant reference to a string, i.e.
void initializeSIFixVGPRCopiesPass(PassRegistry &)