LLVM  14.0.0git
SIFixVGPRCopies.cpp
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1 //===-- SIFixVGPRCopies.cpp - Fix VGPR Copies after regalloc --------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// Add implicit use of exec to vector register copies.
11 ///
12 //===----------------------------------------------------------------------===//
13 
14 #include "AMDGPU.h"
15 #include "GCNSubtarget.h"
18 
19 using namespace llvm;
20 
21 #define DEBUG_TYPE "si-fix-vgpr-copies"
22 
23 namespace {
24 
25 class SIFixVGPRCopies : public MachineFunctionPass {
26 public:
27  static char ID;
28 
29 public:
30  SIFixVGPRCopies() : MachineFunctionPass(ID) {
32  }
33 
34  bool runOnMachineFunction(MachineFunction &MF) override;
35 
36  StringRef getPassName() const override { return "SI Fix VGPR copies"; }
37 };
38 
39 } // End anonymous namespace.
40 
41 INITIALIZE_PASS(SIFixVGPRCopies, DEBUG_TYPE, "SI Fix VGPR copies", false, false)
42 
43 char SIFixVGPRCopies::ID = 0;
44 
45 char &llvm::SIFixVGPRCopiesID = SIFixVGPRCopies::ID;
46 
47 bool SIFixVGPRCopies::runOnMachineFunction(MachineFunction &MF) {
48  const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
49  const SIRegisterInfo *TRI = ST.getRegisterInfo();
50  const SIInstrInfo *TII = ST.getInstrInfo();
51  bool Changed = false;
52 
53  for (MachineBasicBlock &MBB : MF) {
54  for (MachineInstr &MI : MBB) {
55  switch (MI.getOpcode()) {
56  case AMDGPU::COPY:
57  if (TII->isVGPRCopy(MI) && !MI.readsRegister(AMDGPU::EXEC, TRI)) {
58  MI.addOperand(MF,
59  MachineOperand::CreateReg(AMDGPU::EXEC, false, true));
60  LLVM_DEBUG(dbgs() << "Add exec use to " << MI);
61  Changed = true;
62  }
63  break;
64  default:
65  break;
66  }
67  }
68  }
69 
70  return Changed;
71 }
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:103
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::MachineOperand::CreateReg
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
Definition: MachineOperand.h:791
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
llvm::GCNSubtarget
Definition: GCNSubtarget.h:31
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::PassRegistry::getPassRegistry
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Definition: PassRegistry.cpp:31
GCNSubtarget.h
INITIALIZE_PASS
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:37
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::SIRegisterInfo
Definition: SIRegisterInfo.h:28
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
AMDGPUMCTargetDesc.h
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::ARM_MB::ST
@ ST
Definition: ARMBaseInfo.h:73
llvm::SIFixVGPRCopiesID
char & SIFixVGPRCopiesID
Definition: SIFixVGPRCopies.cpp:45
MachineFunctionPass.h
DEBUG_TYPE
#define DEBUG_TYPE
Definition: SIFixVGPRCopies.cpp:21
llvm::MachineFunction
Definition: MachineFunction.h:230
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
AMDGPU.h
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::initializeSIFixVGPRCopiesPass
void initializeSIFixVGPRCopiesPass(PassRegistry &)
llvm::SIInstrInfo
Definition: SIInstrInfo.h:38
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:37