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15 #ifndef LLVM_CODEGEN_TARGETSCHEDULE_H
16 #define LLVM_CODEGEN_TARGETSCHEDULE_H
20 #include "llvm/Config/llvm-config.h"
27 class TargetInstrInfo;
41 unsigned MicroOpFactor = 0;
44 unsigned ResourceLCM = 0;
121 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
144 return ResourceFactors[ResIdx];
150 return MicroOpFactor;
189 bool UseDefaultDefLatency =
true)
const;
190 unsigned computeInstrLatency(
const MCInst &Inst)
const;
191 unsigned computeInstrLatency(
unsigned Opcode)
const;
208 #endif // LLVM_CODEGEN_TARGETSCHEDULE_H
bool mustEndGroup(const MachineInstr *MI, const MCSchedClassDesc *SC=nullptr) const
Return true if current group must end.
const MCWriteProcResEntry * getWriteProcResEnd(const MCSchedClassDesc *SC) const
ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder & UseMI
unsigned MicroOpBufferSize
const TargetInstrInfo * getInstrInfo() const
TargetInstrInfo getter.
unsigned getResourceFactor(unsigned ResIdx) const
Multiply the number of units consumed for a resource by this factor to normalize it relative to other...
const MCSchedModel * getMCSchedModel() const
unsigned computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx, const MachineInstr *DepMI) const
Output dependency latency of a pair of defs of the same register.
Identify one of the processor resource kinds consumed by a particular scheduling class for the specif...
Instances of this class represent a single low-level machine instruction.
const InstrItineraryData * getInstrItineraries() const
const MCProcResourceDesc * getProcResource(unsigned PIdx) const
Get a processor resource by ID for convenience.
unsigned getNumProcResourceKinds() const
void init(const TargetSubtargetInfo *TSInfo)
Initialize the machine model for instruction scheduling.
TargetInstrInfo - Interface to description of machine instruction set.
unsigned getIssueWidth() const
Maximum number of micro-ops that may be scheduled per cycle.
@ SC
CHAIN = SC CHAIN, Imm128 - System call.
bool hasInstrSchedModelOrItineraries() const
Return true if this machine model includes an instruction-level scheduling model or cycle-to-cycle it...
Summarize the scheduling resources required for an instruction of a particular scheduling class.
int getResourceBufferSize(unsigned PIdx) const
Number of resource units that may be buffered for OOO execution.
const HexagonInstrInfo * TII
bool hasInstrItineraries() const
Return true if this machine model includes cycle-to-cycle itinerary data.
double computeReciprocalThroughput(const MachineInstr *MI) const
Compute the reciprocal throughput of the given instruction.
ProcResIter getWriteProcResEnd(const MCSchedClassDesc *SC) const
const MCSchedClassDesc * resolveSchedClass(const MachineInstr *MI) const
Return the MCSchedClassDesc for this instruction.
Define a kind of processor resource that will be modeled by the scheduler.
Provide an instruction scheduling machine model to CodeGen passes.
Representation of each machine instruction.
unsigned computeOperandLatency(const MachineInstr *DefMI, unsigned DefOperIdx, const MachineInstr *UseMI, unsigned UseOperIdx) const
Compute operand latency based on the available machine model.
const MCWriteProcResEntry * getWriteProcResBegin(const MCSchedClassDesc *SC) const
Return an iterator at the first process resource consumed by the given scheduling class.
unsigned getProcessorID() const
unsigned getMicroOpFactor() const
Multiply number of micro-ops by this factor to normalize it relative to other resources.
unsigned getLatencyFactor() const
Multiply cycle count by this factor to normalize it relative to other resources.
unsigned getNumProcResourceKinds() const
Get the number of kinds of resources for this target.
TargetSubtargetInfo - Generic base class for all target subtargets.
unsigned getNumMicroOps(const MachineInstr *MI, const MCSchedClassDesc *SC=nullptr) const
Return the number of issue slots required for this MI.
const MCProcResourceDesc * getProcResource(unsigned ProcResourceIdx) const
Machine model for scheduling, bundling, and heuristics.
bool mustBeginGroup(const MachineInstr *MI, const MCSchedClassDesc *SC=nullptr) const
Return true if new group must begin.
const TargetSubtargetInfo * getSubtargetInfo() const
TargetSubtargetInfo getter.
const char * getResourceName(unsigned PIdx) const
unsigned getProcessorID() const
Identify the processor corresponding to the current subtarget.
MachineInstrBuilder MachineInstrBuilder & DefMI
unsigned getMicroOpBufferSize() const
Number of micro-ops that may be buffered for OOO execution.
Itinerary data supplied by a subtarget to be used by a target.
bool hasInstrSchedModel() const
Return true if this machine model includes an instruction-level scheduling model.