LLVM 17.0.0git
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Machine model for scheduling, bundling, and heuristics. More...
#include "llvm/MC/MCSchedule.h"
Public Member Functions | |
bool | hasExtraProcessorInfo () const |
unsigned | getProcessorID () const |
bool | hasInstrSchedModel () const |
Does this machine model include instruction-level scheduling. | |
const MCExtraProcessorInfo & | getExtraProcessorInfo () const |
bool | isComplete () const |
Return true if this machine model data for all instructions with a scheduling class (itinerary class or SchedRW list). | |
bool | isOutOfOrder () const |
Return true if machine supports out of order execution. | |
unsigned | getNumProcResourceKinds () const |
const MCProcResourceDesc * | getProcResource (unsigned ProcResourceIdx) const |
const MCSchedClassDesc * | getSchedClassDesc (unsigned SchedClassIdx) const |
int | computeInstrLatency (const MCSubtargetInfo &STI, unsigned SClass) const |
int | computeInstrLatency (const MCSubtargetInfo &STI, const MCInstrInfo &MCII, const MCInst &Inst) const |
double | getReciprocalThroughput (const MCSubtargetInfo &STI, const MCInstrInfo &MCII, const MCInst &Inst) const |
Static Public Member Functions | |
static int | computeInstrLatency (const MCSubtargetInfo &STI, const MCSchedClassDesc &SCDesc) |
Returns the latency value for the scheduling class. | |
static double | getReciprocalThroughput (const MCSubtargetInfo &STI, const MCSchedClassDesc &SCDesc) |
static double | getReciprocalThroughput (unsigned SchedClass, const InstrItineraryData &IID) |
static unsigned | getForwardingDelayCycles (ArrayRef< MCReadAdvanceEntry > Entries, unsigned WriteResourceIdx=0) |
Returns the maximum forwarding delay for register reads dependent on writes of scheduling class WriteResourceIdx. | |
static const MCSchedModel & | GetDefaultSchedModel () |
Returns the default initialized model. | |
Static Public Attributes | |
static const unsigned | DefaultIssueWidth = 1 |
static const unsigned | DefaultMicroOpBufferSize = 0 |
static const unsigned | DefaultLoopMicroOpBufferSize = 0 |
static const unsigned | DefaultLoadLatency = 4 |
static const unsigned | DefaultHighLatency = 10 |
static const unsigned | DefaultMispredictPenalty = 10 |
static const MCSchedModel | Default |
Friends | |
class | InstrItineraryData |
Machine model for scheduling, bundling, and heuristics.
The machine model directly provides basic information about the microarchitecture to the scheduler in the form of properties. It also optionally refers to scheduler resource tables and itinerary tables. Scheduler resource tables model the latency and cost for each instruction type. Itinerary tables are an independent mechanism that provides a detailed reservation table describing each cycle of instruction execution. Subtargets may define any or all of the above categories of data depending on the type of CPU and selected scheduler.
The machine independent properties defined here are used by the scheduler as an abstract machine model. A real micro-architecture has a number of buffers, queues, and stages. Declaring that a given machine-independent abstract property corresponds to a specific physical property across all subtargets can't be done. Nonetheless, the abstract model is useful. Futhermore, subtargets typically extend this model with processor specific resources to model any hardware features that can be exploited by scheduling heuristics and aren't sufficiently represented in the abstract.
The abstract pipeline is built around the notion of an "issue point". This is merely a reference point for counting machine cycles. The physical machine will have pipeline stages that delay execution. The scheduler does not model those delays because they are irrelevant as long as they are consistent. Inaccuracies arise when instructions have different execution delays relative to each other, in addition to their intrinsic latency. Those special cases can be handled by TableGen constructs such as, ReadAdvance, which reduces latency when reading data, and ResourceCycles, which consumes a processor resource when writing data for a number of abstract cycles.
TODO: One tool currently missing is the ability to add a delay to ResourceCycles. That would be easy to add and would likely cover all cases currently handled by the legacy itinerary tables.
A note on out-of-order execution and, more generally, instruction buffers. Part of the CPU pipeline is always in-order. The issue point, which is the point of reference for counting cycles, only makes sense as an in-order part of the pipeline. Other parts of the pipeline are sometimes falling behind and sometimes catching up. It's only interesting to model those other, decoupled parts of the pipeline if they may be predictably resource constrained in a way that the scheduler can exploit.
The LLVM machine model distinguishes between in-order constraints and out-of-order constraints so that the target's scheduling strategy can apply appropriate heuristics. For a well-balanced CPU pipeline, out-of-order resources would not typically be treated as a hard scheduling constraint. For example, in the GenericScheduler, a delay caused by limited out-of-order resources is not directly reflected in the number of cycles that the scheduler sees between issuing an instruction and its dependent instructions. In other words, out-of-order resources don't directly increase the latency between pairs of instructions. However, they can still be used to detect potential bottlenecks across a sequence of instructions and bias the scheduling heuristics appropriately.
Definition at line 249 of file MCSchedule.h.
int MCSchedModel::computeInstrLatency | ( | const MCSubtargetInfo & | STI, |
const MCInstrInfo & | MCII, | ||
const MCInst & | Inst | ||
) | const |
Definition at line 68 of file MCSchedule.cpp.
References computeInstrLatency(), llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), getProcessorID(), llvm::MCInstrDesc::getSchedClass(), getSchedClassDesc(), llvm::MCSchedClassDesc::isValid(), llvm::MCSchedClassDesc::isVariant(), llvm_unreachable, and llvm::MCSubtargetInfo::resolveVariantSchedClass().
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Returns the latency value for the scheduling class.
Definition at line 41 of file MCSchedule.cpp.
References llvm::MCWriteLatencyEntry::Cycles, llvm::MCSubtargetInfo::getWriteLatencyEntry(), llvm::Latency, and llvm::MCSchedClassDesc::NumWriteLatencyEntries.
Referenced by computeInstrLatency(), llvm::TargetSchedModel::computeInstrLatency(), and llvm::mca::computeMaxLatency().
int MCSchedModel::computeInstrLatency | ( | const MCSubtargetInfo & | STI, |
unsigned | SClass | ||
) | const |
Definition at line 57 of file MCSchedule.cpp.
References computeInstrLatency(), getSchedClassDesc(), llvm::MCSchedClassDesc::isValid(), llvm::MCSchedClassDesc::isVariant(), and llvm_unreachable.
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Returns the default initialized model.
Definition at line 384 of file MCSchedule.h.
References Default.
Referenced by llvm::MCSubtargetInfo::getSchedModelForCPU(), and llvm::MCSubtargetInfo::InitMCProcessorInfo().
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Definition at line 327 of file MCSchedule.h.
References assert(), ExtraProcessorInfo, and hasExtraProcessorInfo().
Referenced by llvm::mca::LSUnitBase::LSUnitBase(), and llvm::mca::RetireControlUnit::RetireControlUnit().
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Returns the maximum forwarding delay for register reads dependent on writes of scheduling class WriteResourceIdx.
Definition at line 155 of file MCSchedule.cpp.
References E.
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Definition at line 340 of file MCSchedule.h.
References NumProcResourceKinds.
Referenced by llvm::ResourceManager::calculateResMII(), llvm::mca::computeBlockRThroughput(), llvm::mca::computeProcResourceMasks(), llvm::TargetSchedModel::getNumProcResourceKinds(), llvm::TargetSchedModel::init(), llvm::ResourceManager::init(), llvm::mca::initializeUsedResources(), llvm::ResourceManager::initProcResourceVectors(), llvm::mca::InstrBuilder::InstrBuilder(), and llvm::mca::ResourceManager::ResourceManager().
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Definition at line 322 of file MCSchedule.h.
References ProcID.
Referenced by computeInstrLatency(), llvm::mca::InstrBuilder::createInstruction(), llvm::TargetSchedModel::getProcessorID(), and getReciprocalThroughput().
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Definition at line 344 of file MCSchedule.h.
References assert(), hasInstrSchedModel(), NumProcResourceKinds, and ProcResourceTable.
Referenced by llvm::ResourceManager::calculateResMII(), llvm::mca::computeBlockRThroughput(), llvm::TargetSchedModel::computeOutputLatency(), llvm::mca::computeProcResourceMasks(), llvm::mca::InstructionTables::execute(), llvm::TargetSchedModel::getProcResource(), getReciprocalThroughput(), llvm::TargetSchedModel::getResourceBufferSize(), llvm::TargetSchedModel::getResourceName(), llvm::TargetSchedModel::init(), llvm::mca::initializeUsedResources(), llvm::ResourceManager::initProcResourceVectors(), llvm::mca::LSUnitBase::LSUnitBase(), and llvm::mca::ResourceManager::ResourceManager().
double MCSchedModel::getReciprocalThroughput | ( | const MCSubtargetInfo & | STI, |
const MCInstrInfo & | MCII, | ||
const MCInst & | Inst | ||
) | const |
Definition at line 111 of file MCSchedule.cpp.
References llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), getProcessorID(), getReciprocalThroughput(), llvm::MCInstrDesc::getSchedClass(), getSchedClassDesc(), IssueWidth, llvm::MCSchedClassDesc::isValid(), llvm::MCSchedClassDesc::isVariant(), llvm_unreachable, and llvm::MCSubtargetInfo::resolveVariantSchedClass().
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Definition at line 89 of file MCSchedule.cpp.
References E, getProcResource(), llvm::MCSubtargetInfo::getSchedModel(), llvm::MCSubtargetInfo::getWriteProcResBegin(), llvm::MCSubtargetInfo::getWriteProcResEnd(), I, IssueWidth, llvm::MCSchedClassDesc::NumMicroOps, and llvm::MCProcResourceDesc::NumUnits.
Referenced by llvm::TargetSchedModel::computeReciprocalThroughput(), and getReciprocalThroughput().
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Definition at line 135 of file MCSchedule.cpp.
References llvm::InstrItineraryData::beginStage(), DefaultIssueWidth, E, llvm::InstrItineraryData::endStage(), I, and llvm::popcount().
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Definition at line 351 of file MCSchedule.h.
References assert(), hasInstrSchedModel(), NumSchedClasses, and SchedClassTable.
Referenced by llvm::mca::RegisterFile::addRegisterRead(), llvm::mca::RegisterFile::checkRAWHazards(), llvm::mca::RegisterFile::collectWrites(), computeInstrLatency(), llvm::TargetSchedModel::computeReciprocalThroughput(), llvm::mca::InstrBuilder::createInstruction(), getLatency(), getReciprocalThroughput(), and llvm::TargetSchedModel::resolveSchedClass().
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Definition at line 320 of file MCSchedule.h.
References ExtraProcessorInfo.
Referenced by getExtraProcessorInfo(), llvm::mca::LSUnitBase::LSUnitBase(), and llvm::mca::RetireControlUnit::RetireControlUnit().
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Does this machine model include instruction-level scheduling.
Definition at line 325 of file MCSchedule.h.
References SchedClassTable.
Referenced by getLatency(), getProcResource(), getSchedClassDesc(), and llvm::TargetSchedModel::hasInstrSchedModel().
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Return true if this machine model data for all instructions with a scheduling class (itinerary class or SchedRW list).
Definition at line 335 of file MCSchedule.h.
References CompleteModel.
Referenced by llvm::TargetSchedModel::computeOperandLatency().
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Return true if machine supports out of order execution.
Definition at line 338 of file MCSchedule.h.
References MicroOpBufferSize.
Referenced by llvm::TargetSchedModel::computeOutputLatency(), llvm::mca::Context::createDefaultPipeline(), and llvm::mca::RetireControlUnit::RetireControlUnit().
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Definition at line 315 of file MCSchedule.h.
bool llvm::MCSchedModel::CompleteModel |
Definition at line 307 of file MCSchedule.h.
Referenced by isComplete().
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Definition at line 385 of file MCSchedule.h.
Referenced by GetDefaultSchedModel().
Definition at line 298 of file MCSchedule.h.
Definition at line 262 of file MCSchedule.h.
Referenced by getReciprocalThroughput().
Definition at line 291 of file MCSchedule.h.
Definition at line 287 of file MCSchedule.h.
Definition at line 279 of file MCSchedule.h.
Definition at line 303 of file MCSchedule.h.
const MCExtraProcessorInfo* llvm::MCSchedModel::ExtraProcessorInfo |
Definition at line 318 of file MCSchedule.h.
Referenced by getExtraProcessorInfo(), and hasExtraProcessorInfo().
unsigned llvm::MCSchedModel::HighLatency |
Definition at line 297 of file MCSchedule.h.
Referenced by llvm::TargetInstrInfo::defaultDefLatency().
const InstrItinerary* llvm::MCSchedModel::InstrItineraries |
Definition at line 316 of file MCSchedule.h.
Referenced by llvm::HexagonMCInstrInfo::getCVIResources(), llvm::HexagonMCInstrInfo::getOtherReservedSlots(), and llvm::HexagonMCInstrInfo::getUnits().
unsigned llvm::MCSchedModel::IssueWidth |
Definition at line 261 of file MCSchedule.h.
Referenced by llvm::mca::DispatchStage::DispatchStage(), llvm::TargetSchedModel::getIssueWidth(), llvm::mca::InOrderIssueStage::getIssueWidth(), getReciprocalThroughput(), llvm::TargetSchedModel::init(), llvm::ResourcePriorityQueue::reserveResources(), and llvm::ScoreboardHazardRecognizer::ScoreboardHazardRecognizer().
unsigned llvm::MCSchedModel::LoadLatency |
Definition at line 290 of file MCSchedule.h.
Referenced by llvm::TargetInstrInfo::defaultDefLatency().
unsigned llvm::MCSchedModel::LoopMicroOpBufferSize |
Definition at line 286 of file MCSchedule.h.
unsigned llvm::MCSchedModel::MicroOpBufferSize |
Definition at line 278 of file MCSchedule.h.
Referenced by llvm::TargetSchedModel::getMicroOpBufferSize(), and isOutOfOrder().
unsigned llvm::MCSchedModel::MispredictPenalty |
Definition at line 302 of file MCSchedule.h.
Referenced by llvm::ARMSubtarget::getMispredictionPenalty().
unsigned llvm::MCSchedModel::NumProcResourceKinds |
Definition at line 312 of file MCSchedule.h.
Referenced by getNumProcResourceKinds(), and getProcResource().
unsigned llvm::MCSchedModel::NumSchedClasses |
Definition at line 313 of file MCSchedule.h.
Referenced by getSchedClassDesc().
bool llvm::MCSchedModel::PostRAScheduler |
Definition at line 305 of file MCSchedule.h.
Referenced by llvm::TargetSubtargetInfo::enablePostRAScheduler().
unsigned llvm::MCSchedModel::ProcID |
Definition at line 309 of file MCSchedule.h.
Referenced by getProcessorID().
const MCProcResourceDesc* llvm::MCSchedModel::ProcResourceTable |
Definition at line 310 of file MCSchedule.h.
Referenced by getProcResource().
const MCSchedClassDesc* llvm::MCSchedModel::SchedClassTable |
Definition at line 311 of file MCSchedule.h.
Referenced by getSchedClassDesc(), and hasInstrSchedModel().