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23 #ifndef LLVM_LIB_TARGET_X86_X86INSTRBUILDER_H
24 #define LLVM_LIB_TARGET_X86_X86INSTRBUILDER_H
70 false,
false,
false, 0,
false));
78 false,
false, 0,
false));
123 static inline const MachineInstrBuilder &
135 MI->getOperand(Operand).ChangeToRegister(
Reg,
false);
136 MI->getOperand(Operand + 1).setImm(1);
137 MI->getOperand(Operand + 2).setReg(0);
138 MI->getOperand(Operand + 3).ChangeToImmediate(0);
139 MI->getOperand(Operand + 4).setReg(0);
142 static inline const MachineInstrBuilder &
147 static inline const MachineInstrBuilder &
156 static inline const MachineInstrBuilder &
158 unsigned Reg,
bool isKill,
int Offset) {
165 unsigned Reg1,
bool isKill1,
166 unsigned Reg2,
bool isKill2) {
171 static inline const MachineInstrBuilder &
197 static inline const MachineInstrBuilder &
222 static inline const MachineInstrBuilder &
232 #endif // LLVM_LIB_TARGET_X86_X86INSTRBUILDER_H
static const MachineInstrBuilder & addRegReg(const MachineInstrBuilder &MIB, unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2)
addRegReg - This function is used to add a memory reference of the form: [Reg + Reg].
union llvm::X86AddressMode::@583 Base
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
This is an optimization pass for GlobalISel generic memory operations.
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
X86AddressMode - This struct holds a generalized full x86 address mode.
static void setDirectAddressInInstr(MachineInstr *MI, unsigned Operand, unsigned Reg)
Replace the address used in the instruction with the direct memory reference.
const GlobalValue * getGlobal() const
const MachineInstrBuilder & add(const MachineOperand &MO) const
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Reg
All possible values of the reg field in the ModR/M byte.
enum llvm::X86AddressMode::@582 BaseType
A description of a memory reference used in the backend.
static const MachineInstrBuilder & addRegOffset(const MachineInstrBuilder &MIB, unsigned Reg, bool isKill, int Offset)
addRegOffset - This function is used to add a memory reference of the form [Reg + Offset],...
static X86AddressMode getAddressFromInstr(const MachineInstr *MI, unsigned Operand)
Compute the addressing mode from an machine instruction starting with the given operand.
static const MachineInstrBuilder & addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI, unsigned GlobalBaseReg, unsigned char OpFlags)
addConstantPoolReference - This function is used to add a reference to the base of a constant value s...
static const MachineInstrBuilder & addFullAddress(const MachineInstrBuilder &MIB, const X86AddressMode &AM)
@ GlobalBaseReg
The result of the mflr at function entry, used for PIC code.
static MachineOperand CreateImm(int64_t Val)
static const MachineInstrBuilder & addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg)
addDirectMem - This function is used to add a direct memory reference to the current instruction – th...
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
Describe properties that are true of each instruction in the target description file.
MachineOperand class - Representation of each machine instruction operand.
static MachineOperand CreateFI(int Idx)
static const MachineInstrBuilder & addOffset(const MachineInstrBuilder &MIB, int Offset)
const MachineInstrBuilder & addFrameIndex(int Idx) const
bool mayLoad() const
Return true if this instruction could possibly read memory.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Representation of each machine instruction.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
Align getObjectAlign(int ObjectIdx) const
Return the alignment of the specified stack object.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Register getReg() const
getReg - Returns the register number.
bool mayStore() const
Return true if this instruction could possibly modify memory.
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
@ MOLoad
The memory access reads data.
const MachineInstrBuilder & addConstantPoolIndex(unsigned Idx, int Offset=0, unsigned TargetFlags=0) const
@ MOStore
The memory access writes data.
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned TargetFlags=0) const
unsigned getKillRegState(bool B)
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
void getFullAddress(SmallVectorImpl< MachineOperand > &MO)
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.