LLVM 17.0.0git
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ARM_AM - ARM Addressing Mode Stuff. More...
Enumerations | |
enum | ShiftOpc { no_shift = 0 , asr , lsl , lsr , ror , rrx , uxtw } |
enum | AddrOpc { sub = 0 , add } |
enum | AMSubMode { bad_am_submode = 0 , ia , ib , da , db } |
Functions | |
static ShiftOpc | getShiftOpcForNode (unsigned Opcode) |
const char * | getAddrOpcStr (AddrOpc Op) |
const char * | getShiftOpcStr (ShiftOpc Op) |
unsigned | getShiftOpcEncoding (ShiftOpc Op) |
const char * | getAMSubModeStr (AMSubMode Mode) |
unsigned | rotr32 (unsigned Val, unsigned Amt) |
rotr32 - Rotate a 32-bit unsigned value right by a specified # bits. | |
unsigned | rotl32 (unsigned Val, unsigned Amt) |
rotl32 - Rotate a 32-bit unsigned value left by a specified # bits. | |
unsigned | getSORegOpc (ShiftOpc ShOp, unsigned Imm) |
unsigned | getSORegOffset (unsigned Op) |
ShiftOpc | getSORegShOp (unsigned Op) |
unsigned | getSOImmValImm (unsigned Imm) |
getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value. | |
unsigned | getSOImmValRot (unsigned Imm) |
getSOImmValRot - Given an encoded imm field for the reg/imm form, return the rotate amount. | |
unsigned | getSOImmValRotate (unsigned Imm) |
getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount to use. | |
int | getSOImmVal (unsigned Arg) |
getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immediate operand, return the 12-bit encoding for it. | |
bool | isSOImmTwoPartVal (unsigned V) |
isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVal's. | |
unsigned | getSOImmTwoPartFirst (unsigned V) |
getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it. | |
unsigned | getSOImmTwoPartSecond (unsigned V) |
getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of it. | |
bool | isSOImmTwoPartValNeg (unsigned V) |
isSOImmTwoPartValNeg - Return true if the specified value can be obtained by two SOImmVal, that -V = First + Second. | |
unsigned | getThumbImmValShift (unsigned Imm) |
getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift. | |
bool | isThumbImmShiftedVal (unsigned V) |
isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit immediate. | |
unsigned | getThumbImm16ValShift (unsigned Imm) |
getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift. | |
bool | isThumbImm16ShiftedVal (unsigned V) |
isThumbImm16ShiftedVal - Return true if the specified value can be obtained by left shifting a 16-bit immediate. | |
unsigned | getThumbImmNonShiftedVal (unsigned V) |
getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd value. | |
int | getT2SOImmValSplatVal (unsigned V) |
getT2SOImmValSplat - Return the 12-bit encoded representation if the specified value can be obtained by splatting the low 8 bits into every other byte or every byte of a 32-bit value. | |
int | getT2SOImmValRotateVal (unsigned V) |
getT2SOImmValRotateVal - Return the 12-bit encoded representation if the specified value is a rotated 8-bit value. | |
int | getT2SOImmVal (unsigned Arg) |
getT2SOImmVal - Given a 32-bit immediate, if it is something that can fit into a Thumb-2 shifter_operand immediate operand, return the 12-bit encoding for it. | |
unsigned | getT2SOImmValRotate (unsigned V) |
bool | isT2SOImmTwoPartVal (unsigned Imm) |
unsigned | getT2SOImmTwoPartFirst (unsigned Imm) |
unsigned | getT2SOImmTwoPartSecond (unsigned Imm) |
unsigned | getAM2Opc (AddrOpc Opc, unsigned Imm12, ShiftOpc SO, unsigned IdxMode=0) |
unsigned | getAM2Offset (unsigned AM2Opc) |
AddrOpc | getAM2Op (unsigned AM2Opc) |
ShiftOpc | getAM2ShiftOpc (unsigned AM2Opc) |
unsigned | getAM2IdxMode (unsigned AM2Opc) |
unsigned | getAM3Opc (AddrOpc Opc, unsigned char Offset, unsigned IdxMode=0) |
getAM3Opc - This function encodes the addrmode3 opc field. | |
unsigned char | getAM3Offset (unsigned AM3Opc) |
AddrOpc | getAM3Op (unsigned AM3Opc) |
unsigned | getAM3IdxMode (unsigned AM3Opc) |
AMSubMode | getAM4SubMode (unsigned Mode) |
unsigned | getAM4ModeImm (AMSubMode SubMode) |
unsigned | getAM5Opc (AddrOpc Opc, unsigned char Offset) |
getAM5Opc - This function encodes the addrmode5 opc field. | |
unsigned char | getAM5Offset (unsigned AM5Opc) |
AddrOpc | getAM5Op (unsigned AM5Opc) |
unsigned | getAM5FP16Opc (AddrOpc Opc, unsigned char Offset) |
getAM5FP16Opc - This function encodes the addrmode5fp16 opc field. | |
unsigned char | getAM5FP16Offset (unsigned AM5Opc) |
AddrOpc | getAM5FP16Op (unsigned AM5Opc) |
unsigned | createVMOVModImm (unsigned OpCmode, unsigned Val) |
unsigned | getVMOVModImmOpCmode (unsigned ModImm) |
unsigned | getVMOVModImmVal (unsigned ModImm) |
uint64_t | decodeVMOVModImm (unsigned ModImm, unsigned &EltBits) |
decodeVMOVModImm - Decode a NEON/MVE modified immediate value into the element value and the element size in bits. | |
bool | isNEONBytesplat (unsigned Value, unsigned Size) |
bool | isNEONi16splat (unsigned Value) |
Checks if Value is a correct immediate for instructions like VBIC/VORR. | |
unsigned | encodeNEONi16splat (unsigned Value) |
bool | isNEONi32splat (unsigned Value) |
Checks if Value is a correct immediate for instructions like VBIC/VORR. | |
unsigned | encodeNEONi32splat (unsigned Value) |
Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR. | |
float | getFPImmFloat (unsigned Imm) |
int | getFP16Imm (const APInt &Imm) |
getFP16Imm - Return an 8-bit floating-point version of the 16-bit floating-point value. | |
int | getFP16Imm (const APFloat &FPImm) |
int | getFP32FP16Imm (const APInt &Imm) |
If this is a FP16Imm encoded as a fp32 value, return the 8-bit encoding for it. | |
int | getFP32FP16Imm (const APFloat &FPImm) |
int | getFP32Imm (const APInt &Imm) |
getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value. | |
int | getFP32Imm (const APFloat &FPImm) |
int | getFP64Imm (const APInt &Imm) |
getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value. | |
int | getFP64Imm (const APFloat &FPImm) |
Enumerator | |
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sub | |
add |
Definition at line 37 of file ARMAddressingModes.h.
Enumerator | |
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bad_am_submode | |
ia | |
ib | |
da | |
db |
Definition at line 66 of file ARMAddressingModes.h.
Enumerator | |
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no_shift | |
asr | |
lsl | |
lsr | |
ror | |
rrx | |
uxtw |
Definition at line 27 of file ARMAddressingModes.h.
Definition at line 546 of file ARMAddressingModes.h.
Referenced by isVMOVModifiedImm(), and PromoteMVEPredVector().
decodeVMOVModImm - Decode a NEON/MVE modified immediate value into the element value and the element size in bits.
(If the element size is smaller than the vector, it is splatted into all the elements.)
Definition at line 557 of file ARMAddressingModes.h.
References getVMOVModImmOpCmode(), getVMOVModImmVal(), and llvm_unreachable.
Referenced by PerformVDUPLANECombine(), llvm::ARMInstPrinter::printVMOVModImmOperand(), and llvm::ARMTargetLowering::SimplifyDemandedBitsForTargetNode().
Definition at line 614 of file ARMAddressingModes.h.
References assert(), and isNEONi16splat().
Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR.
Definition at line 630 of file ARMAddressingModes.h.
References assert(), and isNEONi32splat().
Definition at line 42 of file ARMAddressingModes.h.
References sub.
Referenced by llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), llvm::ARMInstPrinter::printAddrMode3OffsetOperand(), llvm::ARMInstPrinter::printAddrMode5FP16Operand(), llvm::ARMInstPrinter::printAddrMode5Operand(), llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp(), and llvm::ARMInstPrinter::printAM3PreOrOffsetIndexOp().
Definition at line 428 of file ARMAddressingModes.h.
Referenced by llvm::ARMInstPrinter::printAddrMode2Operand().
Definition at line 419 of file ARMAddressingModes.h.
Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getNumMicroOpsSwiftLdSt(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().
Definition at line 422 of file ARMAddressingModes.h.
Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getNumMicroOpsSwiftLdSt(), llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().
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Definition at line 413 of file ARMAddressingModes.h.
Referenced by DecodeAddrMode2IdxInstruction(), and DecodeSORegMemOperand().
Definition at line 425 of file ARMAddressingModes.h.
Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), getNumMicroOpsSwiftLdSt(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), and llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp().
Definition at line 454 of file ARMAddressingModes.h.
Referenced by llvm::ARMInstPrinter::printAddrMode3Operand().
Definition at line 450 of file ARMAddressingModes.h.
Referenced by llvm::ARMBaseInstrInfo::convertToThreeAddress(), evaluateMemOpAddrForAddrMode3(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), llvm::ARMInstPrinter::printAddrMode3OffsetOperand(), llvm::ARMInstPrinter::printAM3PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().
Definition at line 451 of file ARMAddressingModes.h.
Referenced by llvm::ARMBaseInstrInfo::convertToThreeAddress(), evaluateMemOpAddrForAddrMode3(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), getNumMicroOpsSwiftLdSt(), llvm::ARMInstPrinter::printAddrMode3OffsetOperand(), llvm::ARMInstPrinter::printAM3PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().
getAM3Opc - This function encodes the addrmode3 opc field.
Definition at line 445 of file ARMAddressingModes.h.
References llvm::Offset, and sub.
Definition at line 475 of file ARMAddressingModes.h.
Definition at line 471 of file ARMAddressingModes.h.
References Mode.
Referenced by llvm::ARMInstPrinter::printLdStmModeOperand().
Definition at line 514 of file ARMAddressingModes.h.
Referenced by evaluateMemOpAddrForAddrMode5FP16(), llvm::ARMInstPrinter::printAddrMode5FP16Operand(), and llvm::rewriteT2FrameIndex().
Definition at line 517 of file ARMAddressingModes.h.
Referenced by evaluateMemOpAddrForAddrMode5FP16(), llvm::ARMInstPrinter::printAddrMode5FP16Operand(), and llvm::rewriteT2FrameIndex().
getAM5FP16Opc - This function encodes the addrmode5fp16 opc field.
Definition at line 510 of file ARMAddressingModes.h.
References llvm::Offset, and sub.
Referenced by DecodeAddrMode5FP16Operand().
Definition at line 493 of file ARMAddressingModes.h.
Referenced by evaluateMemOpAddrForAddrMode5(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), llvm::ARMInstPrinter::printAddrMode5Operand(), llvm::rewriteARMFrameIndex(), and llvm::rewriteT2FrameIndex().
Definition at line 494 of file ARMAddressingModes.h.
Referenced by evaluateMemOpAddrForAddrMode5(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), llvm::ARMInstPrinter::printAddrMode5Operand(), llvm::rewriteARMFrameIndex(), and llvm::rewriteT2FrameIndex().
getAM5Opc - This function encodes the addrmode5 opc field.
Definition at line 489 of file ARMAddressingModes.h.
References llvm::Offset, and sub.
Referenced by DecodeAddrMode5Operand(), and DecodeCopMemInstruction().
Definition at line 74 of file ARMAddressingModes.h.
References da, db, ia, ib, llvm_unreachable, and Mode.
Referenced by llvm::ARMInstPrinter::printLdStmModeOperand().
Definition at line 686 of file ARMAddressingModes.h.
References llvm::APFloat::bitcastToAPInt(), and getFP16Imm().
getFP16Imm - Return an 8-bit floating-point version of the 16-bit floating-point value.
If the value cannot be represented as an 8-bit floating-point value, then return -1.
Definition at line 667 of file ARMAddressingModes.h.
Referenced by getFP16Imm(), getFP32FP16Imm(), and llvm::ARMTargetLowering::isFPImmLegal().
Definition at line 698 of file ARMAddressingModes.h.
References llvm::APFloat::bitcastToAPInt(), and getFP32FP16Imm().
If this is a FP16Imm encoded as a fp32 value, return the 8-bit encoding for it.
Otherwise return -1 like getFP16Imm.
Definition at line 692 of file ARMAddressingModes.h.
References getFP16Imm().
Referenced by getFP32FP16Imm(), and llvm::ARMTargetLowering::isFPImmLegal().
Definition at line 726 of file ARMAddressingModes.h.
References llvm::APFloat::bitcastToAPInt(), and getFP32Imm().
getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value.
If the value cannot be represented as an 8-bit floating-point value, then return -1.
Definition at line 705 of file ARMAddressingModes.h.
Referenced by getFP32Imm(), and llvm::ARMTargetLowering::isFPImmLegal().
Definition at line 754 of file ARMAddressingModes.h.
References llvm::APFloat::bitcastToAPInt(), and getFP64Imm().
getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value.
If the value cannot be represented as an 8-bit floating-point value, then return -1.
Definition at line 733 of file ARMAddressingModes.h.
Referenced by getFP64Imm(), and llvm::ARMTargetLowering::isFPImmLegal().
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Definition at line 644 of file ARMAddressingModes.h.
References I.
Referenced by llvm::ARMInstPrinter::printFPImmOperand().
Definition at line 56 of file ARMAddressingModes.h.
References asr, llvm_unreachable, lsl, lsr, and ror.
Definition at line 23 of file ARMSelectionDAGInfo.h.
References asr, lsl, lsr, no_shift, ror, llvm::ISD::ROTR, llvm::ISD::SHL, llvm::ISD::SRA, and llvm::ISD::SRL.
Referenced by getARMIndexedAddressParts().
Definition at line 44 of file ARMAddressingModes.h.
References asr, llvm_unreachable, lsl, lsr, ror, rrx, and uxtw.
Referenced by llvm::ARMInstPrinter::printInst(), and llvm::ARMInstPrinter::printSORegRegOperand().
getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it.
Definition at line 193 of file ARMAddressingModes.h.
References getSOImmValRotate(), and rotr32().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and isSOImmTwoPartValNeg().
getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of it.
Definition at line 199 of file ARMAddressingModes.h.
References assert(), getSOImmValRotate(), and rotr32().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate().
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getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immediate operand, return the 12-bit encoding for it.
If not, return -1.
Definition at line 163 of file ARMAddressingModes.h.
References Arg, getSOImmValRotate(), rotl32(), and rotr32().
Referenced by llvm::ARMAsmBackend::adjustFixupValue(), llvm::ConstantMaterializationCost(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::emitARMRegPlusImmediate(), llvm::ARMTTIImpl::getIntImmCost(), llvm::ARMTargetLowering::isLegalAddImmediate(), llvm::ARMTargetLowering::isLegalICmpImmediate(), llvm::ARMTargetLowering::isMaskAndCmp0FoldingBeneficial(), IsSingleInstrConstant(), llvm::LowerARMMachineInstrToMCInst(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::ARMInstPrinter::printModImmOperand(), and llvm::rewriteARMFrameIndex().
getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value.
Definition at line 120 of file ARMAddressingModes.h.
getSOImmValRot - Given an encoded imm field for the reg/imm form, return the rotate amount.
Definition at line 123 of file ARMAddressingModes.h.
getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount to use.
If this immediate value cannot be handled with a single shifter-op, determine a good rotate amount that will take a maximal chunk of bits out of the immediate.
Definition at line 129 of file ARMAddressingModes.h.
References llvm::countr_zero(), and rotr32().
Referenced by llvm::emitARMRegPlusImmediate(), getSOImmTwoPartFirst(), getSOImmTwoPartSecond(), getSOImmVal(), isSOImmTwoPartVal(), isSOImmTwoPartValNeg(), and llvm::rewriteARMFrameIndex().
Definition at line 112 of file ARMAddressingModes.h.
Referenced by llvm::ARMBaseInstrInfo::convertToThreeAddress(), and emitAligningInstructions().
Definition at line 368 of file ARMAddressingModes.h.
References assert(), getT2SOImmVal(), getT2SOImmValRotate(), getT2SOImmValSplatVal(), isT2SOImmTwoPartVal(), and rotr32().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and getT2SOImmTwoPartSecond().
Definition at line 385 of file ARMAddressingModes.h.
References assert(), getT2SOImmTwoPartFirst(), and getT2SOImmVal().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate().
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getT2SOImmVal - Given a 32-bit immediate, if it is something that can fit into a Thumb-2 shifter_operand immediate operand, return the 12-bit encoding for it.
If not, return -1. See ARM Reference Manual A6.3.2.
Definition at line 320 of file ARMAddressingModes.h.
References Arg, getT2SOImmValRotateVal(), and getT2SOImmValSplatVal().
Referenced by llvm::ARMAsmBackend::adjustFixupValue(), llvm::ConstantMaterializationCost(), llvm::emitT2RegPlusImmediate(), llvm::ARMTTIImpl::getIntImmCost(), getT2SOImmTwoPartFirst(), getT2SOImmTwoPartSecond(), llvm::ARMTargetLowering::isLegalAddImmediate(), llvm::ARMTargetLowering::isLegalICmpImmediate(), llvm::ARMTargetLowering::isMaskAndCmp0FoldingBeneficial(), isT2SOImmTwoPartVal(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), and llvm::rewriteT2FrameIndex().
Definition at line 334 of file ARMAddressingModes.h.
References llvm::countr_zero().
Referenced by getT2SOImmTwoPartFirst(), and isT2SOImmTwoPartVal().
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getT2SOImmValRotateVal - Return the 12-bit encoded representation if the specified value is a rotated 8-bit value.
Return -1 if no rotation encoding is possible. See ARM Reference Manual A6.3.2.
Definition at line 304 of file ARMAddressingModes.h.
References llvm::countl_zero(), and rotr32().
Referenced by getT2SOImmVal().
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getT2SOImmValSplat - Return the 12-bit encoded representation if the specified value can be obtained by splatting the low 8 bits into every other byte or every byte of a 32-bit value.
i.e., 00000000 00000000 00000000 abcdefgh control = 0 00000000 abcdefgh 00000000 abcdefgh control = 1 abcdefgh 00000000 abcdefgh 00000000 control = 2 abcdefgh abcdefgh abcdefgh abcdefgh control = 3 Return -1 if none of the above apply. See ARM Reference Manual A6.3.2.
Definition at line 276 of file ARMAddressingModes.h.
Referenced by getT2SOImmTwoPartFirst(), getT2SOImmVal(), and isT2SOImmTwoPartVal().
getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift.
Returns the shift amount to use.
Definition at line 243 of file ARMAddressingModes.h.
References llvm::countr_zero().
Referenced by isThumbImm16ShiftedVal().
getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd value.
Definition at line 262 of file ARMAddressingModes.h.
References getThumbImmValShift().
getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift.
Returns the shift amount to use.
Definition at line 224 of file ARMAddressingModes.h.
References llvm::countr_zero().
Referenced by getThumbImmNonShiftedVal(), and isThumbImmShiftedVal().
Definition at line 549 of file ARMAddressingModes.h.
Referenced by decodeVMOVModImm().
Definition at line 552 of file ARMAddressingModes.h.
Referenced by decodeVMOVModImm().
Definition at line 595 of file ARMAddressingModes.h.
References assert(), llvm::count(), and Size.
Referenced by isNEONi16splat(), and isNEONi32splat().
Checks if Value is a correct immediate for instructions like VBIC/VORR.
Definition at line 606 of file ARMAddressingModes.h.
References isNEONBytesplat().
Referenced by encodeNEONi16splat().
Checks if Value is a correct immediate for instructions like VBIC/VORR.
Definition at line 624 of file ARMAddressingModes.h.
References isNEONBytesplat().
Referenced by encodeNEONi32splat().
isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVal's.
Definition at line 180 of file ARMAddressingModes.h.
References getSOImmValRotate(), and rotr32().
Referenced by llvm::ConstantMaterializationCost(), llvm::ARMBaseInstrInfo::FoldImmediate(), and isSOImmTwoPartValNeg().
isSOImmTwoPartValNeg - Return true if the specified value can be obtained by two SOImmVal, that -V = First + Second.
"R+V" can be optimized to (sub (sub R, First), Second). "R=V" can be optimized to (sub (mvn R, ~(-First)), Second).
Definition at line 212 of file ARMAddressingModes.h.
References getSOImmTwoPartFirst(), getSOImmValRotate(), isSOImmTwoPartVal(), and rotr32().
Referenced by llvm::ConstantMaterializationCost().
Definition at line 341 of file ARMAddressingModes.h.
References getT2SOImmVal(), getT2SOImmValRotate(), getT2SOImmValSplatVal(), and rotr32().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and getT2SOImmTwoPartFirst().
isThumbImm16ShiftedVal - Return true if the specified value can be obtained by left shifting a 16-bit immediate.
Definition at line 254 of file ARMAddressingModes.h.
References getThumbImm16ValShift().
isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit immediate.
Definition at line 235 of file ARMAddressingModes.h.
References getThumbImmValShift().
Referenced by llvm::ConstantMaterializationCost(), llvm::ARMTTIImpl::getIntImmCost(), and llvm::ARMTargetLowering::LowerAsmOperandForConstraint().
rotl32 - Rotate a 32-bit unsigned value left by a specified # bits.
Definition at line 93 of file ARMAddressingModes.h.
References assert().
Referenced by getSOImmVal().
rotr32 - Rotate a 32-bit unsigned value right by a specified # bits.
Definition at line 86 of file ARMAddressingModes.h.
References assert().
Referenced by llvm::emitARMRegPlusImmediate(), llvm::emitT2RegPlusImmediate(), getSOImmTwoPartFirst(), getSOImmTwoPartSecond(), getSOImmVal(), getSOImmValRotate(), getT2SOImmTwoPartFirst(), getT2SOImmValRotateVal(), isSOImmTwoPartVal(), isSOImmTwoPartValNeg(), isT2SOImmTwoPartVal(), llvm::ARMInstPrinter::printModImmOperand(), llvm::rewriteARMFrameIndex(), and llvm::rewriteT2FrameIndex().