LLVM 19.0.0git
BPFDisassembler.cpp
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1//===- BPFDisassembler.cpp - Disassembler for BPF ---------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file is part of the BPF Disassembler.
10//
11//===----------------------------------------------------------------------===//
12
15#include "llvm/ADT/ArrayRef.h"
16#include "llvm/MC/MCAsmInfo.h"
17#include "llvm/MC/MCContext.h"
20#include "llvm/MC/MCInst.h"
24#include <cstdint>
25
26using namespace llvm;
27
28#define DEBUG_TYPE "bpf-disassembler"
29
31
32namespace {
33
34/// A disassembler class for BPF.
35class BPFDisassembler : public MCDisassembler {
36public:
37 enum BPF_CLASS {
38 BPF_LD = 0x0,
39 BPF_LDX = 0x1,
40 BPF_ST = 0x2,
41 BPF_STX = 0x3,
42 BPF_ALU = 0x4,
43 BPF_JMP = 0x5,
44 BPF_JMP32 = 0x6,
45 BPF_ALU64 = 0x7
46 };
47
48 enum BPF_SIZE {
49 BPF_W = 0x0,
50 BPF_H = 0x1,
51 BPF_B = 0x2,
52 BPF_DW = 0x3
53 };
54
55 enum BPF_MODE {
56 BPF_IMM = 0x0,
57 BPF_ABS = 0x1,
58 BPF_IND = 0x2,
59 BPF_MEM = 0x3,
60 BPF_MEMSX = 0x4,
61 BPF_ATOMIC = 0x6
62 };
63
64 BPFDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
65 : MCDisassembler(STI, Ctx) {}
66 ~BPFDisassembler() override = default;
67
69 ArrayRef<uint8_t> Bytes, uint64_t Address,
70 raw_ostream &CStream) const override;
71
72 uint8_t getInstClass(uint64_t Inst) const { return (Inst >> 56) & 0x7; };
73 uint8_t getInstSize(uint64_t Inst) const { return (Inst >> 59) & 0x3; };
74 uint8_t getInstMode(uint64_t Inst) const { return (Inst >> 61) & 0x7; };
75};
76
77} // end anonymous namespace
78
80 const MCSubtargetInfo &STI,
81 MCContext &Ctx) {
82 return new BPFDisassembler(STI, Ctx);
83}
84
85
87 // Register the disassembler.
94}
95
96static const unsigned GPRDecoderTable[] = {
97 BPF::R0, BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5,
98 BPF::R6, BPF::R7, BPF::R8, BPF::R9, BPF::R10, BPF::R11};
99
100static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
101 uint64_t /*Address*/,
102 const MCDisassembler * /*Decoder*/) {
103 if (RegNo > 11)
105
106 unsigned Reg = GPRDecoderTable[RegNo];
109}
110
111static const unsigned GPR32DecoderTable[] = {
112 BPF::W0, BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5,
113 BPF::W6, BPF::W7, BPF::W8, BPF::W9, BPF::W10, BPF::W11};
114
115static DecodeStatus
116DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t /*Address*/,
117 const MCDisassembler * /*Decoder*/) {
118 if (RegNo > 11)
120
121 unsigned Reg = GPR32DecoderTable[RegNo];
124}
125
127 uint64_t Address,
128 const MCDisassembler *Decoder) {
129 unsigned Register = (Insn >> 16) & 0xf;
130 if (Register > 11)
132
134 unsigned Offset = (Insn & 0xffff);
135 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset)));
136
138}
139
140#include "BPFGenDisassemblerTables.inc"
143 bool IsLittleEndian) {
144 uint64_t Lo, Hi;
145
146 if (Bytes.size() < 8) {
147 Size = 0;
149 }
150
151 Size = 8;
152 if (IsLittleEndian) {
153 Hi = (Bytes[0] << 24) | (Bytes[1] << 16) | (Bytes[2] << 0) | (Bytes[3] << 8);
154 Lo = (Bytes[4] << 0) | (Bytes[5] << 8) | (Bytes[6] << 16) | (Bytes[7] << 24);
155 } else {
156 Hi = (Bytes[0] << 24) | ((Bytes[1] & 0x0F) << 20) | ((Bytes[1] & 0xF0) << 12) |
157 (Bytes[2] << 8) | (Bytes[3] << 0);
158 Lo = (Bytes[4] << 24) | (Bytes[5] << 16) | (Bytes[6] << 8) | (Bytes[7] << 0);
159 }
160 Insn = Make_64(Hi, Lo);
161
163}
164
165DecodeStatus BPFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
166 ArrayRef<uint8_t> Bytes,
167 uint64_t Address,
168 raw_ostream &CStream) const {
169 bool IsLittleEndian = getContext().getAsmInfo()->isLittleEndian();
172
173 Result = readInstruction64(Bytes, Address, Size, Insn, IsLittleEndian);
174 if (Result == MCDisassembler::Fail) return MCDisassembler::Fail;
175
176 uint8_t InstClass = getInstClass(Insn);
177 uint8_t InstMode = getInstMode(Insn);
178 if ((InstClass == BPF_LDX || InstClass == BPF_STX) &&
179 getInstSize(Insn) != BPF_DW &&
180 (InstMode == BPF_MEM || InstMode == BPF_ATOMIC) &&
181 STI.hasFeature(BPF::ALU32))
182 Result = decodeInstruction(DecoderTableBPFALU3264, Instr, Insn, Address,
183 this, STI);
184 else
185 Result = decodeInstruction(DecoderTableBPF64, Instr, Insn, Address, this,
186 STI);
187
188 if (Result == MCDisassembler::Fail) return MCDisassembler::Fail;
189
190 switch (Instr.getOpcode()) {
191 case BPF::LD_imm64:
192 case BPF::LD_pseudo: {
193 if (Bytes.size() < 16) {
194 Size = 0;
196 }
197 Size = 16;
198 if (IsLittleEndian)
199 Hi = (Bytes[12] << 0) | (Bytes[13] << 8) | (Bytes[14] << 16) | (Bytes[15] << 24);
200 else
201 Hi = (Bytes[12] << 24) | (Bytes[13] << 16) | (Bytes[14] << 8) | (Bytes[15] << 0);
202 auto& Op = Instr.getOperand(1);
203 Op.setImm(Make_64(Hi, Op.getImm()));
204 break;
205 }
206 case BPF::LD_ABS_B:
207 case BPF::LD_ABS_H:
208 case BPF::LD_ABS_W:
209 case BPF::LD_IND_B:
210 case BPF::LD_IND_H:
211 case BPF::LD_IND_W: {
212 auto Op = Instr.getOperand(0);
213 Instr.clear();
214 Instr.addOperand(MCOperand::createReg(BPF::R6));
215 Instr.addOperand(Op);
216 break;
217 }
218 }
219
220 return Result;
221}
222
223typedef DecodeStatus (*DecodeFunc)(MCInst &MI, unsigned insn, uint64_t Address,
224 const MCDisassembler *Decoder);
SmallVector< AArch64_IMM::ImmInsnModel, 4 > Insn
MCDisassembler::DecodeStatus DecodeStatus
static DecodeStatus decodeMemoryOpValue(MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus readInstruction64(ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint64_t &Insn, bool IsLittleEndian)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFDisassembler()
DecodeStatus(* DecodeFunc)(MCInst &MI, unsigned insn, uint64_t Address, const MCDisassembler *Decoder)
static const unsigned GPR32DecoderTable[]
static const unsigned GPRDecoderTable[]
static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t, const MCDisassembler *)
static MCDisassembler * createBPFDisassembler(const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t, const MCDisassembler *)
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:135
uint64_t Size
IRTranslator LLVM IR MI
support::ulittle16_t & Lo
Definition: aarch32.cpp:206
support::ulittle16_t & Hi
Definition: aarch32.cpp:205
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
This class represents an Operation in the Expression.
Context object for machine code objects.
Definition: MCContext.h:81
Superclass for all disassemblers.
DecodeStatus
Ternary decode status.
virtual DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &CStream) const =0
Returns the disassembly of a single instruction.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:134
static MCOperand createImm(int64_t Val)
Definition: MCInst.h:141
Generic base class for all target subtargets.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
Target - Wrapper for Target specific information.
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
NodeAddr< InstrNode * > Instr
Definition: RDFGraph.h:389
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:456
Target & getTheBPFleTarget()
Target & getTheBPFbeTarget()
Target & getTheBPFTarget()
constexpr uint64_t Make_64(uint32_t High, uint32_t Low)
Make a 64-bit integer from a high / low pair of 32-bit integers.
Definition: MathExtras.h:146
static void RegisterMCDisassembler(Target &T, Target::MCDisassemblerCtorTy Fn)
RegisterMCDisassembler - Register a MCDisassembler implementation for the given target.