LLVM
13.0.0git
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#include "ARMBaseInstrInfo.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "TargetInfo/ARMTargetInfo.h"
#include "Utils/ARMBaseInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <vector>
#include "ARMGenDisassemblerTables.inc"
Go to the source code of this file.
Namespaces | |
llvm | |
Macros | |
#define | DEBUG_TYPE "arm-disassembler" |
Typedefs | |
using | DecodeStatus = MCDisassembler::DecodeStatus |
typedef DecodeStatus | OperandDecoder(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
Functions | |
static bool | Check (DecodeStatus &Out, DecodeStatus In) |
static DecodeStatus | DecodeGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCLRMGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodetGPROddRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodetGPREvenRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRwithAPSR_NZCVnospRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRnopcRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRwithAPSRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRwithZRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRwithZRnospRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodetGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodetcGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecoderGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRPairnospRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeGPRspRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeHPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPR_8RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSPR_8RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPR_VFP2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeQQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeQQQQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPairSpacedRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodePredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCCOutOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBitfieldMaskOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCopMemInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode2IdxInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSORegMemOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode3Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSORegImmOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSORegRegOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMemMultipleWritebackInstruction (MCInst &Inst, unsigned Insn, uint64_t Adddress, const void *Decoder) |
static DecodeStatus | DecodeT2MOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeArmMOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSMLAInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeHINTInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeTSTInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSETPANInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2CPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrModeImm12Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode5Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode5FP16Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode7Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2BInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBranchImmInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeAddrMode6Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST1Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST2Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST3Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDST4Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLDInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVSTInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD1DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD2DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD3DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD4DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVMOVModImmInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMVEModImmInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMVEVADCInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVSHLMaxInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight8Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight16Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight32Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeShiftRight64Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeTBLInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodePostIdxReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMveAddrModeRQ (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
template<int shift> | |
static DecodeStatus | DecodeMveAddrModeQ (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeCoprocessor (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMemBarrierOption (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeInstSyncBarrierOption (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMSRMask (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBankedReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDoubleRegLoad (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeDoubleRegStore (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLDRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLDRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSTRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSTRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVLD4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVST4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVMOVSRR (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVMOVRRS (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeSwap (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVCVTD (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVCVTQ (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVCVTImmOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeNEONComplexLane64Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddSpecialReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2BROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbCmpBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModeRR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModeIS (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModePC (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddrModeSP (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeSOReg (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadShift (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadImm8 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadImm12 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadT (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LoadLabel (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Imm8S4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Imm7S4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm8s4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm7s4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm0_1020s4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Imm8 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
template<int shift> | |
static DecodeStatus | DecodeT2Imm7 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm8 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
template<int shift> | |
static DecodeStatus | DecodeTAddrModeImm7 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
template<int shift, int WriteBack> | |
static DecodeStatus | DecodeT2AddrModeImm7 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddSPImm (MCInst &Inst, uint16_t Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbAddSPReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbCPS (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeQADDInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBLXOffset (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddrModeImm12 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbTableBranch (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumb2BCCInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2SOImm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBCCTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeThumbBLTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeIT (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LDRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2STRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Adr (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2LdStPre (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2ShifterImmOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLDR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecoderForMRRC2AndMCRR2 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeForVMRSandVMSR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
template<bool isSigned, bool isNeg, bool zeroPermitted, int size> | |
static DecodeStatus | DecodeBFLabelOperand (MCInst &Inst, unsigned val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeBFAfterTargetOperand (MCInst &Inst, unsigned val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodePredNoALOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLOLoop (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeLongShiftOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVSCCLRM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVPTMaskOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeVpredROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRestrictedIPredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRestrictedSPredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRestrictedUPredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeRestrictedFPPredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
template<bool Writeback> | |
static DecodeStatus | DecodeVSTRVLDR_SYSREG (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
template<int shift> | |
static DecodeStatus | DecodeMVE_MEM_1_pre (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
template<int shift> | |
static DecodeStatus | DecodeMVE_MEM_2_pre (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
template<int shift> | |
static DecodeStatus | DecodeMVE_MEM_3_pre (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
template<unsigned MinLog, unsigned MaxLog> | |
static DecodeStatus | DecodePowerTwoOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
template<unsigned start> | |
static DecodeStatus | DecodeMVEPairVectorIndexOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMVEVMOVQtoDReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMVEVMOVDRegtoQ (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMVEVCVTt1fp (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
template<bool scalar, OperandDecoder predicate_decoder> | |
static DecodeStatus | DecodeMVEVCMP (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMveVCTP (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMVEVPNOT (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeMVEOverlappingLongShift (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2AddSubSPImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static MCDisassembler * | createARMDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
static DecodeStatus | checkDecodedInstruction (MCInst &MI, uint64_t &Size, uint64_t Address, raw_ostream &CS, uint32_t Insn, DecodeStatus Result) |
static bool | tryAddingSymbolicOperand (uint64_t Address, int32_t Value, bool isBranch, uint64_t InstSize, MCInst &MI, const void *Decoder) |
tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst. More... | |
static void | tryAddingPcLoadReferenceComment (uint64_t Address, int Value, const void *Decoder) |
tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc. More... | |
static void | AddThumb1SBit (MCInst &MI, bool InITBlock) |
static bool | isVectorPredicable (unsigned Opcode) |
LLVM_EXTERNAL_VISIBILITY void | LLVMInitializeARMDisassembler () |
static DecodeStatus | DecodeRFEInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2Adr (MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) |
static DecodeStatus | DecodeT2ShifterImmOperand (MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) |
static unsigned | FixedRegForVSTRVLDR_SYSREG (unsigned Opcode) |
static DecodeStatus | DecodeMVE_MEM_pre (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder, unsigned Rn, OperandDecoder RnDecoder, OperandDecoder AddrDecoder) |
Variables | |
static const uint16_t | GPRDecoderTable [] |
static const uint16_t | CLRMGPRDecoderTable [] |
static const uint16_t | GPRPairDecoderTable [] |
static const uint16_t | SPRDecoderTable [] |
static const uint16_t | DPRDecoderTable [] |
static const uint16_t | QPRDecoderTable [] |
static const uint16_t | DPairDecoderTable [] |
static const uint16_t | DPairSpacedDecoderTable [] |
static const uint16_t | QQPRDecoderTable [] |
static const uint16_t | QQQQPRDecoderTable [] |
#define DEBUG_TYPE "arm-disassembler" |
Definition at line 34 of file ARMDisassembler.cpp.
Definition at line 36 of file ARMDisassembler.cpp.
typedef DecodeStatus OperandDecoder(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
Definition at line 558 of file ARMDisassembler.cpp.
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static |
Definition at line 731 of file ARMDisassembler.cpp.
References llvm::ARMInsts, llvm::MCOperand::createReg(), i, I, MI, llvm::MCInstrDesc::NumOperands, and llvm::MCInstrDesc::OpInfo.
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static |
Definition at line 160 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::tgtok::In, llvm_unreachable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrModeImm12Operand(), DecodeArmMOVTWInstruction(), DecodeBitfieldMaskOperand(), DecodeBranchImmInstruction(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeDPRRegListOperand(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeGPRwithZRnospRegisterClass(), DecodeGPRwithZRRegisterClass(), DecodeHINTInstruction(), DecodeLDR(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeLOLoop(), DecodeMemMultipleWritebackInstruction(), DecodeMVE_MEM_pre(), DecodeMveAddrModeQ(), DecodeMveAddrModeRQ(), DecodeMVEModImmInstruction(), DecodeMVEOverlappingLongShift(), DecodeMVEVADCInstruction(), DecodeMVEVCMP(), DecodeMveVCTP(), DecodeMVEVCVTt1fp(), DecodeMVEVMOVDRegtoQ(), DecodeMVEVMOVQtoDReg(), DecodeNEONComplexLane64Instruction(), DecodePostIdxReg(), DecodePredicateOperand(), DecodeQADDInstruction(), DecodeRegListOperand(), DecodeRFEInstruction(), DecoderForMRRC2AndMCRR2(), DecoderGPRRegisterClass(), DecodeSMLAInstruction(), DecodeSORegImmOperand(), DecodeSORegMemOperand(), DecodeSORegRegOperand(), DecodeSPRRegListOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeT2AddrModeImm0_1020s4(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm7(), DecodeT2AddrModeImm7s4(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2AddSubSPImm(), DecodeT2LDRDPreInstruction(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2STRDPreInstruction(), DecodeTAddrModeImm7(), DecodeTBLInstruction(), DecodeThumb2BCCInstruction(), DecodeThumbAddrModeIS(), DecodeThumbAddrModeRR(), DecodeThumbAddSpecialReg(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVCVTD(), DecodeVCVTQ(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVModImmInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVSCCLRM(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), DecodeVSTInstruction(), and DecodeVSTRVLDR_SYSREG().
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Definition at line 582 of file ARMDisassembler.cpp.
References Cond, llvm::MCDisassembler::Fail, MI, and llvm::MCDisassembler::SoftFail.
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Definition at line 575 of file ARMDisassembler.cpp.
Referenced by LLVMInitializeARMDisassembler().
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Definition at line 1844 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::Address, llvm::ARM_AM::asr, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRnopcRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, P, pred, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, S, llvm::MCDisassembler::SoftFail, llvm::ARM_AM::sub, llvm::MCDisassembler::Success, and llvm::RISCVFenceField::W.
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Definition at line 1993 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, llvm::ARMISD::LDRD, P, pred, S, llvm::MCDisassembler::SoftFail, llvm::ARMISD::STRD, llvm::MCDisassembler::Success, and llvm::RISCVFenceField::W.
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Definition at line 2607 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5FP16Opc(), S, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 2587 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), S, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 2685 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
Referenced by DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 2627 of file ARMDisassembler.cpp.
References llvm::Address, and DecodeGPRRegisterClass().
Referenced by DecodeLDR().
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Definition at line 2567 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, S, llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
Referenced by DecodeLDRPreImm(), and DecodeSTRPreImm().
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Definition at line 2463 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), pred, S, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4755 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 5978 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 5959 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, S, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 1638 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check(), llvm::MCOperand::createImm(), S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2660 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, S, llvm::MCInst::setOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 1461 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddSubSPImm().
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Definition at line 1143 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), CLRMGPRDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeRegListOperand().
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Definition at line 1665 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, pred, S, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 4515 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isValidCoprocessorNumber(), and llvm::MCDisassembler::Success.
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Definition at line 2350 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, M, mode, S, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeQADDInstruction(), DecodeSMLAInstruction(), and DecodeSwap().
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Definition at line 4770 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4791 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRnopcRegisterClass(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1411 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPairDecoderTable, llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeTBLInstruction(), DecodeVLD1DupInstruction(), DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1432 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPairSpacedDecoderTable, llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1362 of file ARMDisassembler.cpp.
References llvm::Address, DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1377 of file ARMDisassembler.cpp.
References llvm::Address, DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1347 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPRDecoderTable, llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeDPR_8RegisterClass(), DecodeDPR_VFP2RegisterClass(), DecodeDPRRegListOperand(), DecodeNEONComplexLane64Instruction(), DecodeTBLInstruction(), DecodeVCVTD(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVModImmInstruction(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 1613 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, i, llvm::max(), llvm::min(), S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeVSCCLRM().
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Definition at line 5907 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::ARMCC::AL, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRnopcRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARMISD::FMSTAT, llvm::MCInst::getOpcode(), pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1158 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeArmMOVTWInstruction(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeLDR(), DecodeMveAddrModeRQ(), DecodePostIdxReg(), DecodeQADDInstruction(), DecoderForMRRC2AndMCRR2(), DecodeSMLAInstruction(), DecodeSORegRegOperand(), DecodeSwap(), DecodeT2AddrModeImm0_1020s4(), DecodeT2AddrModeImm7(), DecodeT2AddrModeImm7s4(), and DecodeVSTRVLDR_SYSREG().
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Definition at line 1242 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRPairDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1225 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRPairDecoderTable, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeDoubleRegLoad(), and DecodeDoubleRegStore().
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Definition at line 1133 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeGPRwithZRRegisterClass(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeMVEVMOVDRegtoQ(), DecodeMVEVMOVQtoDReg(), DecodeRegListOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSORegMemOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodetGPRRegisterClass(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 1255 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddSubSPImm().
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Definition at line 6095 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), GPRDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1171 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), S, and llvm::MCDisassembler::Success.
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Definition at line 1204 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRwithZRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 1186 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeGPRwithZRnospRegisterClass(), and DecodeMVEVCMP().
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Definition at line 2328 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1331 of file ARMDisassembler.cpp.
References llvm::Address, and DecodeSPRRegisterClass().
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Definition at line 4664 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 5519 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5835 of file ARMDisassembler.cpp.
References llvm::Address, Check(), Cond, DecodeAddrMode7Operand(), DecodeGPRnopcRegisterClass(), DecodePostIdxReg(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4817 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4842 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5999 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createReg(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, S, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 6061 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), S, and llvm::MCDisassembler::Success.
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Definition at line 4655 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeThumb2BCCInstruction().
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Definition at line 2236 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeRegListOperand(), DecodeRFEInstruction(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), pred, S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 6137 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeMVE_MEM_3_pre(), DecodeMVE_MEM_pre(), DecodeMveAddrModeQ(), DecodeMveAddrModeRQ(), DecodeMVEModImmInstruction(), DecodeMVEVADCInstruction(), DecodeMVEVCMP(), DecodeMVEVCVTt1fp(), DecodeMVEVMOVDRegtoQ(), and DecodeMVEVMOVQtoDReg().
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Definition at line 4673 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, llvm::BitmaskEnumDetail::Mask(), S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 6399 of file ARMDisassembler.cpp.
References llvm::Address, DecodeMVE_MEM_pre(), and DecodetGPRRegisterClass().
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Definition at line 6408 of file ARMDisassembler.cpp.
References llvm::Address, DecodeMVE_MEM_pre(), and DecoderGPRRegisterClass().
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Definition at line 6417 of file ARMDisassembler.cpp.
References llvm::Address, DecodeMQPRRegisterClass(), and DecodeMVE_MEM_pre().
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Definition at line 6379 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
Referenced by DecodeMVE_MEM_1_pre(), DecodeMVE_MEM_2_pre(), and DecodeMVE_MEM_3_pre().
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Definition at line 4469 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, S, shift, and llvm::MCDisassembler::Success.
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Definition at line 4454 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRnopcRegisterClass(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 3528 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::ARMVCC::None, S, and llvm::MCDisassembler::Success.
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Definition at line 6497 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecoderGPRRegisterClass(), DecodetGPREvenRegisterClass(), DecodetGPROddRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm_unreachable, S, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 6439 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), S, and llvm::MCDisassembler::Success.
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Definition at line 3556 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 6596 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRwithZRRegisterClass(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARMVCC::None, S, and llvm::MCDisassembler::Success.
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Definition at line 6633 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createReg(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 6576 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeMQPRRegisterClass(), DecodeVCVTImmOperand(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 6472 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, index, S, and llvm::MCDisassembler::Success.
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Definition at line 6449 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, index, S, and llvm::MCDisassembler::Success.
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Definition at line 6643 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), S, and llvm::MCDisassembler::Success.
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Definition at line 5802 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, rotate, S, and llvm::MCDisassembler::Success.
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Definition at line 4441 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
Referenced by DecodeLDR().
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Definition at line 6426 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 1444 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARMCC::AL, llvm::ARMInsts, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInstrDesc::isPredicable(), S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeArmMOVTWInstruction(), DecodeBranchImmInstruction(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeHINTInstruction(), DecodeLDR(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeQADDInstruction(), DecodeSMLAInstruction(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeThumb2BCCInstruction(), DecodeTSTInstruction(), DecodeVMOVRRS(), and DecodeVMOVSRR().
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Definition at line 5990 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARMCC::AL, llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2213 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, S, and llvm::MCDisassembler::Success.
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Definition at line 1391 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeNEONComplexLane64Instruction(), DecodeVCVTQ(), DecodeVMOVModImmInstruction(), and DecodeVSHLMaxInstruction().
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Definition at line 6153 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QQPRDecoderTable, and llvm::MCDisassembler::Success.
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Definition at line 6169 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QQQQPRDecoderTable, and llvm::MCDisassembler::Success.
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Definition at line 1542 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeCLRMGPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCInst::end(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), i, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMultipleWritebackInstruction().
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Definition at line 6262 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::ARMCC::EQ, llvm::MCDisassembler::Fail, llvm::ARMCC::GE, llvm::ARMCC::GT, llvm::ARMCC::LE, llvm::ARMCC::LT, llvm::ARMCC::NE, and llvm::MCDisassembler::Success.
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Definition at line 6223 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::ARMCC::EQ, llvm::ARMCC::NE, and llvm::MCDisassembler::Success.
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Definition at line 6231 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::ARMCC::GE, llvm::ARMCC::GT, llvm::ARMCC::LE, llvm::ARMCC::LT, llvm::MCDisassembler::Success, and x3.
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Definition at line 6254 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::ARMCC::HI, llvm::ARMCC::HS, and llvm::MCDisassembler::Success.
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Definition at line 2184 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::ARM_AM::da, llvm::ARM_AM::db, DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::ia, llvm::ARM_AM::ib, mode, S, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMultipleWritebackInstruction().
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Definition at line 5862 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1296 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeLOLoop(), DecodeMVE_MEM_2_pre(), DecodeMVEOverlappingLongShift(), DecodeMveVCTP(), DecodeSORegImmOperand(), DecodeT2AddrModeImm7(), DecodeT2AddrModeSOReg(), DecodeT2Adr(), DecodeT2LDRDPreInstruction(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2STRDPreInstruction(), and DecodeThumbTableBranch().
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Definition at line 2539 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), S, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeTSTInstruction().
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Definition at line 3606 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3612 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3618 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3600 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 2490 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, S, and llvm::MCDisassembler::Success.
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Definition at line 1470 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::ARM_AM::asr, Check(), llvm::MCOperand::createImm(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, S, Shift, and llvm::MCDisassembler::Success.
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Definition at line 1949 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::Address, llvm::ARM_AM::asr, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, S, shift, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
Referenced by DecodeLDRPreReg(), and DecodeSTRPreReg().
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Definition at line 1507 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::ARM_AM::asr, Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, S, Shift, and llvm::MCDisassembler::Success.
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Definition at line 1369 of file ARMDisassembler.cpp.
References llvm::Address, DecodeSPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1321 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, SPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeHPRRegisterClass(), DecodeSPR_8RegisterClass(), DecodeSPRRegListOperand(), DecodeVMOVRRS(), and DecodeVMOVSRR().
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Definition at line 1589 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, i, llvm::max(), S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeVSCCLRM().
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Definition at line 4869 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4894 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5657 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4183 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 4368 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
Referenced by DecodeT2LoadImm12().
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Definition at line 4289 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRnopcRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 4167 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRnopcRegisterClass(), DecodeT2Imm7S4(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
Referenced by DecodeVSTRVLDR_SYSREG().
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Definition at line 4225 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodeT2Imm8(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
Referenced by DecodeT2LdStPre(), DecodeT2LoadImm8(), and DecodeT2LoadT().
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Definition at line 4152 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodeT2Imm8S4(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
Referenced by DecodeT2LDRDPreInstruction(), and DecodeT2STRDPreInstruction().
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Definition at line 3755 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
Referenced by DecodeT2LoadShift().
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Definition at line 6651 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeCCOutOperand(), DecodeGPRspRegisterClass(), DecodeT2SOImm(), llvm::SIInstrFlags::DS, llvm::MCDisassembler::Fail, S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 5620 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getNumOperands(), S, and llvm::MCInst::setOpcode().
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Definition at line 2633 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), S, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3692 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by DecodeThumb2BCCInstruction().
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Definition at line 2397 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, M, mode, S, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4211 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), shift, and llvm::MCDisassembler::Success.
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Definition at line 4137 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm7s4().
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Definition at line 4198 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm8().
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Definition at line 4123 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm8s4().
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Definition at line 5549 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, P, S, llvm::MCDisassembler::SoftFail, llvm::MCDisassembler::Success, and llvm::RISCVFenceField::W.
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Definition at line 4307 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), load, S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3951 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm12(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3867 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::Address, Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4070 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadShift(), and DecodeT2LoadT().
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Definition at line 3784 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeSOReg(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4031 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 2439 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 5646 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 4591 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddSubSPImm().
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Definition at line 5586 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, P, S, llvm::MCDisassembler::SoftFail, llvm::MCDisassembler::Success, and llvm::RISCVFenceField::W.
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Definition at line 4272 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 3624 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), op, S, llvm::MCDisassembler::Success, and llvm::ARMISD::VTBL2.
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Definition at line 1266 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, R2, and llvm::MCDisassembler::Success.
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Definition at line 6084 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeMVEOverlappingLongShift().
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Definition at line 6074 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeMVEOverlappingLongShift().
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Definition at line 1213 of file ARMDisassembler.cpp.
References llvm::Address, DecodeGPRRegisterClass(), and llvm::MCDisassembler::Fail.
Referenced by DecodeMVE_MEM_1_pre(), DecodeTAddrModeImm7(), DecodeThumbAddrModeIS(), DecodeThumbAddrModeRR(), and DecodeThumbAddSpecialReg().
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Definition at line 4549 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeMemBarrierOption(), DecodePredicateOperand(), DecodeT2BROperand(), llvm::MCDisassembler::Fail, pred, S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3723 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 3737 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
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Definition at line 3708 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 3747 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 3660 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
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Definition at line 4394 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 4405 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
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Definition at line 4623 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4631 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), S, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4491 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), S, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3684 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3700 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4430 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 4531 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2518 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSETPANInstruction(), llvm::MCDisassembler::Fail, S, and llvm::MCDisassembler::Success.
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Definition at line 5684 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeVMOVModImmInstruction(), llvm::MCDisassembler::Fail, op, S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 6293 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
Referenced by DecodeMVEVCVTt1fp().
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Definition at line 5743 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeQPRRegisterClass(), DecodeVMOVModImmInstruction(), llvm::MCDisassembler::Fail, op, S, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3299 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 4919 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, index, S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 3346 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5051 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, inc, index, S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 3394 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, inc, S, and llvm::MCDisassembler::Success.
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Definition at line 5181 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, inc, index, S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 3429 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, inc, S, llvm::size(), llvm::MCDisassembler::Success, and x3.
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Definition at line 5314 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, inc, index, S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 2702 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, S, and llvm::MCDisassembler::Success.
Referenced by DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
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Definition at line 2978 of file ARMDisassembler.cpp.
References llvm::Address, align, DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, and load.
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Definition at line 2991 of file ARMDisassembler.cpp.
References llvm::Address, align, DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, load, and llvm::size().
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Definition at line 3006 of file ARMDisassembler.cpp.
References llvm::Address, align, DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, load, and llvm::size().
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Definition at line 3019 of file ARMDisassembler.cpp.
References llvm::Address, DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, load, and llvm::size().
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Definition at line 3482 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
Referenced by DecodeVCVTD(), and DecodeVCVTQ().
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Definition at line 5493 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5467 of file ARMDisassembler.cpp.
References llvm::Address, Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, pred, S, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 6211 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::Success.
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Definition at line 6180 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), i, S, and llvm::MCDisassembler::Success.
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Definition at line 6111 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::ARMCC::AL, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegListOperand(), DecodeSPRRegListOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
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Definition at line 3581 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 4986 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, index, S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5118 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, inc, index, S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5251 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, inc, index, S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5395 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, align, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, inc, index, S, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 3029 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
Referenced by DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
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Definition at line 6336 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::ARMCC::AL, Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRnopcRegisterClass(), DecodeT2AddrModeImm7s4(), llvm::MCDisassembler::Fail, FixedRegForVSTRVLDR_SYSREG(), llvm::MCInst::getOpcode(), S, and llvm::MCDisassembler::Success.
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Definition at line 6321 of file ARMDisassembler.cpp.
Referenced by DecodeVSTRVLDR_SYSREG().
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Definition at line 747 of file ARMDisassembler.cpp.
References llvm::ARMInsts, i, llvm::ARM::isVpred(), llvm::MCInstrDesc::NumOperands, and llvm::MCInstrDesc::OpInfo.
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMDisassembler | ( | ) |
Definition at line 1108 of file ARMDisassembler.cpp.
References createARMDisassembler(), llvm::getTheARMBETarget(), llvm::getTheARMLETarget(), llvm::getTheThumbBETarget(), llvm::getTheThumbLETarget(), and llvm::TargetRegistry::RegisterMCDisassembler().
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tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc.
These can often be values in a literal pool near the Address of the instruction. The Address of the instruction and its immediate Value are used as a possible literal pool entry. The SymbolLookUp call back will return the name of a symbol referenced by the literal pool's entry if the referenced address is that of a symbol. Or it will return a pointer to a literal 'C' string if the referenced address of the literal pool's entry is an address into a section with 'C' string literals.
Definition at line 721 of file ARMDisassembler.cpp.
References llvm::Address, and llvm::MCDisassembler::tryAddingPcLoadReferenceComment().
Referenced by DecodeAddrModeImm12Operand(), and DecodeThumbAddrModePC().
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tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst.
The immediate Value has had any PC adjustment made by the caller. If the instruction is a branch instruction then isBranch is true, else false. If the getOpInfo() function was set as part of the setupForSymbolicDisassembly() call then that function is called to get any symbolic information at the Address for this instruction. If that returns non-zero then the symbolic information it returns is used to create an MCExpr and that is added as an operand to the MCInst. If getOpInfo() returns zero and isBranch is true then a symbol look up for Value is done and if a symbol is found an MCExpr is created with that, else an MCExpr with Value is created. This function returns true if it adds an operand to the MCInst and false otherwise.
Definition at line 703 of file ARMDisassembler.cpp.
References llvm::Address, isBranch(), MI, and llvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced by DecodeArmMOVTWInstruction(), DecodeBFAfterTargetOperand(), DecodeBFLabelOperand(), DecodeBranchImmInstruction(), DecodeT2BInstruction(), DecodeT2BROperand(), DecodeT2MOVTWInstruction(), DecodeThumbBCCTargetOperand(), DecodeThumbBLTargetOperand(), DecodeThumbBLXOffset(), DecodeThumbBROperand(), and DecodeThumbCmpBROperand().
Definition at line 1126 of file ARMDisassembler.cpp.
Referenced by DecodeCLRMGPRRegisterClass().
Definition at line 1402 of file ARMDisassembler.cpp.
Referenced by DecodeDPairRegisterClass().
Definition at line 1421 of file ARMDisassembler.cpp.
Referenced by DecodeDPairSpacedRegisterClass().
Definition at line 1336 of file ARMDisassembler.cpp.
Referenced by DecodeDPRRegisterClass().
Definition at line 1119 of file ARMDisassembler.cpp.
Referenced by DecodeGPRRegisterClass(), DecodeGPRspRegisterClass(), DecodeGPRwithAPSR_NZCVnospRegisterClass(), DecodetGPREvenRegisterClass(), and DecodetGPROddRegisterClass().
Definition at line 1220 of file ARMDisassembler.cpp.
Referenced by DecodeGPRPairnospRegisterClass(), and DecodeGPRPairRegisterClass().
Definition at line 1384 of file ARMDisassembler.cpp.
Referenced by DecodeMQPRRegisterClass(), and DecodeQPRRegisterClass().
Definition at line 6148 of file ARMDisassembler.cpp.
Referenced by DecodeQQPRRegisterClass().
Definition at line 6164 of file ARMDisassembler.cpp.
Referenced by DecodeQQQQPRRegisterClass().
Definition at line 1310 of file ARMDisassembler.cpp.
Referenced by DecodeSPRRegisterClass().