RISCVDisassembler.cpp File Reference

#include "MCTargetDesc/RISCVBaseInfo.h"
#include "MCTargetDesc/RISCVMCTargetDesc.h"
#include "TargetInfo/RISCVTargetInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoder.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Endian.h"
#include "RISCVGenDisassemblerTables.inc"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "riscv-disassembler"

Functions
static MCDisassembler *	createRISCVDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
LLVM_ABI LLVM_EXTERNAL_VISIBILITY void	LLVMInitializeRISCVDisassembler ()
template<unsigned FirstReg, unsigned NumRegsInClass, unsigned RVELimit = 0>
static DecodeStatus	DecodeSimpleRegisterClass (MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeGPRX1X5RegisterClass (MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeGPRX1RegisterClass (MCInst &Inst, const MCDisassembler *Decoder)
static DecodeStatus	DecodeSPRegisterClass (MCInst &Inst, const MCDisassembler *Decoder)
static DecodeStatus	DecodeSPRegisterClass (MCInst &Inst, uint64_t RegNo, uint32_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeGPRX5RegisterClass (MCInst &Inst, const MCDisassembler *Decoder)
template<auto DecodeFn, auto PredicateFn>
static DecodeStatus	DecodeFilteredRegisterClass (MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
constexpr bool	PredNoX0 (uint32_t RegNo)
constexpr bool	PredNoX2 (uint32_t RegNo)
constexpr bool	PredNoX31 (uint32_t RegNo)
static DecodeStatus	DecodeGPRPairRegisterClass (MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeGPRPairCRegisterClass (MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeSR07RegisterClass (MCInst &Inst, uint32_t RegNo, uint64_t Address, const void *Decoder)
template<unsigned RegisterClass, unsigned NumRegsInClass, unsigned LMul>
static DecodeStatus	DecodeVectorRegisterClass (MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeTRM2RegisterClass (MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeTRM4RegisterClass (MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	DecodeYBNDSWImm (MCInst &Inst, uint64_t Imm, int64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeVMaskReg (MCInst &Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeImmThreeOperand (MCInst &Inst, const MCDisassembler *Decoder)
static DecodeStatus	decodeImmFourOperand (MCInst &Inst, const MCDisassembler *Decoder)
template<unsigned N>
static DecodeStatus	decodeUImmOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
template<unsigned Width, unsigned LowerBound>
static DecodeStatus	decodeUImmOperandGE (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
template<unsigned Width, unsigned LowerBound>
static DecodeStatus	decodeUImmPlus1OperandGE (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeUImmSlistOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeUImmLog2XLenOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeUImm7EqXLenOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
template<unsigned N>
static DecodeStatus	decodeUImmNonZeroOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeUImmLog2XLenNonZeroOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
template<unsigned N>
static DecodeStatus	decodeUImmPlus1Operand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeImmZibiOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
template<unsigned N>
static DecodeStatus	decodeSImmOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
template<unsigned N>
static DecodeStatus	decodeSImmNonZeroOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
template<unsigned T, unsigned N>
static DecodeStatus	decodeSImmOperandAndLslN (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeCLUIImmOperand (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeFRMArg (MCInst &Inst, uint32_t Imm, int64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeZcmpRlist (MCInst &Inst, uint32_t Imm, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus	decodeXqccmpRlistS0 (MCInst &Inst, uint32_t Imm, uint64_t Address, const MCDisassembler *Decoder)

Variables
constexpr auto	DecodeGPRRegisterClass
constexpr auto	DecodeGPRNoX0RegisterClass
constexpr auto	DecodeGPRNoX2RegisterClass
constexpr auto	DecodeGPRNoX31RegisterClass
constexpr auto	DecodeGPRPairNoX0RegisterClass
static constexpr FeatureBitset	XCVFeatureGroup
static constexpr FeatureBitset	XRivosFeatureGroup
static constexpr FeatureBitset	XqciFeatureGroup
static constexpr FeatureBitset	XSfVectorGroup
static constexpr FeatureBitset	XSfSystemGroup
static constexpr FeatureBitset	XMIPSGroup
static constexpr FeatureBitset	XTHeadGroup
static constexpr FeatureBitset	XAndesGroup
static constexpr FeatureBitset	XSMTGroup = {RISCV::FeatureVendorXSMTVDot}
static constexpr FeatureBitset	XAIFGroup = {RISCV::FeatureVendorXAIFET}
static constexpr DecoderListEntry	DecoderList32 []
static constexpr DecoderListEntry	DecoderList16 []
static constexpr DecoderListEntry	DecoderList48 []

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "riscv-disassembler"

Definition at line 31 of file RISCVDisassembler.cpp.

Function Documentation

createRISCVDisassembler()

MCDisassembler * createRISCVDisassembler ( const Target & T, const MCSubtargetInfo & STI, MCContext & Ctx )

static

Definition at line 62 of file RISCVDisassembler.cpp.

References T.

Referenced by LLVMInitializeRISCVDisassembler().

decodeCLUIImmOperand()

DecodeStatus decodeCLUIImmOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 427 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isUInt(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.

DecodeFilteredRegisterClass()

template<auto DecodeFn, auto PredicateFn>

DecodeStatus DecodeFilteredRegisterClass ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 137 of file RISCVDisassembler.cpp.

References llvm::MCDisassembler::Fail.

decodeFRMArg()

DecodeStatus decodeFRMArg ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 438 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isUInt(), llvm::RISCVFPRndMode::isValidRoundingMode(), and llvm::MCDisassembler::Success.

DecodeGPRPairCRegisterClass()

DecodeStatus DecodeGPRPairCRegisterClass ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 175 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCRegisterInfo::getMatchingSuperReg(), Reg, and llvm::MCDisassembler::Success.

DecodeGPRPairRegisterClass()

DecodeStatus DecodeGPRPairRegisterClass ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 156 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCRegisterInfo::getMatchingSuperReg(), Reg, and llvm::MCDisassembler::Success.

DecodeGPRX1RegisterClass()

DecodeStatus DecodeGPRX1RegisterClass ( MCInst & Inst, const MCDisassembler * Decoder )

static

Definition at line 110 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.

DecodeGPRX1X5RegisterClass()

DecodeStatus DecodeGPRX1X5RegisterClass ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 99 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

DecodeGPRX5RegisterClass()

DecodeStatus DecodeGPRX5RegisterClass ( MCInst & Inst, const MCDisassembler * Decoder )

static

Definition at line 130 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.

decodeImmFourOperand()

DecodeStatus decodeImmFourOperand ( MCInst & Inst, const MCDisassembler * Decoder )

static

Definition at line 285 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

decodeImmThreeOperand()

DecodeStatus decodeImmThreeOperand ( MCInst & Inst, const MCDisassembler * Decoder )

static

Definition at line 279 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

decodeImmZibiOperand()

DecodeStatus decodeImmZibiOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 388 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), and llvm::MCDisassembler::Success.

decodeSImmNonZeroOperand()

template<unsigned N>

DecodeStatus decodeSImmNonZeroOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 407 of file RISCVDisassembler.cpp.

References decodeSImmOperand(), and llvm::MCDisassembler::Fail.

decodeSImmOperand()

template<unsigned N>

DecodeStatus decodeSImmOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 397 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.

Referenced by decodeSImmNonZeroOperand().

decodeSImmOperandAndLslN()

template<unsigned T, unsigned N>

DecodeStatus decodeSImmOperandAndLslN ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 416 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), N, llvm::SignExtend64(), and llvm::MCDisassembler::Success.

DecodeSimpleRegisterClass()

template<unsigned FirstReg, unsigned NumRegsInClass, unsigned RVELimit = 0>

DecodeStatus DecodeSimpleRegisterClass ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 82 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::getSubtargetInfo(), llvm::MCSubtargetInfo::hasFeature(), Reg, and llvm::MCDisassembler::Success.

DecodeSPRegisterClass() [1/2]

DecodeStatus DecodeSPRegisterClass ( MCInst & Inst, const MCDisassembler * Decoder )

static

Definition at line 116 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.

DecodeSPRegisterClass() [2/2]

DecodeStatus DecodeSPRegisterClass ( MCInst & Inst, uint64_t RegNo, uint32_t Address, const MCDisassembler * Decoder )

static

Definition at line 122 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.

DecodeSR07RegisterClass()

DecodeStatus DecodeSR07RegisterClass ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const void * Decoder )

static

Definition at line 191 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

DecodeTRM2RegisterClass()

DecodeStatus DecodeTRM2RegisterClass ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 220 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

DecodeTRM4RegisterClass()

DecodeStatus DecodeTRM4RegisterClass ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 231 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

decodeUImm7EqXLenOperand()

DecodeStatus decodeUImm7EqXLenOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 348 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::getSubtargetInfo(), llvm::MCSubtargetInfo::hasFeature(), llvm::isUInt(), and llvm::MCDisassembler::Success.

decodeUImmLog2XLenNonZeroOperand()

DecodeStatus decodeUImmLog2XLenNonZeroOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 372 of file RISCVDisassembler.cpp.

References decodeUImmLog2XLenOperand(), and llvm::MCDisassembler::Fail.

decodeUImmLog2XLenOperand()

DecodeStatus decodeUImmLog2XLenOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 335 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::getSubtargetInfo(), llvm::MCSubtargetInfo::hasFeature(), llvm::isUInt(), and llvm::MCDisassembler::Success.

Referenced by decodeUImmLog2XLenNonZeroOperand().

decodeUImmNonZeroOperand()

template<unsigned N>

DecodeStatus decodeUImmNonZeroOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 363 of file RISCVDisassembler.cpp.

References decodeUImmOperand(), and llvm::MCDisassembler::Fail.

decodeUImmOperand()

template<unsigned N>

DecodeStatus decodeUImmOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 292 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), and llvm::MCDisassembler::Success.

Referenced by decodeUImmNonZeroOperand().

decodeUImmOperandGE()

template<unsigned Width, unsigned LowerBound>

DecodeStatus decodeUImmOperandGE ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 301 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isUInt(), and llvm::MCDisassembler::Success.

decodeUImmPlus1Operand()

template<unsigned N>

DecodeStatus decodeUImmPlus1Operand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 380 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), and llvm::MCDisassembler::Success.

decodeUImmPlus1OperandGE()

template<unsigned Width, unsigned LowerBound>

DecodeStatus decodeUImmPlus1OperandGE ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 314 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isUInt(), and llvm::MCDisassembler::Success.

decodeUImmSlistOperand()

DecodeStatus decodeUImmSlistOperand ( MCInst & Inst, uint32_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 326 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), and llvm::MCDisassembler::Success.

DecodeVectorRegisterClass()

template<unsigned RegisterClass, unsigned NumRegsInClass, unsigned LMul>

DecodeStatus DecodeVectorRegisterClass ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 203 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCRegisterInfo::getMatchingSuperReg(), Reg, and llvm::MCDisassembler::Success.

decodeVMaskReg()

DecodeStatus decodeVMaskReg ( MCInst & Inst, uint32_t RegNo, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 267 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

decodeXqccmpRlistS0()

DecodeStatus decodeXqccmpRlistS0 ( MCInst & Inst, uint32_t Imm, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 458 of file RISCVDisassembler.cpp.

References decodeZcmpRlist(), llvm::MCDisassembler::Fail, and llvm::RISCVZC::RA_S0.

DecodeYBNDSWImm()

DecodeStatus DecodeYBNDSWImm ( MCInst & Inst, uint64_t Imm, int64_t Address, const MCDisassembler * Decoder )

static

Definition at line 242 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), and llvm::MCDisassembler::Success.

decodeZcmpRlist()

DecodeStatus decodeZcmpRlist ( MCInst & Inst, uint32_t Imm, uint64_t Address, const MCDisassembler * Decoder )

static

Definition at line 448 of file RISCVDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::getSubtargetInfo(), llvm::MCSubtargetInfo::hasFeature(), llvm::RISCVZC::RA, llvm::RISCVZC::RA_S0_S2, and llvm::MCDisassembler::Success.

Referenced by decodeXqccmpRlistS0().

LLVMInitializeRISCVDisassembler()

LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVDisassembler

(

)

Definition at line 69 of file RISCVDisassembler.cpp.

References createRISCVDisassembler(), llvm::getTheRISCV32beTarget(), llvm::getTheRISCV32Target(), llvm::getTheRISCV64beTarget(), llvm::getTheRISCV64Target(), and llvm::TargetRegistry::RegisterMCDisassembler().

PredNoX0()

bool PredNoX0 ( uint32_t RegNo )

constexpr

Definition at line 145 of file RISCVDisassembler.cpp.

PredNoX2()

bool PredNoX2 ( uint32_t RegNo )

constexpr

Definition at line 146 of file RISCVDisassembler.cpp.

PredNoX31()

bool PredNoX31 ( uint32_t RegNo )

constexpr

Definition at line 147 of file RISCVDisassembler.cpp.

Variable Documentation

DecodeGPRNoX0RegisterClass

auto DecodeGPRNoX0RegisterClass

constexpr

Initial value:

=
    DecodeFilteredRegisterClass<DecodeGPRRegisterClass, PredNoX0>

Definition at line 149 of file RISCVDisassembler.cpp.

DecodeGPRNoX2RegisterClass

auto DecodeGPRNoX2RegisterClass

constexpr

Initial value:

=
    DecodeFilteredRegisterClass<DecodeGPRRegisterClass, PredNoX2>

Definition at line 151 of file RISCVDisassembler.cpp.

DecodeGPRNoX31RegisterClass

auto DecodeGPRNoX31RegisterClass

constexpr

Initial value:

=
    DecodeFilteredRegisterClass<DecodeGPRRegisterClass, PredNoX31>

Definition at line 153 of file RISCVDisassembler.cpp.

DecodeGPRPairNoX0RegisterClass

auto DecodeGPRPairNoX0RegisterClass

constexpr

Initial value:

=
    DecodeFilteredRegisterClass<DecodeGPRPairRegisterClass, PredNoX0>

Definition at line 172 of file RISCVDisassembler.cpp.

DecodeGPRRegisterClass

auto DecodeGPRRegisterClass

constexpr

Initial value:

=
    DecodeSimpleRegisterClass<RISCV::X0, 32, 16>

Definition at line 96 of file RISCVDisassembler.cpp.

Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRNoR0R1RegisterClass(), DecodeGPRnospRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeGPRwithZRRegisterClass(), DecodeLazyLoadStoreMul(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeMVEVMOVDRegtoQ(), DecodeMVEVMOVQtoDReg(), DecodeRegListOperand(), DecodeRegSeqOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSORegMemOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodetGPRRegisterClass(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().

DecoderList16

DecoderListEntry DecoderList16[]

staticconstexpr

Initial value:

{
    
    {DecoderTableXqci16, XqciFeatureGroup, "Qualcomm uC 16-bit"},
    {DecoderTableXqccmp16,
     {RISCV::FeatureVendorXqccmp},
     "Xqccmp (Qualcomm 16-bit Push/Pop & Double Move Instructions)"},
    {DecoderTableXqccmt16,
     {RISCV::FeatureVendorXqccmt},
     "Xqccmt (Qualcomm 16-bit Table Jump Instructions)"},
    {DecoderTableXwchc16, {RISCV::FeatureVendorXwchc}, "WCH QingKe XW"},
    
    
    {DecoderTableZicfiss16, {}, "Zicfiss (Shadow Stack 16-bit)"},
    {DecoderTable16, {}, "standard 16-bit instructions"},
    {DecoderTableRV32Only16, {}, "RV32-only 16-bit instructions"},
    
    {DecoderTableZcOverlap16,
     {},
     "ZcOverlap (16-bit Instructions overlapping with Zcf/Zcd)"},
}

Definition at line 601 of file RISCVDisassembler.cpp.

DecoderList32

DecoderListEntry DecoderList32[]

staticconstexpr

Initial value:

{
    
    {DecoderTableXCV32, XCVFeatureGroup, "CORE-V extensions"},
    {DecoderTableXRivos32, XRivosFeatureGroup, "Rivos"},
    {DecoderTableXqci32, XqciFeatureGroup, "Qualcomm uC Extensions"},
    {DecoderTableXVentana32,
     {RISCV::FeatureVendorXVentanaCondOps},
     "XVentanaCondOps"},
    {DecoderTableXTHead32, XTHeadGroup, "T-Head extensions"},
    {DecoderTableXSfvector32, XSfVectorGroup, "SiFive vector extensions"},
    {DecoderTableXSfsystem32, XSfSystemGroup, "SiFive system extensions"},
    {DecoderTableXSfcease32, {RISCV::FeatureVendorXSfcease}, "SiFive sf.cease"},
    {DecoderTableXMIPS32, XMIPSGroup, "Mips extensions"},
    {DecoderTableXAndes32, XAndesGroup, "Andes extensions"},
    {DecoderTableXSMT32, XSMTGroup, "SpacemiT extensions"},
    {DecoderTableXAIF32, XAIFGroup, "AI Foundry extensions"},
    
    {DecoderTable32, {}, "standard 32-bit instructions"},
    {DecoderTableRV32Only32, {}, "RV32-only standard 32-bit instructions"},
    {DecoderTableZfinx32, {}, "Zfinx (Float in Integer)"},
    {DecoderTableZdinxRV32Only32, {}, "RV32-only Zdinx (Double in Integer)"},
}

Definition at line 542 of file RISCVDisassembler.cpp.

DecoderList48

DecoderListEntry DecoderList48[]

staticconstexpr

Initial value:

{
    {DecoderTableXqci48, XqciFeatureGroup, "Qualcomm uC 48bit"},
}

Definition at line 648 of file RISCVDisassembler.cpp.

XAIFGroup

FeatureBitset XAIFGroup = {RISCV::FeatureVendorXAIFET}

staticconstexpr

Definition at line 540 of file RISCVDisassembler.cpp.

XAndesGroup

FeatureBitset XAndesGroup

staticconstexpr

Initial value:

= {
    RISCV::FeatureVendorXAndesPerf,      RISCV::FeatureVendorXAndesBFHCvt,
    RISCV::FeatureVendorXAndesVBFHCvt,   RISCV::FeatureVendorXAndesVSIntH,
    RISCV::FeatureVendorXAndesVSIntLoad, RISCV::FeatureVendorXAndesVPackFPH,
    RISCV::FeatureVendorXAndesVDot}

Definition at line 532 of file RISCVDisassembler.cpp.

XCVFeatureGroup

FeatureBitset XCVFeatureGroup

staticconstexpr

Initial value:

= {
    RISCV::FeatureVendorXCVbitmanip, RISCV::FeatureVendorXCVelw,
    RISCV::FeatureVendorXCVmac,      RISCV::FeatureVendorXCVmem,
    RISCV::FeatureVendorXCValu,      RISCV::FeatureVendorXCVsimd,
    RISCV::FeatureVendorXCVbi}

Definition at line 483 of file RISCVDisassembler.cpp.

XMIPSGroup

FeatureBitset XMIPSGroup

staticconstexpr

Initial value:

= {
    RISCV::FeatureVendorXMIPSLSP,
    RISCV::FeatureVendorXMIPSCMov,
    RISCV::FeatureVendorXMIPSCBOP,
    RISCV::FeatureVendorXMIPSEXECTL,
}

Definition at line 517 of file RISCVDisassembler.cpp.

XqciFeatureGroup

FeatureBitset XqciFeatureGroup

staticconstexpr

Initial value:

= {
    RISCV::FeatureVendorXqcia,   RISCV::FeatureVendorXqciac,
    RISCV::FeatureVendorXqcibi,  RISCV::FeatureVendorXqcibm,
    RISCV::FeatureVendorXqcicli, RISCV::FeatureVendorXqcicm,
    RISCV::FeatureVendorXqcics,  RISCV::FeatureVendorXqcicsr,
    RISCV::FeatureVendorXqciint, RISCV::FeatureVendorXqciio,
    RISCV::FeatureVendorXqcilb,  RISCV::FeatureVendorXqcili,
    RISCV::FeatureVendorXqcilia, RISCV::FeatureVendorXqcilo,
    RISCV::FeatureVendorXqcilsm, RISCV::FeatureVendorXqcisim,
    RISCV::FeatureVendorXqcisls, RISCV::FeatureVendorXqcisync,
}

Definition at line 493 of file RISCVDisassembler.cpp.

XRivosFeatureGroup

FeatureBitset XRivosFeatureGroup

staticconstexpr

Initial value:

= {
    RISCV::FeatureVendorXRivosVizip,
}

Definition at line 489 of file RISCVDisassembler.cpp.

XSfSystemGroup

FeatureBitset XSfSystemGroup

staticconstexpr

Initial value:

= {
    RISCV::FeatureVendorXSiFivecdiscarddlone,
    RISCV::FeatureVendorXSiFivecflushdlone,
}

Definition at line 512 of file RISCVDisassembler.cpp.

XSfVectorGroup

FeatureBitset XSfVectorGroup

staticconstexpr

Initial value:

= {
    RISCV::FeatureVendorXSfvcp,          RISCV::FeatureVendorXSfvqmaccdod,
    RISCV::FeatureVendorXSfvqmaccqoq,    RISCV::FeatureVendorXSfvfwmaccqqq,
    RISCV::FeatureVendorXSfvfnrclipxfqf, RISCV::FeatureVendorXSfmmbase,
    RISCV::FeatureVendorXSfvfexpa,       RISCV::FeatureVendorXSfvfexpa64e,
    RISCV::FeatureVendorXSfvfbfexp16e,   RISCV::FeatureVendorXSfvfexp16e,
    RISCV::FeatureVendorXSfvfexp32e}

Definition at line 505 of file RISCVDisassembler.cpp.

XSMTGroup

FeatureBitset XSMTGroup = {RISCV::FeatureVendorXSMTVDot}

staticconstexpr

Definition at line 538 of file RISCVDisassembler.cpp.

XTHeadGroup

FeatureBitset XTHeadGroup

staticconstexpr

Initial value:

= {
    RISCV::FeatureVendorXTHeadBa,      RISCV::FeatureVendorXTHeadBb,
    RISCV::FeatureVendorXTHeadBs,      RISCV::FeatureVendorXTHeadCondMov,
    RISCV::FeatureVendorXTHeadCmo,     RISCV::FeatureVendorXTHeadFMemIdx,
    RISCV::FeatureVendorXTHeadMac,     RISCV::FeatureVendorXTHeadMemIdx,
    RISCV::FeatureVendorXTHeadMemPair, RISCV::FeatureVendorXTHeadSync,
    RISCV::FeatureVendorXTHeadVdot}

Definition at line 524 of file RISCVDisassembler.cpp.