Go to the documentation of this file.
28 #define DEBUG_TYPE "mir-debugify"
42 assert(SP &&
"IR Debugify just created it?");
47 unsigned NextLine = SP->getLine();
66 Function *DbgValF =
M.getFunction(
"llvm.dbg.value");
71 for (
const Use &U : DbgValF->
uses()) {
72 auto *DVI = dyn_cast<DbgValueInst>(U.getUser());
73 if (!DVI || DVI->getFunction() != &
F)
75 unsigned Line = DVI->getDebugLoc().getLine();
76 assert(Line != 0 &&
"debugify should not insert line 0 locations");
77 Line2Var[Line] = DVI->getVariable();
78 if (!EarliestDVI || Line < EarliestDVI->
getDebugLoc().getLine())
80 Expr = DVI->getExpression();
99 if (
MI.isDebugInstr())
103 if (
MI.isTerminator())
107 auto InsertBeforeIt =
MI.isPHI() ? FirstNonPHIIt :
I;
110 unsigned Line =
MI.getDebugLoc().getLine();
111 if (!Line2Var.
count(Line))
120 if (MO.isReg() && MO.isDef() && MO.getReg())
121 RegDefs.push_back(&MO);
123 BuildMI(
MBB, InsertBeforeIt,
MI.getDebugLoc(), DbgValDesc,
127 if (RegDefs.empty()) {
129 BuildMI(
MBB, InsertBeforeIt,
MI.getDebugLoc(), DbgValDesc,
137 NamedMDNode *NMD =
M.getNamedMetadata(
"llvm.mir.debugify");
140 NMD =
M.getOrInsertNamedMetadata(
"llvm.mir.debugify");
141 auto addDebugifyOperand = [&](
unsigned N) {
146 addDebugifyOperand(NextLine - 1);
148 addDebugifyOperand(VarSet.
size());
151 "llvm.mir.debugify should have exactly 2 operands!");
152 auto setDebugifyOperand = [&](
unsigned Idx,
unsigned N) {
157 setDebugifyOperand(0, NextLine - 1);
159 setDebugifyOperand(1, VarSet.
size());
167 struct DebugifyMachineModule :
public ModulePass {
168 bool runOnModule(
Module &
M)
override {
170 getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
174 return applyDebugifyMetadataToMachineFunction(MMI, DIB, F);
193 "Machine Debugify Module",
false,
false)
198 return new DebugifyMachineModule();
This is an optimization pass for GlobalISel generic memory operations.
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
unsigned getNumOperands() const
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
virtual const TargetInstrInfo * getInstrInfo() const
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
void setOperand(unsigned I, MDNode *New)
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
size_type count(const_arg_type_t< KeyT > Val) const
Return 1 if the specified key is in the map, 0 otherwise.
bool applyDebugifyMetadata(Module &M, iterator_range< Module::iterator > Functions, StringRef Banner, std::function< bool(DIBuilder &, Function &)> ApplyToMF)
Add synthesized debug information to a module.
static IntegerType * getInt32Ty(LLVMContext &C)
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
void addOperand(MDNode *M)
TargetInstrInfo - Interface to description of machine instruction set.
This represents the llvm.dbg.value instruction.
static MachineOperand CreateImm(int64_t Val)
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Represent the analysis usage information of a pass.
iterator_range< use_iterator > uses()
const HexagonInstrInfo * TII
Describe properties that are true of each instruction in the target description file.
MachineOperand class - Representation of each machine instruction operand.
Class to represent integer types.
This class contains meta information specific to a module.
static Constant * get(Type *Ty, uint64_t V, bool IsSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Representation of each machine instruction.
This is an important class for using LLVM in a threaded context.
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
A Module instance is used to store all the information related to an LLVM module.
static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)
Return the first found DebugLoc that has a DILocation, given a range of instructions.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
ModulePass * createDebugifyMachineModulePass()
Creates MIR Debugify pass.
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
LLVM_NODISCARD bool empty() const
MachineFunction * getMachineFunction(const Function &F) const
Returns the MachineFunction associated to IR function F if there is one, otherwise nullptr.
COFF::MachineTypes Machine
const DebugLoc & getDebugLoc() const
Return the debug location for this node as a DebugLoc.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
INITIALIZE_PASS_BEGIN(DebugifyMachineModule, DEBUG_TYPE, "Machine Debugify Module", false, false) INITIALIZE_PASS_END(DebugifyMachineModule
AnalysisUsage & addRequired()
A Use represents the edge between a Value definition and its users.