LLVM  13.0.0git
MachineInstrBundle.cpp
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1 //===-- lib/CodeGen/MachineInstrBundle.cpp --------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
10 #include "llvm/ADT/SmallSet.h"
11 #include "llvm/ADT/SmallVector.h"
14 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/InitializePasses.h"
20 #include <utility>
21 using namespace llvm;
22 
23 namespace {
24  class UnpackMachineBundles : public MachineFunctionPass {
25  public:
26  static char ID; // Pass identification
27  UnpackMachineBundles(
28  std::function<bool(const MachineFunction &)> Ftor = nullptr)
29  : MachineFunctionPass(ID), PredicateFtor(std::move(Ftor)) {
31  }
32 
33  bool runOnMachineFunction(MachineFunction &MF) override;
34 
35  private:
36  std::function<bool(const MachineFunction &)> PredicateFtor;
37  };
38 } // end anonymous namespace
39 
42 INITIALIZE_PASS(UnpackMachineBundles, "unpack-mi-bundles",
43  "Unpack machine instruction bundles", false, false)
44 
45 bool UnpackMachineBundles::runOnMachineFunction(MachineFunction &MF) {
46  if (PredicateFtor && !PredicateFtor(MF))
47  return false;
48 
49  bool Changed = false;
50  for (MachineBasicBlock &MBB : MF) {
52  MIE = MBB.instr_end(); MII != MIE; ) {
53  MachineInstr *MI = &*MII;
54 
55  // Remove BUNDLE instruction and the InsideBundle flags from bundled
56  // instructions.
57  if (MI->isBundle()) {
58  while (++MII != MIE && MII->isBundledWithPred()) {
59  MII->unbundleFromPred();
60  for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
61  MachineOperand &MO = MII->getOperand(i);
62  if (MO.isReg() && MO.isInternalRead())
63  MO.setIsInternalRead(false);
64  }
65  }
66  MI->eraseFromParent();
67 
68  Changed = true;
69  continue;
70  }
71 
72  ++MII;
73  }
74  }
75 
76  return Changed;
77 }
78 
81  std::function<bool(const MachineFunction &)> Ftor) {
82  return new UnpackMachineBundles(std::move(Ftor));
83 }
84 
85 namespace {
86  class FinalizeMachineBundles : public MachineFunctionPass {
87  public:
88  static char ID; // Pass identification
89  FinalizeMachineBundles() : MachineFunctionPass(ID) {
91  }
92 
93  bool runOnMachineFunction(MachineFunction &MF) override;
94  };
95 } // end anonymous namespace
96 
99 INITIALIZE_PASS(FinalizeMachineBundles, "finalize-mi-bundles",
100  "Finalize machine instruction bundles", false, false)
101 
102 bool FinalizeMachineBundles::runOnMachineFunction(MachineFunction &MF) {
103  return llvm::finalizeBundles(MF);
104 }
105 
106 /// Return the first found DebugLoc that has a DILocation, given a range of
107 /// instructions. The search range is from FirstMI to LastMI (exclusive). If no
108 /// DILocation is found, then an empty location is returned.
111  for (auto MII = FirstMI; MII != LastMI; ++MII)
112  if (MII->getDebugLoc().get())
113  return MII->getDebugLoc();
114  return DebugLoc();
115 }
116 
117 /// finalizeBundle - Finalize a machine instruction bundle which includes
118 /// a sequence of instructions starting from FirstMI to LastMI (exclusive).
119 /// This routine adds a BUNDLE instruction to represent the bundle, it adds
120 /// IsInternalRead markers to MachineOperands which are defined inside the
121 /// bundle, and it copies externally visible defs and uses to the BUNDLE
122 /// instruction.
126  assert(FirstMI != LastMI && "Empty bundle?");
127  MIBundleBuilder Bundle(MBB, FirstMI, LastMI);
128 
129  MachineFunction &MF = *MBB.getParent();
132 
133  MachineInstrBuilder MIB =
134  BuildMI(MF, getDebugLoc(FirstMI, LastMI), TII->get(TargetOpcode::BUNDLE));
135  Bundle.prepend(MIB);
136 
137  SmallVector<Register, 32> LocalDefs;
138  SmallSet<Register, 32> LocalDefSet;
139  SmallSet<Register, 8> DeadDefSet;
140  SmallSet<Register, 16> KilledDefSet;
141  SmallVector<Register, 8> ExternUses;
142  SmallSet<Register, 8> ExternUseSet;
143  SmallSet<Register, 8> KilledUseSet;
144  SmallSet<Register, 8> UndefUseSet;
146  for (auto MII = FirstMI; MII != LastMI; ++MII) {
147  for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
148  MachineOperand &MO = MII->getOperand(i);
149  if (!MO.isReg())
150  continue;
151  if (MO.isDef()) {
152  Defs.push_back(&MO);
153  continue;
154  }
155 
156  Register Reg = MO.getReg();
157  if (!Reg)
158  continue;
159 
160  if (LocalDefSet.count(Reg)) {
161  MO.setIsInternalRead();
162  if (MO.isKill())
163  // Internal def is now killed.
164  KilledDefSet.insert(Reg);
165  } else {
166  if (ExternUseSet.insert(Reg).second) {
167  ExternUses.push_back(Reg);
168  if (MO.isUndef())
169  UndefUseSet.insert(Reg);
170  }
171  if (MO.isKill())
172  // External def is now killed.
173  KilledUseSet.insert(Reg);
174  }
175  }
176 
177  for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
178  MachineOperand &MO = *Defs[i];
179  Register Reg = MO.getReg();
180  if (!Reg)
181  continue;
182 
183  if (LocalDefSet.insert(Reg).second) {
184  LocalDefs.push_back(Reg);
185  if (MO.isDead()) {
186  DeadDefSet.insert(Reg);
187  }
188  } else {
189  // Re-defined inside the bundle, it's no longer killed.
190  KilledDefSet.erase(Reg);
191  if (!MO.isDead())
192  // Previously defined but dead.
193  DeadDefSet.erase(Reg);
194  }
195 
196  if (!MO.isDead() && Register::isPhysicalRegister(Reg)) {
197  for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
198  unsigned SubReg = *SubRegs;
199  if (LocalDefSet.insert(SubReg).second)
200  LocalDefs.push_back(SubReg);
201  }
202  }
203  }
204 
205  Defs.clear();
206  }
207 
209  for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) {
210  Register Reg = LocalDefs[i];
211  if (Added.insert(Reg).second) {
212  // If it's not live beyond end of the bundle, mark it dead.
213  bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg);
214  MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) |
215  getImplRegState(true));
216  }
217  }
218 
219  for (unsigned i = 0, e = ExternUses.size(); i != e; ++i) {
220  Register Reg = ExternUses[i];
221  bool isKill = KilledUseSet.count(Reg);
222  bool isUndef = UndefUseSet.count(Reg);
224  getImplRegState(true));
225  }
226 
227  // Set FrameSetup/FrameDestroy for the bundle. If any of the instructions got
228  // the property, then also set it on the bundle.
229  for (auto MII = FirstMI; MII != LastMI; ++MII) {
230  if (MII->getFlag(MachineInstr::FrameSetup))
232  if (MII->getFlag(MachineInstr::FrameDestroy))
234  }
235 }
236 
237 /// finalizeBundle - Same functionality as the previous finalizeBundle except
238 /// the last instruction in the bundle is not provided as an input. This is
239 /// used in cases where bundles are pre-determined by marking instructions
240 /// with 'InsideBundle' marker. It returns the MBB instruction iterator that
241 /// points to the end of the bundle.
246  MachineBasicBlock::instr_iterator LastMI = std::next(FirstMI);
247  while (LastMI != E && LastMI->isInsideBundle())
248  ++LastMI;
249  finalizeBundle(MBB, FirstMI, LastMI);
250  return LastMI;
251 }
252 
253 /// finalizeBundles - Finalize instruction bundles in the specified
254 /// MachineFunction. Return true if any bundles are finalized.
256  bool Changed = false;
257  for (MachineBasicBlock &MBB : MF) {
260  if (MII == MIE)
261  continue;
262  assert(!MII->isInsideBundle() &&
263  "First instr cannot be inside bundle before finalization!");
264 
265  for (++MII; MII != MIE; ) {
266  if (!MII->isInsideBundle())
267  ++MII;
268  else {
269  MII = finalizeBundle(MBB, std::prev(MII));
270  Changed = true;
271  }
272  }
273  }
274 
275  return Changed;
276 }
277 
280  SmallVectorImpl<std::pair<MachineInstr *, unsigned>> *Ops) {
281  VirtRegInfo RI = {false, false, false};
282  for (MIBundleOperands O(MI); O.isValid(); ++O) {
283  MachineOperand &MO = *O;
284  if (!MO.isReg() || MO.getReg() != Reg)
285  continue;
286 
287  // Remember each (MI, OpNo) that refers to Reg.
288  if (Ops)
289  Ops->push_back(std::make_pair(MO.getParent(), O.getOperandNo()));
290 
291  // Both defs and uses can read virtual registers.
292  if (MO.readsReg()) {
293  RI.Reads = true;
294  if (MO.isDef())
295  RI.Tied = true;
296  }
297 
298  // Only defs can write.
299  if (MO.isDef())
300  RI.Writes = true;
301  else if (!RI.Tied &&
302  MO.getParent()->isRegTiedToDefOperand(O.getOperandNo()))
303  RI.Tied = true;
304  }
305  return RI;
306 }
307 
309  const TargetRegisterInfo *TRI) {
310  bool AllDefsDead = true;
311  PhysRegInfo PRI = {false, false, false, false, false, false, false, false};
312 
313  assert(Reg.isPhysical() && "analyzePhysReg not given a physical register!");
314  for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
315  const MachineOperand &MO = *O;
316 
317  if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) {
318  PRI.Clobbered = true;
319  continue;
320  }
321 
322  if (!MO.isReg())
323  continue;
324 
325  Register MOReg = MO.getReg();
326  if (!MOReg || !Register::isPhysicalRegister(MOReg))
327  continue;
328 
329  if (!TRI->regsOverlap(MOReg, Reg))
330  continue;
331 
332  bool Covered = TRI->isSuperRegisterEq(Reg, MOReg);
333  if (MO.readsReg()) {
334  PRI.Read = true;
335  if (Covered) {
336  PRI.FullyRead = true;
337  if (MO.isKill())
338  PRI.Killed = true;
339  }
340  } else if (MO.isDef()) {
341  PRI.Defined = true;
342  if (Covered)
343  PRI.FullyDefined = true;
344  if (!MO.isDead())
345  AllDefsDead = false;
346  }
347  }
348 
349  if (AllDefsDead) {
350  if (PRI.FullyDefined || PRI.Clobbered)
351  PRI.DeadDef = true;
352  else if (PRI.Defined)
353  PRI.PartialDeadDef = true;
354  }
355 
356  return PRI;
357 }
i
i
Definition: README.txt:29
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:100
llvm
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MachineOperand::setIsInternalRead
void setIsInternalRead(bool Val=true)
Definition: MachineOperand.h:515
llvm::VirtRegInfo::Tied
bool Tied
Tied - Uses and defs must use the same register.
Definition: MachineInstrBundle.h:229
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::PhysRegInfo::FullyRead
bool FullyRead
Reg or a super-register is read. The full register is read.
Definition: MachineInstrBundle.h:262
llvm::VirtRegInfo::Reads
bool Reads
Reads - One of the operands read the virtual register.
Definition: MachineInstrBundle.h:221
llvm::finalizeBundles
bool finalizeBundles(MachineFunction &MF)
finalizeBundles - Finalize instruction bundles in the specified MachineFunction.
Definition: MachineInstrBundle.cpp:255
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::PhysRegInfo::DeadDef
bool DeadDef
Either:
Definition: MachineInstrBundle.h:268
llvm::UnpackMachineBundlesID
char & UnpackMachineBundlesID
UnpackMachineBundles - This pass unpack machine instruction bundles.
Definition: MachineInstrBundle.cpp:41
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
llvm::PhysRegInfo::FullyDefined
bool FullyDefined
Reg or a super-register is defined.
Definition: MachineInstrBundle.h:256
TargetInstrInfo.h
llvm::SmallSet
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:134
llvm::getDeadRegState
unsigned getDeadRegState(bool B)
Definition: MachineInstrBuilder.h:512
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::AnalyzePhysRegInBundle
PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, const TargetRegisterInfo *TRI)
AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses a physical register.
Definition: MachineInstrBundle.cpp:308
llvm::getUndefRegState
unsigned getUndefRegState(bool B)
Definition: MachineInstrBuilder.h:515
llvm::MachineInstr::isRegTiedToDefOperand
bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const
Return true if the use operand of the specified index is tied to a def operand.
Definition: MachineInstr.h:1547
llvm::MachineInstr::FrameDestroy
@ FrameDestroy
Definition: MachineInstr.h:84
llvm::PhysRegInfo::Killed
bool Killed
There is a use operand of reg or a super-register with kill flag set.
Definition: MachineInstrBundle.h:275
isUndef
static bool isUndef(ArrayRef< int > Mask)
Definition: HexagonISelDAGToDAGHVX.cpp:904
llvm::PhysRegInfo::Clobbered
bool Clobbered
There is a regmask operand indicating Reg is clobbered.
Definition: MachineInstrBundle.h:249
llvm::MachineOperand::isKill
bool isKill() const
Definition: MachineOperand.h:387
llvm::finalizeBundle
void finalizeBundle(MachineBasicBlock &MBB, MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)
finalizeBundle - Finalize a machine instruction bundle which includes a sequence of instructions star...
Definition: MachineInstrBundle.cpp:123
llvm::getDefRegState
unsigned getDefRegState(bool B)
Definition: MachineInstrBuilder.h:503
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
TargetMachine.h
llvm::PassRegistry::getPassRegistry
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Definition: PassRegistry.cpp:31
llvm::initializeUnpackMachineBundlesPass
void initializeUnpackMachineBundlesPass(PassRegistry &)
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::Register::isPhysicalRegister
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:65
llvm::PhysRegInfo::Read
bool Read
Reg or one of its aliases is read.
Definition: MachineInstrBundle.h:260
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::VirtRegInfo::Writes
bool Writes
Writes - One of the operands writes the virtual register.
Definition: MachineInstrBundle.h:224
llvm::MachineInstr::FrameSetup
@ FrameSetup
Definition: MachineInstr.h:82
MachineInstrBundle.h
llvm::TargetRegisterInfo::regsOverlap
bool regsOverlap(Register regA, Register regB) const
Returns true if the two registers are equal or alias each other.
Definition: TargetRegisterInfo.h:402
llvm::MIBundleOperands
MIBundleOperands - Iterate over all operands in a bundle of machine instructions.
Definition: MachineInstrBundle.h:166
llvm::MachineOperand::getParent
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
Definition: MachineOperand.h:235
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
Passes.h
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:555
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const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
Definition: MachineInstrBuilder.h:279
llvm::RISCVFenceField::O
@ O
Definition: RISCVBaseInfo.h:128
llvm::MachineOperand::clobbersPhysReg
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
Definition: MachineOperand.h:614
llvm::MachineOperand::isUndef
bool isUndef() const
Definition: MachineOperand.h:392
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size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:164
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:318
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
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Definition: MachineInstrBuilder.h:70
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VirtRegInfo AnalyzeVirtRegInBundle(MachineInstr &MI, Register Reg, SmallVectorImpl< std::pair< MachineInstr *, unsigned >> *Ops=nullptr)
AnalyzeVirtRegInBundle - Analyze how the current instruction or bundle uses a virtual register.
Definition: MachineInstrBundle.cpp:278
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char & FinalizeMachineBundlesID
FinalizeMachineBundles - This pass finalize machine instruction bundles (created earlier,...
Definition: MachineInstrBundle.cpp:98
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compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
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constexpr double e
Definition: MathExtras.h:57
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bool isDead() const
Definition: MachineOperand.h:382
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Definition: MachineInstrBundle.cpp:80
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Definition: STLExtras.h:1563
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Information about how a physical register Reg is used by a set of operands.
Definition: MachineInstrBundle.h:246
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const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:225
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bool isRegMask() const
isRegMask - Tests if this is a MO_RegisterMask operand.
Definition: MachineOperand.h:342
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Definition: MemDepPrinter.cpp:83
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const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
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Definition: MachineInstrBuilder.h:98
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Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:357
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instr_iterator instr_begin()
Definition: MachineBasicBlock.h:252
llvm::SmallSet::erase
bool erase(const T &V)
Definition: SmallSet.h:207
llvm::MachineBasicBlock::instr_end
instr_iterator instr_end()
Definition: MachineBasicBlock.h:254
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Definition: MachineFunction.h:227
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static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)
Return the first found DebugLoc that has a DILocation, given a range of instructions.
Definition: MachineInstrBundle.cpp:109
llvm::PhysRegInfo::Defined
bool Defined
Reg or one of its aliases is defined.
Definition: MachineInstrBundle.h:253
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Helper class for constructing bundles of MachineInstrs.
Definition: MachineInstrBuilder.h:545
TargetSubtargetInfo.h
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bool isDef() const
Definition: MachineOperand.h:372
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std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
Definition: SmallSet.h:180
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Wrapper class representing virtual and physical registers.
Definition: Register.h:19
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Definition: AArch64SLSHardening.cpp:74
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Insert MI into MBB by prepending it to the instructions in the bundle.
Definition: MachineInstrBuilder.h:612
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Definition: BitVector.h:838
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bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a super-register of RegA or if RegB == RegA.
Definition: MCRegisterInfo.h:574
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bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register.
Definition: MachineOperand.h:455
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ConstMIBundleOperands - Iterate over all operands in a const bundle of machine instructions.
Definition: MachineInstrBundle.h:185
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Definition: MachineBasicBlock.h:228
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void clear()
Definition: SmallVector.h:585
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MCSubRegIterator enumerates all sub-registers of Reg.
Definition: MCRegisterInfo.h:594
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unsigned getKillRegState(bool B)
Definition: MachineInstrBuilder.h:509
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MachineInstrBuilder.h
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MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:329
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bool isValid() const
isValid - returns true if this iterator is not yet at the end.
Definition: MCRegisterInfo.h:224
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bool isInternalRead() const
Definition: MachineOperand.h:428
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This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
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void initializeFinalizeMachineBundlesPass(PassRegistry &)
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FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:298
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A debug info location.
Definition: DebugLoc.h:33
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Definition: MachineInstrBundle.h:218
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unsigned getImplRegState(bool B)
Definition: MachineInstrBuilder.h:506
InitializePasses.h
TargetRegisterInfo.h
INITIALIZE_PASS
INITIALIZE_PASS(UnpackMachineBundles, "unpack-mi-bundles", "Unpack machine instruction bundles", false, false) bool UnpackMachineBundles
Definition: MachineInstrBundle.cpp:42
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Definition: AArch64AdvSIMDScalarPass.cpp:104
SmallSet.h
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unsigned ID
Definition: TargetTransformInfo.h:38
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bool PartialDeadDef
Reg is Defined and all defs of reg or an overlapping register are dead.
Definition: MachineInstrBundle.h:272