LLVM  16.0.0git
WebAssemblyOptimizeLiveIntervals.cpp
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1 //===--- WebAssemblyOptimizeLiveIntervals.cpp - LiveInterval processing ---===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// Optimize LiveIntervals for use in a post-RA context.
11 //
12 /// LiveIntervals normally runs before register allocation when the code is
13 /// only recently lowered out of SSA form, so it's uncommon for registers to
14 /// have multiple defs, and when they do, the defs are usually closely related.
15 /// Later, after coalescing, tail duplication, and other optimizations, it's
16 /// more common to see registers with multiple unrelated defs. This pass
17 /// updates LiveIntervals to distribute the value numbers across separate
18 /// LiveIntervals.
19 ///
20 //===----------------------------------------------------------------------===//
21 
22 #include "WebAssembly.h"
24 #include "WebAssemblySubtarget.h"
28 #include "llvm/CodeGen/Passes.h"
29 #include "llvm/Support/Debug.h"
31 using namespace llvm;
32 
33 #define DEBUG_TYPE "wasm-optimize-live-intervals"
34 
35 namespace {
36 class WebAssemblyOptimizeLiveIntervals final : public MachineFunctionPass {
37  StringRef getPassName() const override {
38  return "WebAssembly Optimize Live Intervals";
39  }
40 
41  void getAnalysisUsage(AnalysisUsage &AU) const override {
42  AU.setPreservesCFG();
50  }
51 
52  MachineFunctionProperties getRequiredProperties() const override {
55  }
56 
57  bool runOnMachineFunction(MachineFunction &MF) override;
58 
59 public:
60  static char ID; // Pass identification, replacement for typeid
61  WebAssemblyOptimizeLiveIntervals() : MachineFunctionPass(ID) {}
62 };
63 } // end anonymous namespace
64 
66 INITIALIZE_PASS(WebAssemblyOptimizeLiveIntervals, DEBUG_TYPE,
67  "Optimize LiveIntervals for WebAssembly", false, false)
68 
70  return new WebAssemblyOptimizeLiveIntervals();
71 }
72 
73 bool WebAssemblyOptimizeLiveIntervals::runOnMachineFunction(
74  MachineFunction &MF) {
75  LLVM_DEBUG(dbgs() << "********** Optimize LiveIntervals **********\n"
76  "********** Function: "
77  << MF.getName() << '\n');
78 
80  auto &LIS = getAnalysis<LiveIntervals>();
81 
82  // We don't preserve SSA form.
83  MRI.leaveSSA();
84 
85  assert(MRI.tracksLiveness() && "OptimizeLiveIntervals expects liveness");
86 
87  // Split multiple-VN LiveIntervals into multiple LiveIntervals.
89  for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
91  auto &TRI = *MF.getSubtarget<WebAssemblySubtarget>().getRegisterInfo();
92 
93  if (MRI.reg_nodbg_empty(Reg))
94  continue;
95 
96  LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs);
97  if (Reg == TRI.getFrameRegister(MF) && SplitLIs.size() > 0) {
98  // The live interval for the frame register was split, resulting in a new
99  // VReg. For now we only support debug info output for a single frame base
100  // value for the function, so just use the last one. It will certainly be
101  // wrong for some part of the function, but until we are able to track
102  // values through live-range splitting and stackification, it will have to
103  // do.
104  MF.getInfo<WebAssemblyFunctionInfo>()->setFrameBaseVreg(
105  SplitLIs.back()->reg());
106  }
107  SplitLIs.clear();
108  }
109 
110  // In FixIrreducibleControlFlow, we conservatively inserted IMPLICIT_DEF
111  // instructions to satisfy LiveIntervals' requirement that all uses be
112  // dominated by defs. Now that LiveIntervals has computed which of these
113  // defs are actually needed and which are dead, remove the dead ones.
115  if (MI.isImplicitDef() && MI.getOperand(0).isDead()) {
116  LiveInterval &LI = LIS.getInterval(MI.getOperand(0).getReg());
117  LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(MI).getRegSlot());
118  LIS.RemoveMachineInstrFromMaps(MI);
119  MI.eraseFromParent();
120  }
121  }
122 
123  return true;
124 }
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
WebAssembly.h
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1183
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
DEBUG_TYPE
#define DEBUG_TYPE
Definition: WebAssemblyOptimizeLiveIntervals.cpp:33
llvm::MachineFunctionProperties
Properties which a MachineFunction may have at a given point in time.
Definition: MachineFunction.h:127
llvm::MachineRegisterInfo::getNumVirtRegs
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
Definition: MachineRegisterInfo.h:770
llvm::Register::index2VirtReg
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:84
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::MachineFunctionPass::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: MachineFunctionPass.cpp:158
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
MachineRegisterInfo.h
llvm::MachineRegisterInfo::tracksLiveness
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
Definition: MachineRegisterInfo.h:195
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::MachineFunction::front
const MachineBasicBlock & front() const
Definition: MachineFunction.h:865
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:666
llvm::MachineBlockFrequencyInfo
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
Definition: MachineBlockFrequencyInfo.h:33
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:754
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
llvm::MachineFunctionProperties::set
MachineFunctionProperties & set(Property P)
Definition: MachineFunction.h:196
INITIALIZE_PASS
INITIALIZE_PASS(WebAssemblyOptimizeLiveIntervals, DEBUG_TYPE, "Optimize LiveIntervals for WebAssembly", false, false) FunctionPass *llvm
Definition: WebAssemblyOptimizeLiveIntervals.cpp:66
llvm::SlotIndexes
SlotIndexes pass.
Definition: SlotIndexes.h:313
llvm::createWebAssemblyOptimizeLiveIntervals
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
llvm::LiveInterval
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:686
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
Passes.h
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:656
llvm::MachineFunctionProperties::Property::TracksLiveness
@ TracksLiveness
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
LiveIntervals.h
llvm::TargetRegisterInfo::getFrameRegister
virtual Register getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::make_early_inc_range
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
Definition: STLExtras.h:619
llvm::LiveVariablesID
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
Definition: LiveVariables.cpp:45
llvm::MachineFunction::getName
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
Definition: MachineFunction.cpp:565
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::WebAssemblyFunctionInfo
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
Definition: WebAssemblyMachineFunctionInfo.h:33
WebAssemblyMachineFunctionInfo.h
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::AnalysisUsage::setPreservesCFG
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:263
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::AnalysisUsage::addPreservedID
AnalysisUsage & addPreservedID(const void *ID)
Definition: PassAnalysisSupport.h:88
llvm::AnalysisUsage::addPreserved
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
Definition: PassAnalysisSupport.h:98
llvm::WebAssemblySubtarget
Definition: WebAssemblySubtarget.h:35
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
WebAssemblySubtarget.h
llvm::LiveIntervals
Definition: LiveIntervals.h:53
llvm::SmallVectorImpl::clear
void clear()
Definition: SmallVector.h:598
llvm::MachineRegisterInfo::leaveSSA
void leaveSSA()
Definition: MachineRegisterInfo.h:189
llvm::MachineDominatorsID
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
llvm::FunctionPass
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:308
llvm::AnalysisUsage::addRequired
AnalysisUsage & addRequired()
Definition: PassAnalysisSupport.h:75
llvm::MachineRegisterInfo::reg_nodbg_empty
bool reg_nodbg_empty(Register RegNo) const
reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.
Definition: MachineRegisterInfo.h:385
raw_ostream.h
MachineBlockFrequencyInfo.h
Debug.h
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:38