27#include "llvm/IR/IntrinsicsXCore.h"
34#define DEBUG_TYPE "xcore-isel"
35#define PASS_NAME "XCore DAG->DAG Pattern Instruction Selection"
46 XCoreDAGToDAGISel() =
delete;
56 inline SDValue getI32Imm(
unsigned Imm,
const SDLoc &dl) {
57 return CurDAG->getTargetConstant(Imm, dl,
MVT::i32);
60 inline bool immMskBitp(
SDNode *inN)
const {
67 return (msksize >= 1 && msksize <= 8) ||
68 msksize == 16 || msksize == 24 || msksize == 32;
75 std::vector<SDValue> &OutOps)
override;
78 #include "XCoreGenDAGISel.inc"
82char XCoreDAGToDAGISel::ID = 0;
90 CodeGenOpt::Level OptLevel) {
91 return new XCoreDAGToDAGISel(
TM, OptLevel);
97 if ((FIN = dyn_cast<FrameIndexSDNode>(
Addr))) {
104 if ((FIN = dyn_cast<FrameIndexSDNode>(
Addr.getOperand(0)))
105 && (CN = dyn_cast<ConstantSDNode>(
Addr.getOperand(1)))
117bool XCoreDAGToDAGISel::
118SelectInlineAsmMemoryOperand(
const SDValue &Op,
unsigned ConstraintID,
119 std::vector<SDValue> &OutOps) {
121 switch (ConstraintID) {
122 default:
return true;
124 switch (
Op.getOpcode()) {
125 default:
return true;
134 OutOps.push_back(Reg);
135 OutOps.push_back(
Op.getOperand(0));
139void XCoreDAGToDAGISel::Select(
SDNode *
N) {
141 switch (
N->getOpcode()) {
144 uint64_t Val = cast<ConstantSDNode>(
N)->getZExtValue();
150 N, CurDAG->getMachineNode(XCore::MKMSK_rus, dl,
MVT::i32, MskSize));
153 else if (!isUInt<16>(Val)) {
154 SDValue CPIdx = CurDAG->getTargetConstantPool(
156 getTargetLowering()->getPointerTy(CurDAG->getDataLayout()));
157 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl,
MVT::i32,
159 CurDAG->getEntryNode());
163 CurDAG->setNodeMemRefs(cast<MachineSDNode>(node), {
MemOp});
164 ReplaceNode(
N, node);
170 SDValue Ops[] = {
N->getOperand(0),
N->getOperand(1),
172 ReplaceNode(
N, CurDAG->getMachineNode(XCore::LADD_l5r, dl,
MVT::i32,
177 SDValue Ops[] = {
N->getOperand(0),
N->getOperand(1),
179 ReplaceNode(
N, CurDAG->getMachineNode(XCore::LSUB_l5r, dl,
MVT::i32,
184 SDValue Ops[] = {
N->getOperand(0),
N->getOperand(1),
185 N->getOperand(2),
N->getOperand(3) };
186 ReplaceNode(
N, CurDAG->getMachineNode(XCore::MACCU_l4r, dl,
MVT::i32,
191 SDValue Ops[] = {
N->getOperand(0),
N->getOperand(1),
192 N->getOperand(2),
N->getOperand(3) };
193 ReplaceNode(
N, CurDAG->getMachineNode(XCore::MACCS_l4r, dl,
MVT::i32,
198 SDValue Ops[] = {
N->getOperand(0),
N->getOperand(1),
199 N->getOperand(2),
N->getOperand(3) };
200 ReplaceNode(
N, CurDAG->getMachineNode(XCore::LMUL_l6r, dl,
MVT::i32,
205 SDValue Ops[] = {
N->getOperand(0),
N->getOperand(1),
N->getOperand(2) };
206 ReplaceNode(
N, CurDAG->getMachineNode(XCore::CRC8_l4r, dl,
MVT::i32,
245bool XCoreDAGToDAGISel::tryBRIND(
SDNode *
N) {
252 unsigned IntNo = cast<ConstantSDNode>(
Addr->getOperand(1))->getZExtValue();
253 if (IntNo != Intrinsic::xcore_checkevent)
257 if (!CheckEventChainOut.use_empty()) {
273 SDValue constOne = getI32Imm(1, dl);
276 constOne, Chain), 0);
282 CurDAG->SelectNodeTo(
N, XCore::BRFU_lu6,
MVT::Other,
286 CurDAG->SelectNodeTo(
N, XCore::BAU_1r,
MVT::Other, nextAddr, Glue);
amdgpu AMDGPU Register Bank Select
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Given that RA is a live value
const char LLVMTargetMachineRef TM
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file describes how to lower LLVM code to machine code.
static SDValue replaceInChain(SelectionDAG *CurDAG, SDValue Chain, SDValue Old, SDValue New)
Given a chain return a new chain where any appearance of Old is replaced by New.
static Constant * get(Type *Ty, uint64_t V, bool IsSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
int64_t getSExtValue() const
FunctionPass class - This class is used to implement most global optimizations.
A description of a memory reference used in the backend.
@ MOLoad
The memory access reads data.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
unsigned getNumOperands() const
Return the number of values used by this operation.
const SDValue & getOperand(unsigned Num) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
SDNode * getNode() const
get the SDNode which holds the desired result
SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruc...
virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector< SDValue > &OutOps)
SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode,...
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
static IntegerType * getInt32Ty(LLVMContext &C)
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Level
Code generation optimization level.
@ ADD
Simple integer binary arithmetic operators.
@ BRIND
BRIND - Indirect branch.
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
constexpr bool isMask_32(uint32_t Value)
Return true if the argument is a non-empty sequence of ones starting at the least significant bit wit...
int bit_width(T Value)
Returns the number of bits needed to represent Value if Value is nonzero.
FunctionPass * createXCoreISelDag(XCoreTargetMachine &TM, CodeGenOpt::Level OptLevel)
createXCoreISelDag - This pass converts a legalized DAG into a XCore-specific DAG,...
This struct is a compact representation of a valid (non-zero power of two) alignment.
static MachinePointerInfo getConstantPool(MachineFunction &MF)
Return a MachinePointerInfo record that refers to the constant pool.