llvm::XtensaInstrInfo Class Reference

#include "Target/Xtensa/XtensaInstrInfo.h"

Inheritance diagram for llvm::XtensaInstrInfo:

Public Member Functions
	XtensaInstrInfo (const XtensaSubtarget &STI)
void	adjustStackPtr (MCRegister SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
	Adjust SP by Amount bytes.
unsigned	getInstSizeInBytes (const MachineInstr &MI) const override
const XtensaRegisterInfo &	getRegisterInfo () const
Register	isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override
Register	isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override
void	copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override
void	storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
void	loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
void	getLoadStoreOpcodes (const TargetRegisterClass *RC, unsigned &LoadOpcode, unsigned &StoreOpcode, int64_t offset) const
void	loadImmediate (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, MCRegister *Reg, int64_t Value) const
bool	reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
MachineBasicBlock *	getBranchDestBlock (const MachineInstr &MI) const override
bool	isBranchOffsetInRange (unsigned BranchOpc, int64_t BrOffset) const override
bool	analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
unsigned	removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
unsigned	insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
void	insertIndirectBranch (MachineBasicBlock &MBB, MachineBasicBlock &DestBB, MachineBasicBlock &RestoreBB, const DebugLoc &DL, int64_t BrOffset=0, RegScavenger *RS=nullptr) const override
unsigned	insertBranchAtInst (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineBasicBlock *TBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded) const
unsigned	insertConstBranchAtInst (MachineBasicBlock &MBB, MachineInstr *I, int64_t offset, ArrayRef< MachineOperand > Cond, DebugLoc DL, int *BytesAdded) const
bool	isBranch (const MachineBasicBlock::iterator &MI, SmallVectorImpl< MachineOperand > &Cond, const MachineOperand *&Target) const
const XtensaSubtarget &	getSubtarget () const

Detailed Description

Definition at line 31 of file XtensaInstrInfo.h.

Constructor & Destructor Documentation

XtensaInstrInfo()

XtensaInstrInfo::XtensaInstrInfo

(

const XtensaSubtarget &

STI

)

Definition at line 50 of file XtensaInstrInfo.cpp.

Member Function Documentation

adjustStackPtr()

void XtensaInstrInfo::adjustStackPtr	(	MCRegister	SP,
		int64_t	Amount,
		MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	I ) const

Adjust SP by Amount bytes.

Definition at line 79 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::dwarf_linker::DebugLoc, DL, llvm::get(), I, llvm::isInt(), llvm::RegState::Kill, loadImmediate(), and MBB.

analyzeBranch()

bool XtensaInstrInfo::analyzeBranch ( MachineBasicBlock & MBB, MachineBasicBlock *& TBB, MachineBasicBlock *& FBB, SmallVectorImpl< MachineOperand > & Cond, bool AllowModify = false ) const

override

Definition at line 350 of file XtensaInstrInfo.cpp.

References assert(), Cond, llvm::MachineOperand::CreateImm(), llvm::getImm(), llvm::MachineOperand::getMBB(), I, isBranch(), llvm::MachineOperand::isMBB(), MBB, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and TBB.

copyPhysReg()

void XtensaInstrInfo::copyPhysReg ( MachineBasicBlock & MBB, MachineBasicBlock::iterator MBBI, const DebugLoc & DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest = false, bool RenamableSrc = false ) const

override

Definition at line 112 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), contains(), DL, llvm::get(), llvm::getKillRegState(), MBB, MBBI, and llvm::report_fatal_error().

getBranchDestBlock()

MachineBasicBlock * XtensaInstrInfo::getBranchDestBlock ( const MachineInstr & MI ) const

override

Definition at line 276 of file XtensaInstrInfo.cpp.

References llvm_unreachable, and MI.

getInstSizeInBytes()

unsigned XtensaInstrInfo::getInstSizeInBytes ( const MachineInstr & MI ) const

override

Definition at line 199 of file XtensaInstrInfo.cpp.

References llvm::TargetMachine::getMCAsmInfo(), llvm::MachineFunction::getTarget(), and MI.

Referenced by insertBranch(), insertBranchAtInst(), insertConstBranchAtInst(), and removeBranch().

getLoadStoreOpcodes()

void XtensaInstrInfo::getLoadStoreOpcodes	(	const TargetRegisterClass *	RC,
		unsigned &	LoadOpcode,
		unsigned &	StoreOpcode,
		int64_t	offset ) const

Definition at line 150 of file XtensaInstrInfo.cpp.

References llvm_unreachable.

Referenced by loadRegFromStackSlot(), and storeRegToStackSlot().

getRegisterInfo()

const XtensaRegisterInfo & llvm::XtensaInstrInfo::getRegisterInfo ( ) const

inline

Definition at line 44 of file XtensaInstrInfo.h.

getSubtarget()

const XtensaSubtarget & llvm::XtensaInstrInfo::getSubtarget ( ) const

inline

Definition at line 124 of file XtensaInstrInfo.h.

insertBranch()

unsigned XtensaInstrInfo::insertBranch ( MachineBasicBlock & MBB, MachineBasicBlock * TBB, MachineBasicBlock * FBB, ArrayRef< MachineOperand > Cond, const DebugLoc & DL, int * BytesAdded = nullptr ) const

override

Definition at line 460 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addMBB(), llvm::BuildMI(), Cond, llvm::Count, DL, llvm::get(), getInstSizeInBytes(), insertBranchAtInst(), MBB, MI, and TBB.

insertBranchAtInst()

unsigned XtensaInstrInfo::insertBranchAtInst	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	I,
		MachineBasicBlock *	TBB,
		ArrayRef< MachineOperand >	Cond,
		const DebugLoc &	DL,
		int *	BytesAdded ) const

Definition at line 610 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), Cond, llvm::Count, DL, llvm::get(), llvm::getImm(), getInstSizeInBytes(), getReg(), I, MBB, MI, llvm::report_fatal_error(), and TBB.

Referenced by insertBranch().

insertConstBranchAtInst()

unsigned XtensaInstrInfo::insertConstBranchAtInst	(	MachineBasicBlock &	MBB,
		MachineInstr *	I,
		int64_t	offset,
		ArrayRef< MachineOperand >	Cond,
		DebugLoc	DL,
		int *	BytesAdded ) const

Definition at line 551 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), Cond, llvm::Count, DL, llvm::get(), llvm::getImm(), getInstSizeInBytes(), getReg(), I, llvm_unreachable, MBB, and MI.

insertIndirectBranch()

void XtensaInstrInfo::insertIndirectBranch ( MachineBasicBlock & MBB, MachineBasicBlock & DestBB, MachineBasicBlock & RestoreBB, const DebugLoc & DL, int64_t BrOffset = 0, RegScavenger * RS = nullptr ) const

override

Definition at line 482 of file XtensaInstrInfo.cpp.

References llvm::MachineInstr::addOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::MachineBasicBlock::back(), llvm::BuildMI(), llvm::CallingConv::C, llvm::XtensaConstantPoolMBB::Create(), llvm::MachineOperand::CreateCPI(), DL, llvm::MachineBasicBlock::end(), llvm::RegScavenger::enterBasicBlockEnd(), llvm::get(), llvm::MachineFunction::getConstantPool(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineFunction::getRegInfo(), II, llvm::isInt(), llvm::RegState::Kill, loadRegFromStackSlot(), MBB, MRI, Register, llvm::report_fatal_error(), llvm::RegScavenger::scavengeRegisterBackwards(), llvm::RegScavenger::setRegUsed(), and storeRegToStackSlot().

isBranch()

bool XtensaInstrInfo::isBranch	(	const MachineBasicBlock::iterator &	MI,
		SmallVectorImpl< MachineOperand > &	Cond,
		const MachineOperand *&	Target ) const

Definition at line 674 of file XtensaInstrInfo.cpp.

References assert(), Cond, and MI.

Referenced by analyzeBranch(), and removeBranch().

isBranchOffsetInRange()

bool XtensaInstrInfo::isBranchOffsetInRange ( unsigned BranchOpc, int64_t BrOffset ) const

override

Definition at line 311 of file XtensaInstrInfo.cpp.

References llvm::isIntN(), and llvm_unreachable.

isLoadFromStackSlot()

Register XtensaInstrInfo::isLoadFromStackSlot ( const MachineInstr & MI, int & FrameIndex ) const

override

Definition at line 54 of file XtensaInstrInfo.cpp.

References MI, and Register.

isStoreToStackSlot()

Register XtensaInstrInfo::isStoreToStackSlot ( const MachineInstr & MI, int & FrameIndex ) const

override

Definition at line 66 of file XtensaInstrInfo.cpp.

References MI, and Register.

loadImmediate()

void XtensaInstrInfo::loadImmediate	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	MBBI,
		MCRegister *	Reg,
		int64_t	Value ) const

Definition at line 165 of file XtensaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addConstantPoolIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::dwarf_linker::DebugLoc, DL, llvm::get(), llvm::MachineConstantPool::getConstantPoolIndex(), llvm::Type::getInt32Ty(), High, llvm::Low, MBB, MBBI, and llvm::report_fatal_error().

Referenced by adjustStackPtr().

loadRegFromStackSlot()

void XtensaInstrInfo::loadRegFromStackSlot ( MachineBasicBlock & MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIdx, const TargetRegisterClass * RC, const TargetRegisterInfo * TRI, Register VReg, MachineInstr::MIFlag Flags = MachineInstr::NoFlags ) const

override

Definition at line 140 of file XtensaInstrInfo.cpp.

References llvm::addFrameReference(), llvm::BuildMI(), llvm::dwarf_linker::DebugLoc, DL, llvm::get(), getLoadStoreOpcodes(), MBB, MBBI, and TRI.

Referenced by insertIndirectBranch().

removeBranch()

unsigned XtensaInstrInfo::removeBranch ( MachineBasicBlock & MBB, int * BytesRemoved = nullptr ) const

override

Definition at line 433 of file XtensaInstrInfo.cpp.

References Cond, llvm::Count, llvm::MachineOperand::CreateImm(), getInstSizeInBytes(), I, isBranch(), and MBB.

reverseBranchCondition()

bool XtensaInstrInfo::reverseBranchCondition ( SmallVectorImpl< MachineOperand > & Cond ) const

override

Definition at line 211 of file XtensaInstrInfo.cpp.

References assert(), Cond, llvm::getImm(), and llvm::report_fatal_error().

storeRegToStackSlot()

void XtensaInstrInfo::storeRegToStackSlot ( MachineBasicBlock & MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass * RC, const TargetRegisterInfo * TRI, Register VReg, MachineInstr::MIFlag Flags = MachineInstr::NoFlags ) const

override

Definition at line 127 of file XtensaInstrInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::dwarf_linker::DebugLoc, DL, llvm::get(), llvm::getKillRegState(), getLoadStoreOpcodes(), MBB, MBBI, and TRI.

Referenced by insertIndirectBranch().

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The documentation for this class was generated from the following files:

• lib/Target/Xtensa/XtensaInstrInfo.h
• lib/Target/Xtensa/XtensaInstrInfo.cpp