LLVM 20.0.0git
Namespaces | Functions | Variables
ARMTargetMachine.cpp File Reference
#include "ARMTargetMachine.h"
#include "ARM.h"
#include "ARMMachineFunctionInfo.h"
#include "ARMMacroFusion.h"
#include "ARMSubtarget.h"
#include "ARMTargetObjectFile.h"
#include "ARMTargetTransformInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "TargetInfo/ARMTargetInfo.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/CodeGen/ExecutionDomainFix.h"
#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
#include "llvm/CodeGen/GlobalISel/CallLowering.h"
#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/GlobalISel/Legalizer.h"
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
#include "llvm/CodeGen/MIRParser/MIParser.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegisterBankInfo.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/TargetParser/ARMTargetParser.h"
#include "llvm/TargetParser/TargetParser.h"
#include "llvm/TargetParser/Triple.h"
#include "llvm/Transforms/CFGuard.h"
#include "llvm/Transforms/IPO.h"
#include "llvm/Transforms/Scalar.h"
#include <cassert>
#include <memory>
#include <optional>
#include <string>

Go to the source code of this file.

Namespaces

namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.
 

Functions

void llvm::initializeARMExecutionDomainFixPass (PassRegistry &)
 
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMTarget ()
 
static std::unique_ptr< TargetLoweringObjectFilecreateTLOF (const Triple &TT)
 
static ARMBaseTargetMachine::ARMABI computeTargetABI (const Triple &TT, StringRef CPU, const TargetOptions &Options)
 
static std::string computeDataLayout (const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle)
 
static Reloc::Model getEffectiveRelocModel (const Triple &TT, std::optional< Reloc::Model > RM)
 
 INITIALIZE_PASS_BEGIN (ARMExecutionDomainFix, "arm-execution-domain-fix", "ARM Execution Domain Fix", false, false) INITIALIZE_PASS_END(ARMExecutionDomainFix
 

Variables

static cl::opt< boolDisableA15SDOptimization ("disable-a15-sd-optimization", cl::Hidden, cl::desc("Inhibit optimization of S->D register accesses on A15"), cl::init(false))
 
static cl::opt< boolEnableAtomicTidy ("arm-atomic-cfg-tidy", cl::Hidden, cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information"), cl::init(true))
 
static cl::opt< boolEnableARMLoadStoreOpt ("arm-load-store-opt", cl::Hidden, cl::desc("Enable ARM load/store optimization pass"), cl::init(true))
 
static cl::opt< cl::boolOrDefaultEnableGlobalMerge ("arm-global-merge", cl::Hidden, cl::desc("Enable the global merge pass"))
 
arm execution domain fix
 
arm execution domain ARM Execution Domain Fix
 
arm execution domain ARM Execution Domain false
 

Function Documentation

◆ computeDataLayout()

static std::string computeDataLayout ( const Triple TT,
StringRef  CPU,
const TargetOptions Options,
bool  isLittle 
)
static

◆ computeTargetABI()

static ARMBaseTargetMachine::ARMABI computeTargetABI ( const Triple TT,
StringRef  CPU,
const TargetOptions Options 
)
static

◆ createTLOF()

static std::unique_ptr< TargetLoweringObjectFile > createTLOF ( const Triple TT)
static

Definition at line 116 of file ARMTargetMachine.cpp.

◆ getEffectiveRelocModel()

static Reloc::Model getEffectiveRelocModel ( const Triple TT,
std::optional< Reloc::Model RM 
)
static

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN ( ARMExecutionDomainFix  ,
"arm-execution-domain-fix"  ,
"ARM Execution Domain Fix"  ,
false  ,
false   
)

◆ LLVMInitializeARMTarget()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMTarget ( )

Variable Documentation

◆ DisableA15SDOptimization

cl::opt< bool > DisableA15SDOptimization("disable-a15-sd-optimization", cl::Hidden, cl::desc("Inhibit optimization of S->D register accesses on A15"), cl::init(false)) ( "disable-a15-sd-optimization"  ,
cl::Hidden  ,
cl::desc("Inhibit optimization of S->D register accesses on A15")  ,
cl::init(false)   
)
static

◆ EnableARMLoadStoreOpt

cl::opt< bool > EnableARMLoadStoreOpt("arm-load-store-opt", cl::Hidden, cl::desc("Enable ARM load/store optimization pass"), cl::init(true)) ( "arm-load-store-opt"  ,
cl::Hidden  ,
cl::desc("Enable ARM load/store optimization pass")  ,
cl::init(true  
)
static

◆ EnableAtomicTidy

cl::opt< bool > EnableAtomicTidy("arm-atomic-cfg-tidy", cl::Hidden, cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information"), cl::init(true)) ( "arm-atomic-cfg-tidy"  ,
cl::Hidden  ,
cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information")  ,
cl::init(true  
)
static

◆ EnableGlobalMerge

cl::opt< cl::boolOrDefault > EnableGlobalMerge("arm-global-merge", cl::Hidden, cl::desc("Enable the global merge pass")) ( "arm-global-merge"  ,
cl::Hidden  ,
cl::desc("Enable the global merge pass")   
)
static

◆ false

arm execution domain ARM Execution Domain false

Definition at line 407 of file ARMTargetMachine.cpp.

◆ fix

arm execution domain fix

Definition at line 406 of file ARMTargetMachine.cpp.

◆ Fix

arm execution domain ARM Execution Domain Fix

Definition at line 407 of file ARMTargetMachine.cpp.