LLVM  13.0.0git
Passes.h
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1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines interfaces to access the target independent code generation
10 // passes provided by the LLVM backend.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_PASSES_H
15 #define LLVM_CODEGEN_PASSES_H
16 
17 #include "llvm/Support/CodeGen.h"
19 #include <functional>
20 #include <string>
21 
22 namespace llvm {
23 
24 class FunctionPass;
25 class MachineFunction;
26 class MachineFunctionPass;
27 class MemoryBuffer;
28 class ModulePass;
29 class Pass;
30 class TargetMachine;
31 class TargetRegisterClass;
32 class raw_ostream;
33 
34 } // End llvm namespace
35 
36 // List of target independent CodeGen pass IDs.
37 namespace llvm {
38  FunctionPass *createAtomicExpandPass();
39 
40  /// createUnreachableBlockEliminationPass - The LLVM code generator does not
41  /// work well with unreachable basic blocks (what live ranges make sense for a
42  /// block that cannot be reached?). As such, a code generator should either
43  /// not instruction select unreachable blocks, or run this pass as its
44  /// last LLVM modifying pass to clean up blocks that are not reachable from
45  /// the entry block.
47 
48  /// createBasicBlockSections Pass - This pass assigns sections to machine
49  /// basic blocks and is enabled with -fbasic-block-sections. Buf is a memory
50  /// buffer that contains the list of functions and basic block ids to
51  /// selectively enable basic block sections.
52  MachineFunctionPass *createBasicBlockSectionsPass(const MemoryBuffer *Buf);
53 
54  /// createMachineFunctionSplitterPass - This pass splits machine functions
55  /// using profile information.
56  MachineFunctionPass *createMachineFunctionSplitterPass();
57 
58  /// MachineFunctionPrinter pass - This pass prints out the machine function to
59  /// the given stream as a debugging tool.
60  MachineFunctionPass *
61  createMachineFunctionPrinterPass(raw_ostream &OS,
62  const std::string &Banner ="");
63 
64  /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
65  /// using the MIR serialization format.
66  MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
67 
68  /// This pass resets a MachineFunction when it has the FailedISel property
69  /// as if it was just created.
70  /// If EmitFallbackDiag is true, the pass will emit a
71  /// DiagnosticInfoISelFallback for every MachineFunction it resets.
72  /// If AbortOnFailedISel is true, abort compilation instead of resetting.
73  MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
74  bool AbortOnFailedISel);
75 
76  /// createCodeGenPreparePass - Transform the code to expose more pattern
77  /// matching during instruction selection.
78  FunctionPass *createCodeGenPreparePass();
79 
80  /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
81  /// load-linked/store-conditional loops.
82  extern char &AtomicExpandID;
83 
84  /// MachineLoopInfo - This pass is a loop analysis pass.
85  extern char &MachineLoopInfoID;
86 
87  /// MachineDominators - This pass is a machine dominators analysis pass.
88  extern char &MachineDominatorsID;
89 
90  /// MachineDominanaceFrontier - This pass is a machine dominators analysis.
91  extern char &MachineDominanceFrontierID;
92 
93  /// MachineRegionInfo - This pass computes SESE regions for machine functions.
94  extern char &MachineRegionInfoPassID;
95 
96  /// EdgeBundles analysis - Bundle machine CFG edges.
97  extern char &EdgeBundlesID;
98 
99  /// LiveVariables pass - This pass computes the set of blocks in which each
100  /// variable is life and sets machine operand kill flags.
101  extern char &LiveVariablesID;
102 
103  /// PHIElimination - This pass eliminates machine instruction PHI nodes
104  /// by inserting copy instructions. This destroys SSA information, but is the
105  /// desired input for some register allocators. This pass is "required" by
106  /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
107  extern char &PHIEliminationID;
108 
109  /// LiveIntervals - This analysis keeps track of the live ranges of virtual
110  /// and physical registers.
111  extern char &LiveIntervalsID;
112 
113  /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
114  extern char &LiveStacksID;
115 
116  /// TwoAddressInstruction - This pass reduces two-address instructions to
117  /// use two operands. This destroys SSA information but it is desired by
118  /// register allocators.
119  extern char &TwoAddressInstructionPassID;
120 
121  /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
122  extern char &ProcessImplicitDefsID;
123 
124  /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
125  extern char &RegisterCoalescerID;
126 
127  /// MachineScheduler - This pass schedules machine instructions.
128  extern char &MachineSchedulerID;
129 
130  /// PostMachineScheduler - This pass schedules machine instructions postRA.
131  extern char &PostMachineSchedulerID;
132 
133  /// SpillPlacement analysis. Suggest optimal placement of spill code between
134  /// basic blocks.
135  extern char &SpillPlacementID;
136 
137  /// ShrinkWrap pass. Look for the best place to insert save and restore
138  // instruction and update the MachineFunctionInfo with that information.
139  extern char &ShrinkWrapID;
140 
141  /// LiveRangeShrink pass. Move instruction close to its definition to shrink
142  /// the definition's live range.
143  extern char &LiveRangeShrinkID;
144 
145  /// Greedy register allocator.
146  extern char &RAGreedyID;
147 
148  /// Basic register allocator.
149  extern char &RABasicID;
150 
151  /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
152  /// assigned in VirtRegMap.
153  extern char &VirtRegRewriterID;
154  FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
155 
156  /// UnreachableMachineBlockElimination - This pass removes unreachable
157  /// machine basic blocks.
158  extern char &UnreachableMachineBlockElimID;
159 
160  /// DeadMachineInstructionElim - This pass removes dead machine instructions.
161  extern char &DeadMachineInstructionElimID;
162 
163  /// This pass adds dead/undef flags after analyzing subregister lanes.
164  extern char &DetectDeadLanesID;
165 
166  /// This pass perform post-ra machine sink for COPY instructions.
167  extern char &PostRAMachineSinkingID;
168 
169  /// This pass adds flow sensitive discriminators.
170  extern char &MIRAddFSDiscriminatorsID;
171 
172  /// FastRegisterAllocation Pass - This pass register allocates as fast as
173  /// possible. It is best suited for debug code where live ranges are short.
174  ///
175  FunctionPass *createFastRegisterAllocator();
176 
177  /// BasicRegisterAllocation Pass - This pass implements a degenerate global
178  /// register allocator using the basic regalloc framework.
179  ///
180  FunctionPass *createBasicRegisterAllocator();
181 
182  /// Greedy register allocation pass - This pass implements a global register
183  /// allocator for optimized builds.
184  ///
185  FunctionPass *createGreedyRegisterAllocator();
186 
187  /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
188  /// Quadratic Prograaming (PBQP) based register allocator.
189  ///
190  FunctionPass *createDefaultPBQPRegisterAllocator();
191 
192  /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
193  /// and eliminates abstract frame references.
194  extern char &PrologEpilogCodeInserterID;
195  MachineFunctionPass *createPrologEpilogInserterPass();
196 
197  /// ExpandPostRAPseudos - This pass expands pseudo instructions after
198  /// register allocation.
199  extern char &ExpandPostRAPseudosID;
200 
201  /// PostRAHazardRecognizer - This pass runs the post-ra hazard
202  /// recognizer.
203  extern char &PostRAHazardRecognizerID;
204 
205  /// PostRAScheduler - This pass performs post register allocation
206  /// scheduling.
207  extern char &PostRASchedulerID;
208 
209  /// BranchFolding - This pass performs machine code CFG based
210  /// optimizations to delete branches to branches, eliminate branches to
211  /// successor blocks (creating fall throughs), and eliminating branches over
212  /// branches.
213  extern char &BranchFolderPassID;
214 
215  /// BranchRelaxation - This pass replaces branches that need to jump further
216  /// than is supported by a branch instruction.
217  extern char &BranchRelaxationPassID;
218 
219  /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
220  extern char &MachineFunctionPrinterPassID;
221 
222  /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
223  /// serialization format.
224  extern char &MIRPrintingPassID;
225 
226  /// TailDuplicate - Duplicate blocks with unconditional branches
227  /// into tails of their predecessors.
228  extern char &TailDuplicateID;
229 
230  /// Duplicate blocks with unconditional branches into tails of their
231  /// predecessors. Variant that works before register allocation.
232  extern char &EarlyTailDuplicateID;
233 
234  /// MachineTraceMetrics - This pass computes critical path and CPU resource
235  /// usage in an ensemble of traces.
236  extern char &MachineTraceMetricsID;
237 
238  /// EarlyIfConverter - This pass performs if-conversion on SSA form by
239  /// inserting cmov instructions.
240  extern char &EarlyIfConverterID;
241 
242  /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
243  /// predicating if/else block and insert select at the join point.
244  extern char &EarlyIfPredicatorID;
245 
246  /// This pass performs instruction combining using trace metrics to estimate
247  /// critical-path and resource depth.
248  extern char &MachineCombinerID;
249 
250  /// StackSlotColoring - This pass performs stack coloring and merging.
251  /// It merges disjoint allocas to reduce the stack size.
252  extern char &StackColoringID;
253 
254  /// IfConverter - This pass performs machine code if conversion.
255  extern char &IfConverterID;
256 
257  FunctionPass *createIfConverter(
258  std::function<bool(const MachineFunction &)> Ftor);
259 
260  /// MachineBlockPlacement - This pass places basic blocks based on branch
261  /// probabilities.
262  extern char &MachineBlockPlacementID;
263 
264  /// MachineBlockPlacementStats - This pass collects statistics about the
265  /// basic block placement using branch probabilities and block frequency
266  /// information.
267  extern char &MachineBlockPlacementStatsID;
268 
269  /// GCLowering Pass - Used by gc.root to perform its default lowering
270  /// operations.
271  FunctionPass *createGCLoweringPass();
272 
273  /// ShadowStackGCLowering - Implements the custom lowering mechanism
274  /// used by the shadow stack GC. Only runs on functions which opt in to
275  /// the shadow stack collector.
276  FunctionPass *createShadowStackGCLoweringPass();
277 
278  /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
279  /// in machine code. Must be added very late during code generation, just
280  /// prior to output, and importantly after all CFG transformations (such as
281  /// branch folding).
282  extern char &GCMachineCodeAnalysisID;
283 
284  /// Creates a pass to print GC metadata.
285  ///
286  FunctionPass *createGCInfoPrinter(raw_ostream &OS);
287 
288  /// MachineCSE - This pass performs global CSE on machine instructions.
289  extern char &MachineCSEID;
290 
291  /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
292  /// according to the semantics of the instruction as well as hoists
293  /// code.
294  extern char &MIRCanonicalizerID;
295 
296  /// ImplicitNullChecks - This pass folds null pointer checks into nearby
297  /// memory operations.
298  extern char &ImplicitNullChecksID;
299 
300  /// This pass performs loop invariant code motion on machine instructions.
301  extern char &MachineLICMID;
302 
303  /// This pass performs loop invariant code motion on machine instructions.
304  /// This variant works before register allocation. \see MachineLICMID.
305  extern char &EarlyMachineLICMID;
306 
307  /// MachineSinking - This pass performs sinking on machine instructions.
308  extern char &MachineSinkingID;
309 
310  /// MachineCopyPropagation - This pass performs copy propagation on
311  /// machine instructions.
312  extern char &MachineCopyPropagationID;
313 
314  /// PeepholeOptimizer - This pass performs peephole optimizations -
315  /// like extension and comparison eliminations.
316  extern char &PeepholeOptimizerID;
317 
318  /// OptimizePHIs - This pass optimizes machine instruction PHIs
319  /// to take advantage of opportunities created during DAG legalization.
320  extern char &OptimizePHIsID;
321 
322  /// StackSlotColoring - This pass performs stack slot coloring.
323  extern char &StackSlotColoringID;
324 
325  /// This pass lays out funclets contiguously.
326  extern char &FuncletLayoutID;
327 
328  /// This pass inserts the XRay instrumentation sleds if they are supported by
329  /// the target platform.
330  extern char &XRayInstrumentationID;
331 
332  /// This pass inserts FEntry calls
333  extern char &FEntryInserterID;
334 
335  /// This pass implements the "patchable-function" attribute.
336  extern char &PatchableFunctionID;
337 
338  /// createStackProtectorPass - This pass adds stack protectors to functions.
339  ///
340  FunctionPass *createStackProtectorPass();
341 
342  /// createMachineVerifierPass - This pass verifies cenerated machine code
343  /// instructions for correctness.
344  ///
345  FunctionPass *createMachineVerifierPass(const std::string& Banner);
346 
347  /// createDwarfEHPass - This pass mulches exception handling code into a form
348  /// adapted to code generation. Required if using dwarf exception handling.
349  FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel);
350 
351  /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
352  /// in addition to the Itanium LSDA based personalities.
353  FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
354 
355  /// createSjLjEHPreparePass - This pass adapts exception handling code to use
356  /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
357  ///
358  FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
359 
360  /// createWasmEHPass - This pass adapts exception handling code to use
361  /// WebAssembly's exception handling scheme.
362  FunctionPass *createWasmEHPass();
363 
364  /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
365  /// slots relative to one another and allocates base registers to access them
366  /// when it is estimated by the target to be out of range of normal frame
367  /// pointer or stack pointer index addressing.
368  extern char &LocalStackSlotAllocationID;
369 
370  /// This pass expands pseudo-instructions, reserves registers and adjusts
371  /// machine frame information.
372  extern char &FinalizeISelID;
373 
374  /// UnpackMachineBundles - This pass unpack machine instruction bundles.
375  extern char &UnpackMachineBundlesID;
376 
377  FunctionPass *
378  createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
379 
380  /// FinalizeMachineBundles - This pass finalize machine instruction
381  /// bundles (created earlier, e.g. during pre-RA scheduling).
382  extern char &FinalizeMachineBundlesID;
383 
384  /// StackMapLiveness - This pass analyses the register live-out set of
385  /// stackmap/patchpoint intrinsics and attaches the calculated information to
386  /// the intrinsic for later emission to the StackMap.
387  extern char &StackMapLivenessID;
388 
389  /// LiveDebugValues pass
390  extern char &LiveDebugValuesID;
391 
392  /// createJumpInstrTables - This pass creates jump-instruction tables.
393  ModulePass *createJumpInstrTablesPass();
394 
395  /// InterleavedAccess Pass - This pass identifies and matches interleaved
396  /// memory accesses to target specific intrinsics.
397  ///
398  FunctionPass *createInterleavedAccessPass();
399 
400  /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
401  /// combines them into wide loads detectable by InterleavedAccessPass
402  ///
403  FunctionPass *createInterleavedLoadCombinePass();
404 
405  /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
406  /// TLS variables for the emulated TLS model.
407  ///
408  ModulePass *createLowerEmuTLSPass();
409 
410  /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
411  /// instructions. This is unsafe to do earlier because a pass may combine the
412  /// constant initializer into the load, which may result in an overflowing
413  /// evaluation.
415 
416  /// GlobalMerge - This pass merges internal (by default) globals into structs
417  /// to enable reuse of a base pointer by indexed addressing modes.
418  /// It can also be configured to focus on size optimizations only.
419  ///
420  Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
421  bool OnlyOptimizeForSize = false,
422  bool MergeExternalByDefault = false);
423 
424  /// This pass splits the stack into a safe stack and an unsafe stack to
425  /// protect against stack-based overflow vulnerabilities.
426  FunctionPass *createSafeStackPass();
427 
428  /// This pass detects subregister lanes in a virtual register that are used
429  /// independently of other lanes and splits them into separate virtual
430  /// registers.
431  extern char &RenameIndependentSubregsID;
432 
433  /// This pass is executed POST-RA to collect which physical registers are
434  /// preserved by given machine function.
435  FunctionPass *createRegUsageInfoCollector();
436 
437  /// Return a MachineFunction pass that identifies call sites
438  /// and propagates register usage information of callee to caller
439  /// if available with PysicalRegisterUsageInfo pass.
440  FunctionPass *createRegUsageInfoPropPass();
441 
442  /// This pass performs software pipelining on machine instructions.
443  extern char &MachinePipelinerID;
444 
445  /// This pass frees the memory occupied by the MachineFunction.
446  FunctionPass *createFreeMachineFunctionPass();
447 
448  /// This pass performs outlining on machine instructions directly before
449  /// printing assembly.
450  ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
451 
452  /// This pass expands the experimental reduction intrinsics into sequences of
453  /// shuffles.
454  FunctionPass *createExpandReductionsPass();
455 
456  // This pass replaces intrinsics operating on vector operands with calls to
457  // the corresponding function in a vector library (e.g., SVML, libmvec).
458  FunctionPass *createReplaceWithVeclibLegacyPass();
459 
460  /// This pass expands the vector predication intrinsics into unpredicated
461  /// instructions with selects or just the explicit vector length into the
462  /// predicate mask.
463  FunctionPass *createExpandVectorPredicationPass();
464 
465  // This pass expands memcmp() to load/stores.
466  FunctionPass *createExpandMemCmpPass();
467 
468  /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
469  FunctionPass *createBreakFalseDeps();
470 
471  // This pass expands indirectbr instructions.
472  FunctionPass *createIndirectBrExpandPass();
473 
474  /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
475  FunctionPass *createCFIInstrInserter();
476 
477  /// Creates CFGuard longjmp target identification pass.
478  /// \see CFGuardLongjmp.cpp
479  FunctionPass *createCFGuardLongjmpPass();
480 
481  /// Creates EHContGuard catchret target identification pass.
482  /// \see EHContGuardCatchret.cpp
483  FunctionPass *createEHContGuardCatchretPass();
484 
485  /// Create Hardware Loop pass. \see HardwareLoops.cpp
486  FunctionPass *createHardwareLoopsPass();
487 
488  /// This pass inserts pseudo probe annotation for callsite profiling.
489  FunctionPass *createPseudoProbeInserter();
490 
491  /// Create IR Type Promotion pass. \see TypePromotion.cpp
492  FunctionPass *createTypePromotionPass();
493 
494  /// Add Flow Sensitive Discriminators. PassNum specifies the
495  /// sequence number of this pass (starting from 1).
496  FunctionPass *
498 
499  /// Creates MIR Debugify pass. \see MachineDebugify.cpp
500  ModulePass *createDebugifyMachineModulePass();
501 
502  /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
503  /// If OnlyDebugified is true then it will only strip debug info if it was
504  /// added by a Debugify pass. The module will be left unchanged if the debug
505  /// info was generated by another source such as clang.
506  ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
507 
508  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
509  ModulePass *createCheckDebugMachineModulePass();
510 
511  /// The pass fixups statepoint machine instruction to replace usage of
512  /// caller saved registers with stack slots.
513  extern char &FixupStatepointCallerSavedID;
514 
515  /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
516  /// or split the data to two <128 x i32>.
517  FunctionPass *createX86LowerAMXTypePass();
518 
519  /// The pass insert tile config intrinsics for AMX fast register allocation.
520  FunctionPass *createX86PreAMXConfigPass();
521 
522  /// The pass transforms amx intrinsics to scalar operation if the function has
523  /// optnone attribute or it is O0.
524  FunctionPass *createX86LowerAMXIntrinsicsPass();
525 } // End llvm namespace
526 
527 #endif
llvm::createX86LowerAMXTypePass
FunctionPass * createX86LowerAMXTypePass()
The pass transforms load/store <256 x i32> to AMX load/store intrinsics or split the data to two <128...
Definition: X86LowerAMXType.cpp:686
llvm::createFastRegisterAllocator
FunctionPass * createFastRegisterAllocator()
FastRegisterAllocation Pass - This pass register allocates as fast as possible.
Definition: RegAllocFast.cpp:1551
llvm::createCheckDebugMachineModulePass
ModulePass * createCheckDebugMachineModulePass()
Creates MIR Check Debug pass.
Definition: MachineCheckDebugify.cpp:124
llvm::OptimizePHIsID
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
Definition: OptimizePHIs.cpp:69
llvm
Definition: AllocatorList.h:23
llvm::createGreedyRegisterAllocator
FunctionPass * createGreedyRegisterAllocator()
Greedy register allocation pass - This pass implements a global register allocator for optimized buil...
Definition: RegAllocGreedy.cpp:635
llvm::LiveStacksID
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
Definition: LiveStacks.cpp:33
Pass
print lazy value Lazy Value Info Printer Pass
Definition: LazyValueInfo.cpp:1947
llvm::createMachineFunctionSplitterPass
MachineFunctionPass * createMachineFunctionSplitterPass()
createMachineFunctionSplitterPass - This pass splits machine functions using profile information.
llvm::PeepholeOptimizerID
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
Definition: PeepholeOptimizer.cpp:443
llvm::RABasicID
char & RABasicID
Basic register allocator.
Definition: RegAllocBasic.cpp:132
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::createDefaultPBQPRegisterAllocator
FunctionPass * createDefaultPBQPRegisterAllocator()
PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean Quadratic Prograaming (PBQ...
Definition: RegAllocPBQP.cpp:951
llvm::PHIEliminationID
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions.
Definition: PHIElimination.cpp:129
llvm::MachinePipelinerID
char & MachinePipelinerID
This pass performs software pipelining on machine instructions.
Definition: MachinePipeliner.cpp:184
llvm::createVirtRegRewriter
FunctionPass * createVirtRegRewriter(bool ClearVirtRegs=true)
Definition: VirtRegMap.cpp:646
llvm::UnpackMachineBundlesID
char & UnpackMachineBundlesID
UnpackMachineBundles - This pass unpack machine instruction bundles.
Definition: MachineInstrBundle.cpp:41
llvm::ExpandPostRAPseudosID
char & ExpandPostRAPseudosID
ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.
Definition: ExpandPostRAPseudos.cpp:59
llvm::createPrologEpilogInserterPass
MachineFunctionPass * createPrologEpilogInserterPass()
Definition: PrologEpilogInserter.cpp:155
Discriminator.h
llvm::LocalStackSlotAllocationID
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
Definition: LocalStackSlotAllocation.cpp:109
llvm::createGCInfoPrinter
FunctionPass * createGCInfoPrinter(raw_ostream &OS)
Creates a pass to print GC metadata.
Definition: GCMetadata.cpp:92
llvm::MIRAddFSDiscriminatorsID
char & MIRAddFSDiscriminatorsID
This pass adds flow sensitive discriminators.
llvm::SpillPlacementID
char & SpillPlacementID
SpillPlacement analysis.
Definition: SpillPlacement.cpp:50
llvm::StackSlotColoringID
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
Definition: StackSlotColoring.cpp:132
llvm::MachineCopyPropagationID
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
Definition: MachineCopyPropagation.cpp:308
llvm::TwoAddressInstructionPassID
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
Definition: TwoAddressInstructionPass.cpp:192
llvm::MachineLICMID
char & MachineLICMID
This pass performs loop invariant code motion on machine instructions.
Definition: MachineLICM.cpp:294
llvm::createUnreachableBlockEliminationPass
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
llvm::MIRCanonicalizerID
char & MIRCanonicalizerID
MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs according to the semantics of the in...
Definition: MIRCanonicalizerPass.cpp:42
llvm::createExpandMemCmpPass
FunctionPass * createExpandMemCmpPass()
Definition: ExpandMemCmp.cpp:917
llvm::sampleprof::FSDiscriminatorPass
FSDiscriminatorPass
Definition: Discriminator.h:57
llvm::EdgeBundlesID
char & EdgeBundlesID
EdgeBundles analysis - Bundle machine CFG edges.
llvm::LiveDebugValuesID
char & LiveDebugValuesID
LiveDebugValues pass.
Definition: LiveDebugValues.cpp:69
llvm::createLowerEmuTLSPass
ModulePass * createLowerEmuTLSPass()
LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all TLS variables for the emulated ...
llvm::createDwarfEHPass
FunctionPass * createDwarfEHPass(CodeGenOpt::Level OptLevel)
createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation.
Definition: DwarfEHPrepare.cpp:325
llvm::createEHContGuardCatchretPass
FunctionPass * createEHContGuardCatchretPass()
Creates EHContGuard catchret target identification pass.
llvm::PrologEpilogCodeInserterID
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
Definition: PrologEpilogInserter.cpp:139
llvm::FEntryInserterID
char & FEntryInserterID
This pass inserts FEntry calls.
Definition: FEntryInserter.cpp:51
llvm::PostRAHazardRecognizerID
char & PostRAHazardRecognizerID
PostRAHazardRecognizer - This pass runs the post-ra hazard recognizer.
Definition: PostRAHazardRecognizer.cpp:64
llvm::createPreISelIntrinsicLoweringPass
ModulePass * createPreISelIntrinsicLoweringPass()
This pass lowers the @llvm.load.relative and @llvm.objc.
llvm::FuncletLayoutID
char & FuncletLayoutID
This pass lays out funclets contiguously.
Definition: FuncletLayout.cpp:39
llvm::GCMachineCodeAnalysisID
char & GCMachineCodeAnalysisID
GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.
Definition: GCRootLowering.cpp:240
llvm::createReplaceWithVeclibLegacyPass
FunctionPass * createReplaceWithVeclibLegacyPass()
Definition: ReplaceWithVeclib.cpp:252
llvm::MachineTraceMetricsID
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
Definition: MachineTraceMetrics.cpp:46
llvm::createResetMachineFunctionPass
MachineFunctionPass * createResetMachineFunctionPass(bool EmitFallbackDiag, bool AbortOnFailedISel)
This pass resets a MachineFunction when it has the FailedISel property as if it was just created.
llvm::RegisterCoalescerID
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
Definition: RegisterCoalescer.cpp:405
llvm::EarlyIfConverterID
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions.
Definition: EarlyIfConversion.cpp:784
llvm::createAtomicExpandPass
FunctionPass * createAtomicExpandPass()
llvm::createX86LowerAMXIntrinsicsPass
FunctionPass * createX86LowerAMXIntrinsicsPass()
The pass transforms amx intrinsics to scalar operation if the function has optnone attribute or it is...
Definition: X86LowerAMXIntrinsics.cpp:677
llvm::createCFIInstrInserter
FunctionPass * createCFIInstrInserter()
Creates CFI Instruction Inserter pass.
llvm::AtomicExpandID
char & AtomicExpandID
AtomicExpandID – Lowers atomic operations in terms of either cmpxchg load-linked/store-conditional lo...
Definition: AtomicExpandPass.cpp:129
llvm::StackMapLivenessID
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
Definition: StackMapLivenessAnalysis.cpp:86
llvm::createShadowStackGCLoweringPass
FunctionPass * createShadowStackGCLoweringPass()
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC.
Definition: ShadowStackGCLowering.cpp:100
llvm::createMachineOutlinerPass
ModulePass * createMachineOutlinerPass(bool RunOnAllFunctions=true)
This pass performs outlining on machine instructions directly before printing assembly.
Definition: MachineOutliner.cpp:443
llvm::createMachineFunctionPrinterPass
MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")
MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...
llvm::EarlyTailDuplicateID
char & EarlyTailDuplicateID
Duplicate blocks with unconditional branches into tails of their predecessors.
Definition: TailDuplication.cpp:77
llvm::VirtRegRewriterID
char & VirtRegRewriterID
VirtRegRewriter pass.
Definition: VirtRegMap.cpp:220
llvm::MachineLoopInfoID
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
Definition: MachineLoopInfo.cpp:43
llvm::StackColoringID
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
Definition: StackColoring.cpp:551
llvm::RAGreedyID
char & RAGreedyID
Greedy register allocator.
Definition: RegAllocGreedy.cpp:599
llvm::MachineSinkingID
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
Definition: MachineSink.cpp:256
llvm::DetectDeadLanesID
char & DetectDeadLanesID
This pass adds dead/undef flags after analyzing subregister lanes.
Definition: DetectDeadLanes.cpp:128
llvm::createPrintMIRPass
MachineFunctionPass * createPrintMIRPass(raw_ostream &OS)
MIRPrinting pass - this pass prints out the LLVM IR into the given stream using the MIR serialization...
Definition: MIRPrintingPass.cpp:66
llvm::FinalizeMachineBundlesID
char & FinalizeMachineBundlesID
FinalizeMachineBundles - This pass finalize machine instruction bundles (created earlier,...
Definition: MachineInstrBundle.cpp:98
llvm::createUnpackMachineBundles
FunctionPass * createUnpackMachineBundles(std::function< bool(const MachineFunction &)> Ftor)
Definition: MachineInstrBundle.cpp:80
llvm::createRegUsageInfoPropPass
FunctionPass * createRegUsageInfoPropPass()
Return a MachineFunction pass that identifies call sites and propagates register usage information of...
Definition: RegUsageInfoPropagate.cpp:155
llvm::createMachineVerifierPass
FunctionPass * createMachineVerifierPass(const std::string &Banner)
createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness.
llvm::LiveRangeShrinkID
char & LiveRangeShrinkID
LiveRangeShrink pass.
Definition: LiveRangeShrink.cpp:65
llvm::LiveVariablesID
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
Definition: LiveVariables.cpp:45
llvm::MachineCSEID
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
Definition: MachineCSE.cpp:153
llvm::FinalizeISelID
char & FinalizeISelID
This pass expands pseudo-instructions, reserves registers and adjusts machine frame information.
Definition: FinalizeISel.cpp:44
llvm::createExpandReductionsPass
FunctionPass * createExpandReductionsPass()
This pass expands the experimental reduction intrinsics into sequences of shuffles.
Definition: ExpandReductions.cpp:202
llvm::createTypePromotionPass
FunctionPass * createTypePromotionPass()
Create IR Type Promotion pass.
Definition: TypePromotion.cpp:1017
llvm::createGCLoweringPass
FunctionPass * createGCLoweringPass()
GCLowering Pass - Used by gc.root to perform its default lowering operations.
llvm::createExpandVectorPredicationPass
FunctionPass * createExpandVectorPredicationPass()
This pass expands the vector predication intrinsics into unpredicated instructions with selects or ju...
Definition: ExpandVectorPredication.cpp:456
function
print Print MemDeps of function
Definition: MemDepPrinter.cpp:83
llvm::ProcessImplicitDefsID
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
Definition: ProcessImplicitDefs.cpp:52
llvm::PatchableFunctionID
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
Definition: PatchableFunction.cpp:96
llvm::MachineBlockPlacementStatsID
char & MachineBlockPlacementStatsID
MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...
Definition: MachineBlockPlacement.cpp:3456
llvm::createFreeMachineFunctionPass
FunctionPass * createFreeMachineFunctionPass()
This pass frees the memory occupied by the MachineFunction.
Definition: MachineModuleInfo.cpp:351
llvm::createSjLjEHPreparePass
FunctionPass * createSjLjEHPreparePass(const TargetMachine *TM)
createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...
llvm::createX86PreAMXConfigPass
FunctionPass * createX86PreAMXConfigPass()
The pass insert tile config intrinsics for AMX fast register allocation.
Definition: X86PreAMXConfig.cpp:420
llvm::XRayInstrumentationID
char & XRayInstrumentationID
This pass inserts the XRay instrumentation sleds if they are supported by the target platform.
Definition: XRayInstrumentation.cpp:263
llvm::UnreachableMachineBlockElimID
char & UnreachableMachineBlockElimID
UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.
llvm::createHardwareLoopsPass
FunctionPass * createHardwareLoopsPass()
Create Hardware Loop pass.
Definition: HardwareLoops.cpp:535
llvm::createStripDebugMachineModulePass
ModulePass * createStripDebugMachineModulePass(bool OnlyDebugified)
Creates MIR Strip Debug pass.
Definition: MachineStripDebug.cpp:109
llvm::BranchFolderPassID
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
Definition: BranchFolding.cpp:114
llvm::MachineBlockPlacementID
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
Definition: MachineBlockPlacement.cpp:590
llvm::createIndirectBrExpandPass
FunctionPass * createIndirectBrExpandPass()
Definition: IndirectBrExpandPass.cpp:81
llvm::MachineRegionInfoPassID
char & MachineRegionInfoPassID
MachineRegionInfo - This pass computes SESE regions for machine functions.
Definition: MachineRegionInfo.cpp:129
llvm::ShrinkWrapID
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:250
llvm::createWinEHPass
FunctionPass * createWinEHPass(bool DemoteCatchSwitchPHIOnly=false)
createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...
llvm::createDebugifyMachineModulePass
ModulePass * createDebugifyMachineModulePass()
Creates MIR Debugify pass.
Definition: MachineDebugify.cpp:200
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::RenameIndependentSubregsID
char & RenameIndependentSubregsID
This pass detects subregister lanes in a virtual register that are used independently of other lanes ...
Definition: RenameIndependentSubregs.cpp:113
llvm::FixupStatepointCallerSavedID
char & FixupStatepointCallerSavedID
The pass fixups statepoint machine instruction to replace usage of caller saved registers with stack ...
Definition: FixupStatepointCallerSaved.cpp:88
llvm::createInterleavedAccessPass
FunctionPass * createInterleavedAccessPass()
InterleavedAccess Pass - This pass identifies and matches interleaved memory accesses to target speci...
Definition: InterleavedAccessPass.cpp:145
llvm::createRegUsageInfoCollector
FunctionPass * createRegUsageInfoCollector()
This pass is executed POST-RA to collect which physical registers are preserved by given machine func...
Definition: RegUsageInfoCollector.cpp:76
llvm::createMIRAddFSDiscriminatorsPass
FunctionPass * createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P)
Add Flow Sensitive Discriminators.
llvm::createBreakFalseDeps
FunctionPass * createBreakFalseDeps()
Creates Break False Dependencies pass.
Definition: BreakFalseDeps.cpp:105
llvm::createJumpInstrTablesPass
ModulePass * createJumpInstrTablesPass()
createJumpInstrTables - This pass creates jump-instruction tables.
llvm::createBasicBlockSectionsPass
MachineFunctionPass * createBasicBlockSectionsPass(const MemoryBuffer *Buf)
createBasicBlockSections Pass - This pass assigns sections to machine basic blocks and is enabled wit...
Definition: BasicBlockSections.cpp:519
llvm::createWasmEHPass
FunctionPass * createWasmEHPass()
createWasmEHPass - This pass adapts exception handling code to use WebAssembly's exception handling s...
Definition: WasmEHPrepare.cpp:144
llvm::createPseudoProbeInserter
FunctionPass * createPseudoProbeInserter()
This pass inserts pseudo probe annotation for callsite profiling.
Definition: PseudoProbeInserter.cpp:173
llvm::MachineFunctionPrinterPassID
char & MachineFunctionPrinterPassID
MachineFunctionPrinterPass - This pass prints out MachineInstr's.
Definition: MachineFunctionPrinterPass.cpp:58
llvm::TailDuplicateID
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
Definition: TailDuplication.cpp:76
llvm::DeadMachineInstructionElimID
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
Definition: DeadMachineInstructionElim.cpp:57
llvm::createIfConverter
FunctionPass * createIfConverter(std::function< bool(const MachineFunction &)> Ftor)
Definition: IfConversion.cpp:2366
llvm::createGlobalMergePass
Pass * createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, bool OnlyOptimizeForSize=false, bool MergeExternalByDefault=false)
GlobalMerge - This pass merges internal (by default) globals into structs to enable reuse of a base p...
Definition: GlobalMerge.cpp:680
llvm::BranchRelaxationPassID
char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
Definition: BranchRelaxation.cpp:119
llvm::MachineSchedulerID
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
Definition: MachineScheduler.cpp:210
CodeGen.h
llvm::MachineDominanceFrontierID
char & MachineDominanceFrontierID
MachineDominanaceFrontier - This pass is a machine dominators analysis.
Definition: MachineDominanceFrontier.cpp:38
llvm::PostRASchedulerID
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
Definition: PostRASchedulerList.cpp:199
llvm::MachineDominatorsID
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
llvm::MachineCombinerID
char & MachineCombinerID
This pass performs instruction combining using trace metrics to estimate critical-path and resource d...
Definition: MachineCombiner.cpp:130
llvm::MIRPrintingPassID
char & MIRPrintingPassID
MIRPrintingPass - this pass prints out the LLVM IR using the MIR serialization format.
Definition: MIRPrintingPass.cpp:61
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::createBasicRegisterAllocator
FunctionPass * createBasicRegisterAllocator()
BasicRegisterAllocation Pass - This pass implements a degenerate global register allocator using the ...
Definition: RegAllocBasic.cpp:335
llvm::ImplicitNullChecksID
char & ImplicitNullChecksID
ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.
Definition: ImplicitNullChecks.cpp:816
llvm::EarlyMachineLICMID
char & EarlyMachineLICMID
This pass performs loop invariant code motion on machine instructions.
Definition: MachineLICM.cpp:295
llvm::createInterleavedLoadCombinePass
FunctionPass * createInterleavedLoadCombinePass()
InterleavedLoadCombines Pass - This pass identifies interleaved loads and combines them into wide loa...
Definition: InterleavedLoadCombinePass.cpp:1363
llvm::PostMachineSchedulerID
char & PostMachineSchedulerID
PostMachineScheduler - This pass schedules machine instructions postRA.
Definition: MachineScheduler.cpp:241
llvm::PostRAMachineSinkingID
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
Definition: MachineSink.cpp:1561
llvm::IfConverterID
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
Definition: IfConversion.cpp:436
llvm::createSafeStackPass
FunctionPass * createSafeStackPass()
This pass splits the stack into a safe stack and an unsafe stack to protect against stack-based overf...
Definition: SafeStack.cpp:943
llvm::LiveIntervalsID
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers.
Definition: LiveIntervals.cpp:64
llvm::createCodeGenPreparePass
FunctionPass * createCodeGenPreparePass()
createCodeGenPreparePass - Transform the code to expose more pattern matching during instruction sele...
Definition: CodeGenPrepare.cpp:453
llvm::EarlyIfPredicatorID
char & EarlyIfPredicatorID
EarlyIfPredicator - This pass performs if-conversion on SSA form by predicating if/else block and ins...
Definition: EarlyIfConversion.cpp:1109
llvm::createStackProtectorPass
FunctionPass * createStackProtectorPass()
createStackProtectorPass - This pass adds stack protectors to functions.
Definition: StackProtector.cpp:77
llvm::createCFGuardLongjmpPass
FunctionPass * createCFGuardLongjmpPass()
Creates CFGuard longjmp target identification pass.