LLVM  14.0.0git
Passes.h
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1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines interfaces to access the target independent code generation
10 // passes provided by the LLVM backend.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_PASSES_H
15 #define LLVM_CODEGEN_PASSES_H
16 
17 #include "llvm/Support/CodeGen.h"
20 
21 #include <functional>
22 #include <string>
23 
24 namespace llvm {
25 
26 class FunctionPass;
27 class MachineFunction;
28 class MachineFunctionPass;
29 class MemoryBuffer;
30 class ModulePass;
31 class Pass;
32 class TargetMachine;
33 class raw_ostream;
34 
35 } // End llvm namespace
36 
37 // List of target independent CodeGen pass IDs.
38 namespace llvm {
39 
40  /// AtomicExpandPass - At IR level this pass replace atomic instructions with
41  /// __atomic_* library calls, or target specific instruction which implement the
42  /// same semantics in a way which better fits the target backend.
43  FunctionPass *createAtomicExpandPass();
44 
45  /// createUnreachableBlockEliminationPass - The LLVM code generator does not
46  /// work well with unreachable basic blocks (what live ranges make sense for a
47  /// block that cannot be reached?). As such, a code generator should either
48  /// not instruction select unreachable blocks, or run this pass as its
49  /// last LLVM modifying pass to clean up blocks that are not reachable from
50  /// the entry block.
52 
53  /// createBasicBlockSections Pass - This pass assigns sections to machine
54  /// basic blocks and is enabled with -fbasic-block-sections. Buf is a memory
55  /// buffer that contains the list of functions and basic block ids to
56  /// selectively enable basic block sections.
57  MachineFunctionPass *createBasicBlockSectionsPass(const MemoryBuffer *Buf);
58 
59  /// createMachineFunctionSplitterPass - This pass splits machine functions
60  /// using profile information.
61  MachineFunctionPass *createMachineFunctionSplitterPass();
62 
63  /// MachineFunctionPrinter pass - This pass prints out the machine function to
64  /// the given stream as a debugging tool.
65  MachineFunctionPass *
66  createMachineFunctionPrinterPass(raw_ostream &OS,
67  const std::string &Banner ="");
68 
69  /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
70  /// using the MIR serialization format.
71  MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
72 
73  /// This pass resets a MachineFunction when it has the FailedISel property
74  /// as if it was just created.
75  /// If EmitFallbackDiag is true, the pass will emit a
76  /// DiagnosticInfoISelFallback for every MachineFunction it resets.
77  /// If AbortOnFailedISel is true, abort compilation instead of resetting.
78  MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
79  bool AbortOnFailedISel);
80 
81  /// createCodeGenPreparePass - Transform the code to expose more pattern
82  /// matching during instruction selection.
83  FunctionPass *createCodeGenPreparePass();
84 
85  /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
86  /// load-linked/store-conditional loops.
87  extern char &AtomicExpandID;
88 
89  /// MachineLoopInfo - This pass is a loop analysis pass.
90  extern char &MachineLoopInfoID;
91 
92  /// MachineDominators - This pass is a machine dominators analysis pass.
93  extern char &MachineDominatorsID;
94 
95  /// MachineDominanaceFrontier - This pass is a machine dominators analysis.
96  extern char &MachineDominanceFrontierID;
97 
98  /// MachineRegionInfo - This pass computes SESE regions for machine functions.
99  extern char &MachineRegionInfoPassID;
100 
101  /// EdgeBundles analysis - Bundle machine CFG edges.
102  extern char &EdgeBundlesID;
103 
104  /// LiveVariables pass - This pass computes the set of blocks in which each
105  /// variable is life and sets machine operand kill flags.
106  extern char &LiveVariablesID;
107 
108  /// PHIElimination - This pass eliminates machine instruction PHI nodes
109  /// by inserting copy instructions. This destroys SSA information, but is the
110  /// desired input for some register allocators. This pass is "required" by
111  /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
112  extern char &PHIEliminationID;
113 
114  /// LiveIntervals - This analysis keeps track of the live ranges of virtual
115  /// and physical registers.
116  extern char &LiveIntervalsID;
117 
118  /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
119  extern char &LiveStacksID;
120 
121  /// TwoAddressInstruction - This pass reduces two-address instructions to
122  /// use two operands. This destroys SSA information but it is desired by
123  /// register allocators.
124  extern char &TwoAddressInstructionPassID;
125 
126  /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
127  extern char &ProcessImplicitDefsID;
128 
129  /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
130  extern char &RegisterCoalescerID;
131 
132  /// MachineScheduler - This pass schedules machine instructions.
133  extern char &MachineSchedulerID;
134 
135  /// PostMachineScheduler - This pass schedules machine instructions postRA.
136  extern char &PostMachineSchedulerID;
137 
138  /// SpillPlacement analysis. Suggest optimal placement of spill code between
139  /// basic blocks.
140  extern char &SpillPlacementID;
141 
142  /// ShrinkWrap pass. Look for the best place to insert save and restore
143  // instruction and update the MachineFunctionInfo with that information.
144  extern char &ShrinkWrapID;
145 
146  /// LiveRangeShrink pass. Move instruction close to its definition to shrink
147  /// the definition's live range.
148  extern char &LiveRangeShrinkID;
149 
150  /// Greedy register allocator.
151  extern char &RAGreedyID;
152 
153  /// Basic register allocator.
154  extern char &RABasicID;
155 
156  /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
157  /// assigned in VirtRegMap.
158  extern char &VirtRegRewriterID;
159  FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
160 
161  /// UnreachableMachineBlockElimination - This pass removes unreachable
162  /// machine basic blocks.
163  extern char &UnreachableMachineBlockElimID;
164 
165  /// DeadMachineInstructionElim - This pass removes dead machine instructions.
166  extern char &DeadMachineInstructionElimID;
167 
168  /// This pass adds dead/undef flags after analyzing subregister lanes.
169  extern char &DetectDeadLanesID;
170 
171  /// This pass perform post-ra machine sink for COPY instructions.
172  extern char &PostRAMachineSinkingID;
173 
174  /// This pass adds flow sensitive discriminators.
175  extern char &MIRAddFSDiscriminatorsID;
176 
177  /// This pass reads flow sensitive profile.
178  extern char &MIRProfileLoaderPassID;
179 
180  /// FastRegisterAllocation Pass - This pass register allocates as fast as
181  /// possible. It is best suited for debug code where live ranges are short.
182  ///
183  FunctionPass *createFastRegisterAllocator();
185  bool ClearVirtRegs);
186 
187  /// BasicRegisterAllocation Pass - This pass implements a degenerate global
188  /// register allocator using the basic regalloc framework.
189  ///
190  FunctionPass *createBasicRegisterAllocator();
192 
193  /// Greedy register allocation pass - This pass implements a global register
194  /// allocator for optimized builds.
195  ///
196  FunctionPass *createGreedyRegisterAllocator();
198 
199  /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
200  /// Quadratic Prograaming (PBQP) based register allocator.
201  ///
202  FunctionPass *createDefaultPBQPRegisterAllocator();
203 
204  /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
205  /// and eliminates abstract frame references.
206  extern char &PrologEpilogCodeInserterID;
207  MachineFunctionPass *createPrologEpilogInserterPass();
208 
209  /// ExpandPostRAPseudos - This pass expands pseudo instructions after
210  /// register allocation.
211  extern char &ExpandPostRAPseudosID;
212 
213  /// PostRAHazardRecognizer - This pass runs the post-ra hazard
214  /// recognizer.
215  extern char &PostRAHazardRecognizerID;
216 
217  /// PostRAScheduler - This pass performs post register allocation
218  /// scheduling.
219  extern char &PostRASchedulerID;
220 
221  /// BranchFolding - This pass performs machine code CFG based
222  /// optimizations to delete branches to branches, eliminate branches to
223  /// successor blocks (creating fall throughs), and eliminating branches over
224  /// branches.
225  extern char &BranchFolderPassID;
226 
227  /// BranchRelaxation - This pass replaces branches that need to jump further
228  /// than is supported by a branch instruction.
229  extern char &BranchRelaxationPassID;
230 
231  /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
232  extern char &MachineFunctionPrinterPassID;
233 
234  /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
235  /// serialization format.
236  extern char &MIRPrintingPassID;
237 
238  /// TailDuplicate - Duplicate blocks with unconditional branches
239  /// into tails of their predecessors.
240  extern char &TailDuplicateID;
241 
242  /// Duplicate blocks with unconditional branches into tails of their
243  /// predecessors. Variant that works before register allocation.
244  extern char &EarlyTailDuplicateID;
245 
246  /// MachineTraceMetrics - This pass computes critical path and CPU resource
247  /// usage in an ensemble of traces.
248  extern char &MachineTraceMetricsID;
249 
250  /// EarlyIfConverter - This pass performs if-conversion on SSA form by
251  /// inserting cmov instructions.
252  extern char &EarlyIfConverterID;
253 
254  /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
255  /// predicating if/else block and insert select at the join point.
256  extern char &EarlyIfPredicatorID;
257 
258  /// This pass performs instruction combining using trace metrics to estimate
259  /// critical-path and resource depth.
260  extern char &MachineCombinerID;
261 
262  /// StackSlotColoring - This pass performs stack coloring and merging.
263  /// It merges disjoint allocas to reduce the stack size.
264  extern char &StackColoringID;
265 
266  /// IfConverter - This pass performs machine code if conversion.
267  extern char &IfConverterID;
268 
269  FunctionPass *createIfConverter(
270  std::function<bool(const MachineFunction &)> Ftor);
271 
272  /// MachineBlockPlacement - This pass places basic blocks based on branch
273  /// probabilities.
274  extern char &MachineBlockPlacementID;
275 
276  /// MachineBlockPlacementStats - This pass collects statistics about the
277  /// basic block placement using branch probabilities and block frequency
278  /// information.
279  extern char &MachineBlockPlacementStatsID;
280 
281  /// GCLowering Pass - Used by gc.root to perform its default lowering
282  /// operations.
283  FunctionPass *createGCLoweringPass();
284 
285  /// GCLowering Pass - Used by gc.root to perform its default lowering
286  /// operations.
287  extern char &GCLoweringID;
288 
289  /// ShadowStackGCLowering - Implements the custom lowering mechanism
290  /// used by the shadow stack GC. Only runs on functions which opt in to
291  /// the shadow stack collector.
292  FunctionPass *createShadowStackGCLoweringPass();
293 
294  /// ShadowStackGCLowering - Implements the custom lowering mechanism
295  /// used by the shadow stack GC.
296  extern char &ShadowStackGCLoweringID;
297 
298  /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
299  /// in machine code. Must be added very late during code generation, just
300  /// prior to output, and importantly after all CFG transformations (such as
301  /// branch folding).
302  extern char &GCMachineCodeAnalysisID;
303 
304  /// Creates a pass to print GC metadata.
305  ///
306  FunctionPass *createGCInfoPrinter(raw_ostream &OS);
307 
308  /// MachineCSE - This pass performs global CSE on machine instructions.
309  extern char &MachineCSEID;
310 
311  /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
312  /// according to the semantics of the instruction as well as hoists
313  /// code.
314  extern char &MIRCanonicalizerID;
315 
316  /// ImplicitNullChecks - This pass folds null pointer checks into nearby
317  /// memory operations.
318  extern char &ImplicitNullChecksID;
319 
320  /// This pass performs loop invariant code motion on machine instructions.
321  extern char &MachineLICMID;
322 
323  /// This pass performs loop invariant code motion on machine instructions.
324  /// This variant works before register allocation. \see MachineLICMID.
325  extern char &EarlyMachineLICMID;
326 
327  /// MachineSinking - This pass performs sinking on machine instructions.
328  extern char &MachineSinkingID;
329 
330  /// MachineCopyPropagation - This pass performs copy propagation on
331  /// machine instructions.
332  extern char &MachineCopyPropagationID;
333 
334  /// PeepholeOptimizer - This pass performs peephole optimizations -
335  /// like extension and comparison eliminations.
336  extern char &PeepholeOptimizerID;
337 
338  /// OptimizePHIs - This pass optimizes machine instruction PHIs
339  /// to take advantage of opportunities created during DAG legalization.
340  extern char &OptimizePHIsID;
341 
342  /// StackSlotColoring - This pass performs stack slot coloring.
343  extern char &StackSlotColoringID;
344 
345  /// This pass lays out funclets contiguously.
346  extern char &FuncletLayoutID;
347 
348  /// This pass inserts the XRay instrumentation sleds if they are supported by
349  /// the target platform.
350  extern char &XRayInstrumentationID;
351 
352  /// This pass inserts FEntry calls
353  extern char &FEntryInserterID;
354 
355  /// This pass implements the "patchable-function" attribute.
356  extern char &PatchableFunctionID;
357 
358  /// createStackProtectorPass - This pass adds stack protectors to functions.
359  ///
360  FunctionPass *createStackProtectorPass();
361 
362  /// createMachineVerifierPass - This pass verifies cenerated machine code
363  /// instructions for correctness.
364  ///
365  FunctionPass *createMachineVerifierPass(const std::string& Banner);
366 
367  /// createDwarfEHPass - This pass mulches exception handling code into a form
368  /// adapted to code generation. Required if using dwarf exception handling.
369  FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel);
370 
371  /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
372  /// in addition to the Itanium LSDA based personalities.
373  FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
374 
375  /// createSjLjEHPreparePass - This pass adapts exception handling code to use
376  /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
377  ///
378  FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
379 
380  /// createWasmEHPass - This pass adapts exception handling code to use
381  /// WebAssembly's exception handling scheme.
382  FunctionPass *createWasmEHPass();
383 
384  /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
385  /// slots relative to one another and allocates base registers to access them
386  /// when it is estimated by the target to be out of range of normal frame
387  /// pointer or stack pointer index addressing.
388  extern char &LocalStackSlotAllocationID;
389 
390  /// This pass expands pseudo-instructions, reserves registers and adjusts
391  /// machine frame information.
392  extern char &FinalizeISelID;
393 
394  /// UnpackMachineBundles - This pass unpack machine instruction bundles.
395  extern char &UnpackMachineBundlesID;
396 
397  FunctionPass *
398  createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
399 
400  /// FinalizeMachineBundles - This pass finalize machine instruction
401  /// bundles (created earlier, e.g. during pre-RA scheduling).
402  extern char &FinalizeMachineBundlesID;
403 
404  /// StackMapLiveness - This pass analyses the register live-out set of
405  /// stackmap/patchpoint intrinsics and attaches the calculated information to
406  /// the intrinsic for later emission to the StackMap.
407  extern char &StackMapLivenessID;
408 
409  /// RemoveRedundantDebugValues pass.
410  extern char &RemoveRedundantDebugValuesID;
411 
412  /// LiveDebugValues pass
413  extern char &LiveDebugValuesID;
414 
415  /// createJumpInstrTables - This pass creates jump-instruction tables.
416  ModulePass *createJumpInstrTablesPass();
417 
418  /// InterleavedAccess Pass - This pass identifies and matches interleaved
419  /// memory accesses to target specific intrinsics.
420  ///
421  FunctionPass *createInterleavedAccessPass();
422 
423  /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
424  /// combines them into wide loads detectable by InterleavedAccessPass
425  ///
426  FunctionPass *createInterleavedLoadCombinePass();
427 
428  /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
429  /// TLS variables for the emulated TLS model.
430  ///
431  ModulePass *createLowerEmuTLSPass();
432 
433  /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
434  /// instructions. This is unsafe to do earlier because a pass may combine the
435  /// constant initializer into the load, which may result in an overflowing
436  /// evaluation.
438 
439  /// GlobalMerge - This pass merges internal (by default) globals into structs
440  /// to enable reuse of a base pointer by indexed addressing modes.
441  /// It can also be configured to focus on size optimizations only.
442  ///
443  Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
444  bool OnlyOptimizeForSize = false,
445  bool MergeExternalByDefault = false);
446 
447  /// This pass splits the stack into a safe stack and an unsafe stack to
448  /// protect against stack-based overflow vulnerabilities.
449  FunctionPass *createSafeStackPass();
450 
451  /// This pass detects subregister lanes in a virtual register that are used
452  /// independently of other lanes and splits them into separate virtual
453  /// registers.
454  extern char &RenameIndependentSubregsID;
455 
456  /// This pass is executed POST-RA to collect which physical registers are
457  /// preserved by given machine function.
458  FunctionPass *createRegUsageInfoCollector();
459 
460  /// Return a MachineFunction pass that identifies call sites
461  /// and propagates register usage information of callee to caller
462  /// if available with PysicalRegisterUsageInfo pass.
463  FunctionPass *createRegUsageInfoPropPass();
464 
465  /// This pass performs software pipelining on machine instructions.
466  extern char &MachinePipelinerID;
467 
468  /// This pass frees the memory occupied by the MachineFunction.
469  FunctionPass *createFreeMachineFunctionPass();
470 
471  /// This pass performs outlining on machine instructions directly before
472  /// printing assembly.
473  ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
474 
475  /// This pass expands the experimental reduction intrinsics into sequences of
476  /// shuffles.
477  FunctionPass *createExpandReductionsPass();
478 
479  // This pass replaces intrinsics operating on vector operands with calls to
480  // the corresponding function in a vector library (e.g., SVML, libmvec).
481  FunctionPass *createReplaceWithVeclibLegacyPass();
482 
483  /// This pass expands the vector predication intrinsics into unpredicated
484  /// instructions with selects or just the explicit vector length into the
485  /// predicate mask.
486  FunctionPass *createExpandVectorPredicationPass();
487 
488  // This pass expands memcmp() to load/stores.
489  FunctionPass *createExpandMemCmpPass();
490 
491  /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
492  FunctionPass *createBreakFalseDeps();
493 
494  // This pass expands indirectbr instructions.
495  FunctionPass *createIndirectBrExpandPass();
496 
497  /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
498  FunctionPass *createCFIInstrInserter();
499 
500  /// Creates CFGuard longjmp target identification pass.
501  /// \see CFGuardLongjmp.cpp
502  FunctionPass *createCFGuardLongjmpPass();
503 
504  /// Creates EHContGuard catchret target identification pass.
505  /// \see EHContGuardCatchret.cpp
506  FunctionPass *createEHContGuardCatchretPass();
507 
508  /// Create Hardware Loop pass. \see HardwareLoops.cpp
509  FunctionPass *createHardwareLoopsPass();
510 
511  /// This pass inserts pseudo probe annotation for callsite profiling.
512  FunctionPass *createPseudoProbeInserter();
513 
514  /// Create IR Type Promotion pass. \see TypePromotion.cpp
515  FunctionPass *createTypePromotionPass();
516 
517  /// Add Flow Sensitive Discriminators. PassNum specifies the
518  /// sequence number of this pass (starting from 1).
519  FunctionPass *
521 
522  /// Read Flow Sensitive Profile.
523  FunctionPass *createMIRProfileLoaderPass(std::string File,
524  std::string RemappingFile,
526 
527  /// Creates MIR Debugify pass. \see MachineDebugify.cpp
528  ModulePass *createDebugifyMachineModulePass();
529 
530  /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
531  /// If OnlyDebugified is true then it will only strip debug info if it was
532  /// added by a Debugify pass. The module will be left unchanged if the debug
533  /// info was generated by another source such as clang.
534  ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
535 
536  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
537  ModulePass *createCheckDebugMachineModulePass();
538 
539  /// The pass fixups statepoint machine instruction to replace usage of
540  /// caller saved registers with stack slots.
541  extern char &FixupStatepointCallerSavedID;
542 
543  /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
544  /// or split the data to two <128 x i32>.
545  FunctionPass *createX86LowerAMXTypePass();
546 
547  /// The pass insert tile config intrinsics for AMX fast register allocation.
548  FunctionPass *createX86PreAMXConfigPass();
549 
550  /// The pass transforms amx intrinsics to scalar operation if the function has
551  /// optnone attribute or it is O0.
552  FunctionPass *createX86LowerAMXIntrinsicsPass();
553 } // End llvm namespace
554 
555 #endif
llvm::createX86LowerAMXTypePass
FunctionPass * createX86LowerAMXTypePass()
The pass transforms load/store <256 x i32> to AMX load/store intrinsics or split the data to two <128...
Definition: X86LowerAMXType.cpp:1068
llvm::createFastRegisterAllocator
FunctionPass * createFastRegisterAllocator()
FastRegisterAllocation Pass - This pass register allocates as fast as possible.
Definition: RegAllocFast.cpp:1565
llvm::createCheckDebugMachineModulePass
ModulePass * createCheckDebugMachineModulePass()
Creates MIR Check Debug pass.
Definition: MachineCheckDebugify.cpp:124
llvm::OptimizePHIsID
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
Definition: OptimizePHIs.cpp:69
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
llvm::createGreedyRegisterAllocator
FunctionPass * createGreedyRegisterAllocator()
Greedy register allocation pass - This pass implements a global register allocator for optimized buil...
Definition: RegAllocGreedy.cpp:177
llvm::LiveStacksID
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
Definition: LiveStacks.cpp:33
Pass
print lazy value Lazy Value Info Printer Pass
Definition: LazyValueInfo.cpp:1976
RegAllocCommon.h
llvm::createMachineFunctionSplitterPass
MachineFunctionPass * createMachineFunctionSplitterPass()
createMachineFunctionSplitterPass - This pass splits machine functions using profile information.
llvm::PeepholeOptimizerID
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
Definition: PeepholeOptimizer.cpp:443
llvm::RABasicID
char & RABasicID
Basic register allocator.
Definition: RegAllocBasic.cpp:132
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::createDefaultPBQPRegisterAllocator
FunctionPass * createDefaultPBQPRegisterAllocator()
PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean Quadratic Prograaming (PBQ...
Definition: RegAllocPBQP.cpp:951
llvm::PHIEliminationID
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions.
Definition: PHIElimination.cpp:130
llvm::MachinePipelinerID
char & MachinePipelinerID
This pass performs software pipelining on machine instructions.
Definition: MachinePipeliner.cpp:184
llvm::createVirtRegRewriter
FunctionPass * createVirtRegRewriter(bool ClearVirtRegs=true)
Definition: VirtRegMap.cpp:646
llvm::UnpackMachineBundlesID
char & UnpackMachineBundlesID
UnpackMachineBundles - This pass unpack machine instruction bundles.
Definition: MachineInstrBundle.cpp:41
llvm::ExpandPostRAPseudosID
char & ExpandPostRAPseudosID
ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.
Definition: ExpandPostRAPseudos.cpp:59
llvm::createPrologEpilogInserterPass
MachineFunctionPass * createPrologEpilogInserterPass()
Definition: PrologEpilogInserter.cpp:150
Discriminator.h
llvm::ShadowStackGCLoweringID
char & ShadowStackGCLoweringID
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC.
Definition: ShadowStackGCLowering.cpp:92
llvm::LocalStackSlotAllocationID
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
Definition: LocalStackSlotAllocation.cpp:109
llvm::createGCInfoPrinter
FunctionPass * createGCInfoPrinter(raw_ostream &OS)
Creates a pass to print GC metadata.
Definition: GCMetadata.cpp:92
llvm::MIRAddFSDiscriminatorsID
char & MIRAddFSDiscriminatorsID
This pass adds flow sensitive discriminators.
llvm::SpillPlacementID
char & SpillPlacementID
SpillPlacement analysis.
Definition: SpillPlacement.cpp:50
llvm::StackSlotColoringID
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
Definition: StackSlotColoring.cpp:132
llvm::MachineCopyPropagationID
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
Definition: MachineCopyPropagation.cpp:308
llvm::TwoAddressInstructionPassID
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
Definition: TwoAddressInstructionPass.cpp:194
llvm::MachineLICMID
char & MachineLICMID
This pass performs loop invariant code motion on machine instructions.
Definition: MachineLICM.cpp:297
llvm::createUnreachableBlockEliminationPass
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
llvm::MIRCanonicalizerID
char & MIRCanonicalizerID
MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs according to the semantics of the in...
Definition: MIRCanonicalizerPass.cpp:71
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::createExpandMemCmpPass
FunctionPass * createExpandMemCmpPass()
Definition: ExpandMemCmp.cpp:917
llvm::sampleprof::FSDiscriminatorPass
FSDiscriminatorPass
Definition: Discriminator.h:57
llvm::EdgeBundlesID
char & EdgeBundlesID
EdgeBundles analysis - Bundle machine CFG edges.
llvm::LiveDebugValuesID
char & LiveDebugValuesID
LiveDebugValues pass.
Definition: LiveDebugValues.cpp:93
llvm::createLowerEmuTLSPass
ModulePass * createLowerEmuTLSPass()
LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all TLS variables for the emulated ...
llvm::createDwarfEHPass
FunctionPass * createDwarfEHPass(CodeGenOpt::Level OptLevel)
createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation.
Definition: DwarfEHPrepare.cpp:370
llvm::createEHContGuardCatchretPass
FunctionPass * createEHContGuardCatchretPass()
Creates EHContGuard catchret target identification pass.
llvm::PrologEpilogCodeInserterID
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
Definition: PrologEpilogInserter.cpp:139
llvm::FEntryInserterID
char & FEntryInserterID
This pass inserts FEntry calls.
Definition: FEntryInserter.cpp:51
llvm::PostRAHazardRecognizerID
char & PostRAHazardRecognizerID
PostRAHazardRecognizer - This pass runs the post-ra hazard recognizer.
Definition: PostRAHazardRecognizer.cpp:64
llvm::createPreISelIntrinsicLoweringPass
ModulePass * createPreISelIntrinsicLoweringPass()
This pass lowers the @llvm.load.relative and @llvm.objc.
llvm::FuncletLayoutID
char & FuncletLayoutID
This pass lays out funclets contiguously.
Definition: FuncletLayout.cpp:39
llvm::GCMachineCodeAnalysisID
char & GCMachineCodeAnalysisID
GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.
Definition: GCRootLowering.cpp:241
llvm::createReplaceWithVeclibLegacyPass
FunctionPass * createReplaceWithVeclibLegacyPass()
Definition: ReplaceWithVeclib.cpp:252
llvm::MachineTraceMetricsID
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
Definition: MachineTraceMetrics.cpp:46
llvm::createResetMachineFunctionPass
MachineFunctionPass * createResetMachineFunctionPass(bool EmitFallbackDiag, bool AbortOnFailedISel)
This pass resets a MachineFunction when it has the FailedISel property as if it was just created.
llvm::RegisterCoalescerID
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
Definition: RegisterCoalescer.cpp:410
llvm::EarlyIfConverterID
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions.
Definition: EarlyIfConversion.cpp:784
llvm::createAtomicExpandPass
FunctionPass * createAtomicExpandPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
llvm::createMIRProfileLoaderPass
FunctionPass * createMIRProfileLoaderPass(std::string File, std::string RemappingFile, sampleprof::FSDiscriminatorPass P)
Read Flow Sensitive Profile.
Definition: MIRSampleProfile.cpp:67
llvm::createX86LowerAMXIntrinsicsPass
FunctionPass * createX86LowerAMXIntrinsicsPass()
The pass transforms amx intrinsics to scalar operation if the function has optnone attribute or it is...
Definition: X86LowerAMXIntrinsics.cpp:678
llvm::createCFIInstrInserter
FunctionPass * createCFIInstrInserter()
Creates CFI Instruction Inserter pass.
llvm::AtomicExpandID
char & AtomicExpandID
AtomicExpandID – Lowers atomic operations in terms of either cmpxchg load-linked/store-conditional lo...
Definition: AtomicExpandPass.cpp:130
llvm::StackMapLivenessID
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
Definition: StackMapLivenessAnalysis.cpp:86
llvm::createShadowStackGCLoweringPass
FunctionPass * createShadowStackGCLoweringPass()
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC.
Definition: ShadowStackGCLowering.cpp:101
llvm::createMachineOutlinerPass
ModulePass * createMachineOutlinerPass(bool RunOnAllFunctions=true)
This pass performs outlining on machine instructions directly before printing assembly.
Definition: MachineOutliner.cpp:443
llvm::createMachineFunctionPrinterPass
MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")
MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...
llvm::EarlyTailDuplicateID
char & EarlyTailDuplicateID
Duplicate blocks with unconditional branches into tails of their predecessors.
Definition: TailDuplication.cpp:77
llvm::VirtRegRewriterID
char & VirtRegRewriterID
VirtRegRewriter pass.
Definition: VirtRegMap.cpp:227
llvm::MachineLoopInfoID
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
Definition: MachineLoopInfo.cpp:44
llvm::GCLoweringID
char & GCLoweringID
GCLowering Pass - Used by gc.root to perform its default lowering operations.
Definition: GCRootLowering.cpp:88
llvm::StackColoringID
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
Definition: StackColoring.cpp:551
llvm::MIRProfileLoaderPassID
char & MIRProfileLoaderPassID
This pass reads flow sensitive profile.
Definition: MIRSampleProfile.cpp:65
llvm::RAGreedyID
char & RAGreedyID
Greedy register allocator.
Definition: RegAllocGreedy.cpp:140
llvm::MachineSinkingID
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
Definition: MachineSink.cpp:256
llvm::DetectDeadLanesID
char & DetectDeadLanesID
This pass adds dead/undef flags after analyzing subregister lanes.
Definition: DetectDeadLanes.cpp:128
llvm::createPrintMIRPass
MachineFunctionPass * createPrintMIRPass(raw_ostream &OS)
MIRPrinting pass - this pass prints out the LLVM IR into the given stream using the MIR serialization...
Definition: MIRPrintingPass.cpp:66
llvm::FinalizeMachineBundlesID
char & FinalizeMachineBundlesID
FinalizeMachineBundles - This pass finalize machine instruction bundles (created earlier,...
Definition: MachineInstrBundle.cpp:98
llvm::RegClassFilterFunc
std::function< bool(const TargetRegisterInfo &TRI, const TargetRegisterClass &RC)> RegClassFilterFunc
Definition: RegAllocCommon.h:17
llvm::createUnpackMachineBundles
FunctionPass * createUnpackMachineBundles(std::function< bool(const MachineFunction &)> Ftor)
Definition: MachineInstrBundle.cpp:80
llvm::createRegUsageInfoPropPass
FunctionPass * createRegUsageInfoPropPass()
Return a MachineFunction pass that identifies call sites and propagates register usage information of...
Definition: RegUsageInfoPropagate.cpp:153
llvm::createMachineVerifierPass
FunctionPass * createMachineVerifierPass(const std::string &Banner)
createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness.
llvm::LiveRangeShrinkID
char & LiveRangeShrinkID
LiveRangeShrink pass.
Definition: LiveRangeShrink.cpp:65
llvm::LiveVariablesID
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
Definition: LiveVariables.cpp:45
llvm::MachineCSEID
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
Definition: MachineCSE.cpp:153
llvm::FinalizeISelID
char & FinalizeISelID
This pass expands pseudo-instructions, reserves registers and adjusts machine frame information.
Definition: FinalizeISel.cpp:44
llvm::createExpandReductionsPass
FunctionPass * createExpandReductionsPass()
This pass expands the experimental reduction intrinsics into sequences of shuffles.
Definition: ExpandReductions.cpp:202
llvm::createTypePromotionPass
FunctionPass * createTypePromotionPass()
Create IR Type Promotion pass.
Definition: TypePromotion.cpp:959
llvm::createGCLoweringPass
FunctionPass * createGCLoweringPass()
GCLowering Pass - Used by gc.root to perform its default lowering operations.
llvm::createExpandVectorPredicationPass
FunctionPass * createExpandVectorPredicationPass()
This pass expands the vector predication intrinsics into unpredicated instructions with selects or ju...
Definition: ExpandVectorPredication.cpp:594
function
print Print MemDeps of function
Definition: MemDepPrinter.cpp:83
llvm::ProcessImplicitDefsID
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
Definition: ProcessImplicitDefs.cpp:52
llvm::PatchableFunctionID
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
Definition: PatchableFunction.cpp:96
llvm::MachineBlockPlacementStatsID
char & MachineBlockPlacementStatsID
MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...
Definition: MachineBlockPlacement.cpp:3649
llvm::createFreeMachineFunctionPass
FunctionPass * createFreeMachineFunctionPass()
This pass frees the memory occupied by the MachineFunction.
Definition: MachineModuleInfo.cpp:351
llvm::createSjLjEHPreparePass
FunctionPass * createSjLjEHPreparePass(const TargetMachine *TM)
createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...
llvm::createX86PreAMXConfigPass
FunctionPass * createX86PreAMXConfigPass()
The pass insert tile config intrinsics for AMX fast register allocation.
Definition: X86PreAMXConfig.cpp:421
llvm::XRayInstrumentationID
char & XRayInstrumentationID
This pass inserts the XRay instrumentation sleds if they are supported by the target platform.
Definition: XRayInstrumentation.cpp:264
llvm::UnreachableMachineBlockElimID
char & UnreachableMachineBlockElimID
UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.
llvm::createHardwareLoopsPass
FunctionPass * createHardwareLoopsPass()
Create Hardware Loop pass.
Definition: HardwareLoops.cpp:546
llvm::createStripDebugMachineModulePass
ModulePass * createStripDebugMachineModulePass(bool OnlyDebugified)
Creates MIR Strip Debug pass.
Definition: MachineStripDebug.cpp:106
llvm::BranchFolderPassID
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
Definition: BranchFolding.cpp:114
llvm::MachineBlockPlacementID
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
Definition: MachineBlockPlacement.cpp:611
llvm::createIndirectBrExpandPass
FunctionPass * createIndirectBrExpandPass()
Definition: IndirectBrExpandPass.cpp:81
llvm::MachineRegionInfoPassID
char & MachineRegionInfoPassID
MachineRegionInfo - This pass computes SESE regions for machine functions.
Definition: MachineRegionInfo.cpp:129
llvm::ShrinkWrapID
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:250
llvm::createWinEHPass
FunctionPass * createWinEHPass(bool DemoteCatchSwitchPHIOnly=false)
createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...
llvm::createDebugifyMachineModulePass
ModulePass * createDebugifyMachineModulePass()
Creates MIR Debugify pass.
Definition: MachineDebugify.cpp:200
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::RenameIndependentSubregsID
char & RenameIndependentSubregsID
This pass detects subregister lanes in a virtual register that are used independently of other lanes ...
Definition: RenameIndependentSubregs.cpp:113
llvm::FixupStatepointCallerSavedID
char & FixupStatepointCallerSavedID
The pass fixups statepoint machine instruction to replace usage of caller saved registers with stack ...
Definition: FixupStatepointCallerSaved.cpp:87
llvm::createInterleavedAccessPass
FunctionPass * createInterleavedAccessPass()
InterleavedAccess Pass - This pass identifies and matches interleaved memory accesses to target speci...
Definition: InterleavedAccessPass.cpp:145
llvm::createRegUsageInfoCollector
FunctionPass * createRegUsageInfoCollector()
This pass is executed POST-RA to collect which physical registers are preserved by given machine func...
Definition: RegUsageInfoCollector.cpp:76
llvm::createMIRAddFSDiscriminatorsPass
FunctionPass * createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P)
Add Flow Sensitive Discriminators.
llvm::createBreakFalseDeps
FunctionPass * createBreakFalseDeps()
Creates Break False Dependencies pass.
Definition: BreakFalseDeps.cpp:105
llvm::createJumpInstrTablesPass
ModulePass * createJumpInstrTablesPass()
createJumpInstrTables - This pass creates jump-instruction tables.
llvm::createBasicBlockSectionsPass
MachineFunctionPass * createBasicBlockSectionsPass(const MemoryBuffer *Buf)
createBasicBlockSections Pass - This pass assigns sections to machine basic blocks and is enabled wit...
Definition: BasicBlockSections.cpp:531
llvm::createWasmEHPass
FunctionPass * createWasmEHPass()
createWasmEHPass - This pass adapts exception handling code to use WebAssembly's exception handling s...
Definition: WasmEHPrepare.cpp:134
llvm::createPseudoProbeInserter
FunctionPass * createPseudoProbeInserter()
This pass inserts pseudo probe annotation for callsite profiling.
Definition: PseudoProbeInserter.cpp:153
llvm::MachineFunctionPrinterPassID
char & MachineFunctionPrinterPassID
MachineFunctionPrinterPass - This pass prints out MachineInstr's.
Definition: MachineFunctionPrinterPass.cpp:58
llvm::TailDuplicateID
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
Definition: TailDuplication.cpp:76
llvm::DeadMachineInstructionElimID
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
Definition: DeadMachineInstructionElim.cpp:57
llvm::createIfConverter
FunctionPass * createIfConverter(std::function< bool(const MachineFunction &)> Ftor)
Definition: IfConversion.cpp:2366
llvm::createGlobalMergePass
Pass * createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, bool OnlyOptimizeForSize=false, bool MergeExternalByDefault=false)
GlobalMerge - This pass merges internal (by default) globals into structs to enable reuse of a base p...
Definition: GlobalMerge.cpp:678
llvm::BranchRelaxationPassID
char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
Definition: BranchRelaxation.cpp:119
llvm::MachineSchedulerID
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
Definition: MachineScheduler.cpp:214
CodeGen.h
llvm::MachineDominanceFrontierID
char & MachineDominanceFrontierID
MachineDominanaceFrontier - This pass is a machine dominators analysis.
Definition: MachineDominanceFrontier.cpp:36
llvm::PostRASchedulerID
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
Definition: PostRASchedulerList.cpp:199
llvm::MachineDominatorsID
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
llvm::MachineCombinerID
char & MachineCombinerID
This pass performs instruction combining using trace metrics to estimate critical-path and resource d...
Definition: MachineCombiner.cpp:130
llvm::MIRPrintingPassID
char & MIRPrintingPassID
MIRPrintingPass - this pass prints out the LLVM IR using the MIR serialization format.
Definition: MIRPrintingPass.cpp:61
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::createBasicRegisterAllocator
FunctionPass * createBasicRegisterAllocator()
BasicRegisterAllocation Pass - This pass implements a degenerate global register allocator using the ...
Definition: RegAllocBasic.cpp:335
llvm::ImplicitNullChecksID
char & ImplicitNullChecksID
ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.
Definition: ImplicitNullChecks.cpp:816
llvm::EarlyMachineLICMID
char & EarlyMachineLICMID
This pass performs loop invariant code motion on machine instructions.
Definition: MachineLICM.cpp:298
llvm::createInterleavedLoadCombinePass
FunctionPass * createInterleavedLoadCombinePass()
InterleavedLoadCombines Pass - This pass identifies interleaved loads and combines them into wide loa...
Definition: InterleavedLoadCombinePass.cpp:1363
llvm::PostMachineSchedulerID
char & PostMachineSchedulerID
PostMachineScheduler - This pass schedules machine instructions postRA.
Definition: MachineScheduler.cpp:245
llvm::PostRAMachineSinkingID
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
Definition: MachineSink.cpp:1553
llvm::RemoveRedundantDebugValuesID
char & RemoveRedundantDebugValuesID
RemoveRedundantDebugValues pass.
Definition: RemoveRedundantDebugValues.cpp:62
llvm::IfConverterID
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
Definition: IfConversion.cpp:436
llvm::createSafeStackPass
FunctionPass * createSafeStackPass()
This pass splits the stack into a safe stack and an unsafe stack to protect against stack-based overf...
Definition: SafeStack.cpp:943
llvm::LiveIntervalsID
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers.
Definition: LiveIntervals.cpp:64
File
Instrumentation for Order File
Definition: InstrOrderFile.cpp:205
llvm::createCodeGenPreparePass
FunctionPass * createCodeGenPreparePass()
createCodeGenPreparePass - Transform the code to expose more pattern matching during instruction sele...
Definition: CodeGenPrepare.cpp:453
llvm::EarlyIfPredicatorID
char & EarlyIfPredicatorID
EarlyIfPredicator - This pass performs if-conversion on SSA form by predicating if/else block and ins...
Definition: EarlyIfConversion.cpp:1109
llvm::createStackProtectorPass
FunctionPass * createStackProtectorPass()
createStackProtectorPass - This pass adds stack protectors to functions.
Definition: StackProtector.cpp:77
llvm::createCFGuardLongjmpPass
FunctionPass * createCFGuardLongjmpPass()
Creates CFGuard longjmp target identification pass.