LLVM  14.0.0git
Passes.h
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1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines interfaces to access the target independent code generation
10 // passes provided by the LLVM backend.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_PASSES_H
15 #define LLVM_CODEGEN_PASSES_H
16 
17 #include "llvm/Support/CodeGen.h"
20 
21 #include <functional>
22 #include <string>
23 
24 namespace llvm {
25 
26 class FunctionPass;
27 class MachineFunction;
28 class MachineFunctionPass;
29 class MemoryBuffer;
30 class ModulePass;
31 class Pass;
32 class TargetMachine;
33 class TargetRegisterClass;
34 class raw_ostream;
35 
36 } // End llvm namespace
37 
38 // List of target independent CodeGen pass IDs.
39 namespace llvm {
40  FunctionPass *createAtomicExpandPass();
41 
42  /// createUnreachableBlockEliminationPass - The LLVM code generator does not
43  /// work well with unreachable basic blocks (what live ranges make sense for a
44  /// block that cannot be reached?). As such, a code generator should either
45  /// not instruction select unreachable blocks, or run this pass as its
46  /// last LLVM modifying pass to clean up blocks that are not reachable from
47  /// the entry block.
49 
50  /// createBasicBlockSections Pass - This pass assigns sections to machine
51  /// basic blocks and is enabled with -fbasic-block-sections. Buf is a memory
52  /// buffer that contains the list of functions and basic block ids to
53  /// selectively enable basic block sections.
54  MachineFunctionPass *createBasicBlockSectionsPass(const MemoryBuffer *Buf);
55 
56  /// createMachineFunctionSplitterPass - This pass splits machine functions
57  /// using profile information.
58  MachineFunctionPass *createMachineFunctionSplitterPass();
59 
60  /// MachineFunctionPrinter pass - This pass prints out the machine function to
61  /// the given stream as a debugging tool.
62  MachineFunctionPass *
63  createMachineFunctionPrinterPass(raw_ostream &OS,
64  const std::string &Banner ="");
65 
66  /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
67  /// using the MIR serialization format.
68  MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
69 
70  /// This pass resets a MachineFunction when it has the FailedISel property
71  /// as if it was just created.
72  /// If EmitFallbackDiag is true, the pass will emit a
73  /// DiagnosticInfoISelFallback for every MachineFunction it resets.
74  /// If AbortOnFailedISel is true, abort compilation instead of resetting.
75  MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
76  bool AbortOnFailedISel);
77 
78  /// createCodeGenPreparePass - Transform the code to expose more pattern
79  /// matching during instruction selection.
80  FunctionPass *createCodeGenPreparePass();
81 
82  /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
83  /// load-linked/store-conditional loops.
84  extern char &AtomicExpandID;
85 
86  /// MachineLoopInfo - This pass is a loop analysis pass.
87  extern char &MachineLoopInfoID;
88 
89  /// MachineDominators - This pass is a machine dominators analysis pass.
90  extern char &MachineDominatorsID;
91 
92  /// MachineDominanaceFrontier - This pass is a machine dominators analysis.
93  extern char &MachineDominanceFrontierID;
94 
95  /// MachineRegionInfo - This pass computes SESE regions for machine functions.
96  extern char &MachineRegionInfoPassID;
97 
98  /// EdgeBundles analysis - Bundle machine CFG edges.
99  extern char &EdgeBundlesID;
100 
101  /// LiveVariables pass - This pass computes the set of blocks in which each
102  /// variable is life and sets machine operand kill flags.
103  extern char &LiveVariablesID;
104 
105  /// PHIElimination - This pass eliminates machine instruction PHI nodes
106  /// by inserting copy instructions. This destroys SSA information, but is the
107  /// desired input for some register allocators. This pass is "required" by
108  /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
109  extern char &PHIEliminationID;
110 
111  /// LiveIntervals - This analysis keeps track of the live ranges of virtual
112  /// and physical registers.
113  extern char &LiveIntervalsID;
114 
115  /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
116  extern char &LiveStacksID;
117 
118  /// TwoAddressInstruction - This pass reduces two-address instructions to
119  /// use two operands. This destroys SSA information but it is desired by
120  /// register allocators.
121  extern char &TwoAddressInstructionPassID;
122 
123  /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
124  extern char &ProcessImplicitDefsID;
125 
126  /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
127  extern char &RegisterCoalescerID;
128 
129  /// MachineScheduler - This pass schedules machine instructions.
130  extern char &MachineSchedulerID;
131 
132  /// PostMachineScheduler - This pass schedules machine instructions postRA.
133  extern char &PostMachineSchedulerID;
134 
135  /// SpillPlacement analysis. Suggest optimal placement of spill code between
136  /// basic blocks.
137  extern char &SpillPlacementID;
138 
139  /// ShrinkWrap pass. Look for the best place to insert save and restore
140  // instruction and update the MachineFunctionInfo with that information.
141  extern char &ShrinkWrapID;
142 
143  /// LiveRangeShrink pass. Move instruction close to its definition to shrink
144  /// the definition's live range.
145  extern char &LiveRangeShrinkID;
146 
147  /// Greedy register allocator.
148  extern char &RAGreedyID;
149 
150  /// Basic register allocator.
151  extern char &RABasicID;
152 
153  /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
154  /// assigned in VirtRegMap.
155  extern char &VirtRegRewriterID;
156  FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
157 
158  /// UnreachableMachineBlockElimination - This pass removes unreachable
159  /// machine basic blocks.
160  extern char &UnreachableMachineBlockElimID;
161 
162  /// DeadMachineInstructionElim - This pass removes dead machine instructions.
163  extern char &DeadMachineInstructionElimID;
164 
165  /// This pass adds dead/undef flags after analyzing subregister lanes.
166  extern char &DetectDeadLanesID;
167 
168  /// This pass perform post-ra machine sink for COPY instructions.
169  extern char &PostRAMachineSinkingID;
170 
171  /// This pass adds flow sensitive discriminators.
172  extern char &MIRAddFSDiscriminatorsID;
173 
174  /// This pass reads flow sensitive profile.
175  extern char &MIRProfileLoaderPassID;
176 
177  /// FastRegisterAllocation Pass - This pass register allocates as fast as
178  /// possible. It is best suited for debug code where live ranges are short.
179  ///
180  FunctionPass *createFastRegisterAllocator();
182  bool ClearVirtRegs);
183 
184  /// BasicRegisterAllocation Pass - This pass implements a degenerate global
185  /// register allocator using the basic regalloc framework.
186  ///
187  FunctionPass *createBasicRegisterAllocator();
189 
190  /// Greedy register allocation pass - This pass implements a global register
191  /// allocator for optimized builds.
192  ///
193  FunctionPass *createGreedyRegisterAllocator();
195 
196  /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
197  /// Quadratic Prograaming (PBQP) based register allocator.
198  ///
199  FunctionPass *createDefaultPBQPRegisterAllocator();
200 
201  /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
202  /// and eliminates abstract frame references.
203  extern char &PrologEpilogCodeInserterID;
204  MachineFunctionPass *createPrologEpilogInserterPass();
205 
206  /// ExpandPostRAPseudos - This pass expands pseudo instructions after
207  /// register allocation.
208  extern char &ExpandPostRAPseudosID;
209 
210  /// PostRAHazardRecognizer - This pass runs the post-ra hazard
211  /// recognizer.
212  extern char &PostRAHazardRecognizerID;
213 
214  /// PostRAScheduler - This pass performs post register allocation
215  /// scheduling.
216  extern char &PostRASchedulerID;
217 
218  /// BranchFolding - This pass performs machine code CFG based
219  /// optimizations to delete branches to branches, eliminate branches to
220  /// successor blocks (creating fall throughs), and eliminating branches over
221  /// branches.
222  extern char &BranchFolderPassID;
223 
224  /// BranchRelaxation - This pass replaces branches that need to jump further
225  /// than is supported by a branch instruction.
226  extern char &BranchRelaxationPassID;
227 
228  /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
229  extern char &MachineFunctionPrinterPassID;
230 
231  /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
232  /// serialization format.
233  extern char &MIRPrintingPassID;
234 
235  /// TailDuplicate - Duplicate blocks with unconditional branches
236  /// into tails of their predecessors.
237  extern char &TailDuplicateID;
238 
239  /// Duplicate blocks with unconditional branches into tails of their
240  /// predecessors. Variant that works before register allocation.
241  extern char &EarlyTailDuplicateID;
242 
243  /// MachineTraceMetrics - This pass computes critical path and CPU resource
244  /// usage in an ensemble of traces.
245  extern char &MachineTraceMetricsID;
246 
247  /// EarlyIfConverter - This pass performs if-conversion on SSA form by
248  /// inserting cmov instructions.
249  extern char &EarlyIfConverterID;
250 
251  /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
252  /// predicating if/else block and insert select at the join point.
253  extern char &EarlyIfPredicatorID;
254 
255  /// This pass performs instruction combining using trace metrics to estimate
256  /// critical-path and resource depth.
257  extern char &MachineCombinerID;
258 
259  /// StackSlotColoring - This pass performs stack coloring and merging.
260  /// It merges disjoint allocas to reduce the stack size.
261  extern char &StackColoringID;
262 
263  /// IfConverter - This pass performs machine code if conversion.
264  extern char &IfConverterID;
265 
266  FunctionPass *createIfConverter(
267  std::function<bool(const MachineFunction &)> Ftor);
268 
269  /// MachineBlockPlacement - This pass places basic blocks based on branch
270  /// probabilities.
271  extern char &MachineBlockPlacementID;
272 
273  /// MachineBlockPlacementStats - This pass collects statistics about the
274  /// basic block placement using branch probabilities and block frequency
275  /// information.
276  extern char &MachineBlockPlacementStatsID;
277 
278  /// GCLowering Pass - Used by gc.root to perform its default lowering
279  /// operations.
280  FunctionPass *createGCLoweringPass();
281 
282  /// GCLowering Pass - Used by gc.root to perform its default lowering
283  /// operations.
284  extern char &GCLoweringID;
285 
286  /// ShadowStackGCLowering - Implements the custom lowering mechanism
287  /// used by the shadow stack GC. Only runs on functions which opt in to
288  /// the shadow stack collector.
289  FunctionPass *createShadowStackGCLoweringPass();
290 
291  /// ShadowStackGCLowering - Implements the custom lowering mechanism
292  /// used by the shadow stack GC.
293  extern char &ShadowStackGCLoweringID;
294 
295  /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
296  /// in machine code. Must be added very late during code generation, just
297  /// prior to output, and importantly after all CFG transformations (such as
298  /// branch folding).
299  extern char &GCMachineCodeAnalysisID;
300 
301  /// Creates a pass to print GC metadata.
302  ///
303  FunctionPass *createGCInfoPrinter(raw_ostream &OS);
304 
305  /// MachineCSE - This pass performs global CSE on machine instructions.
306  extern char &MachineCSEID;
307 
308  /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
309  /// according to the semantics of the instruction as well as hoists
310  /// code.
311  extern char &MIRCanonicalizerID;
312 
313  /// ImplicitNullChecks - This pass folds null pointer checks into nearby
314  /// memory operations.
315  extern char &ImplicitNullChecksID;
316 
317  /// This pass performs loop invariant code motion on machine instructions.
318  extern char &MachineLICMID;
319 
320  /// This pass performs loop invariant code motion on machine instructions.
321  /// This variant works before register allocation. \see MachineLICMID.
322  extern char &EarlyMachineLICMID;
323 
324  /// MachineSinking - This pass performs sinking on machine instructions.
325  extern char &MachineSinkingID;
326 
327  /// MachineCopyPropagation - This pass performs copy propagation on
328  /// machine instructions.
329  extern char &MachineCopyPropagationID;
330 
331  /// PeepholeOptimizer - This pass performs peephole optimizations -
332  /// like extension and comparison eliminations.
333  extern char &PeepholeOptimizerID;
334 
335  /// OptimizePHIs - This pass optimizes machine instruction PHIs
336  /// to take advantage of opportunities created during DAG legalization.
337  extern char &OptimizePHIsID;
338 
339  /// StackSlotColoring - This pass performs stack slot coloring.
340  extern char &StackSlotColoringID;
341 
342  /// This pass lays out funclets contiguously.
343  extern char &FuncletLayoutID;
344 
345  /// This pass inserts the XRay instrumentation sleds if they are supported by
346  /// the target platform.
347  extern char &XRayInstrumentationID;
348 
349  /// This pass inserts FEntry calls
350  extern char &FEntryInserterID;
351 
352  /// This pass implements the "patchable-function" attribute.
353  extern char &PatchableFunctionID;
354 
355  /// createStackProtectorPass - This pass adds stack protectors to functions.
356  ///
357  FunctionPass *createStackProtectorPass();
358 
359  /// createMachineVerifierPass - This pass verifies cenerated machine code
360  /// instructions for correctness.
361  ///
362  FunctionPass *createMachineVerifierPass(const std::string& Banner);
363 
364  /// createDwarfEHPass - This pass mulches exception handling code into a form
365  /// adapted to code generation. Required if using dwarf exception handling.
366  FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel);
367 
368  /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
369  /// in addition to the Itanium LSDA based personalities.
370  FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
371 
372  /// createSjLjEHPreparePass - This pass adapts exception handling code to use
373  /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
374  ///
375  FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
376 
377  /// createWasmEHPass - This pass adapts exception handling code to use
378  /// WebAssembly's exception handling scheme.
379  FunctionPass *createWasmEHPass();
380 
381  /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
382  /// slots relative to one another and allocates base registers to access them
383  /// when it is estimated by the target to be out of range of normal frame
384  /// pointer or stack pointer index addressing.
385  extern char &LocalStackSlotAllocationID;
386 
387  /// This pass expands pseudo-instructions, reserves registers and adjusts
388  /// machine frame information.
389  extern char &FinalizeISelID;
390 
391  /// UnpackMachineBundles - This pass unpack machine instruction bundles.
392  extern char &UnpackMachineBundlesID;
393 
394  FunctionPass *
395  createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
396 
397  /// FinalizeMachineBundles - This pass finalize machine instruction
398  /// bundles (created earlier, e.g. during pre-RA scheduling).
399  extern char &FinalizeMachineBundlesID;
400 
401  /// StackMapLiveness - This pass analyses the register live-out set of
402  /// stackmap/patchpoint intrinsics and attaches the calculated information to
403  /// the intrinsic for later emission to the StackMap.
404  extern char &StackMapLivenessID;
405 
406  /// RemoveRedundantDebugValues pass.
407  extern char &RemoveRedundantDebugValuesID;
408 
409  /// LiveDebugValues pass
410  extern char &LiveDebugValuesID;
411 
412  /// createJumpInstrTables - This pass creates jump-instruction tables.
413  ModulePass *createJumpInstrTablesPass();
414 
415  /// InterleavedAccess Pass - This pass identifies and matches interleaved
416  /// memory accesses to target specific intrinsics.
417  ///
418  FunctionPass *createInterleavedAccessPass();
419 
420  /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
421  /// combines them into wide loads detectable by InterleavedAccessPass
422  ///
423  FunctionPass *createInterleavedLoadCombinePass();
424 
425  /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
426  /// TLS variables for the emulated TLS model.
427  ///
428  ModulePass *createLowerEmuTLSPass();
429 
430  /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
431  /// instructions. This is unsafe to do earlier because a pass may combine the
432  /// constant initializer into the load, which may result in an overflowing
433  /// evaluation.
435 
436  /// GlobalMerge - This pass merges internal (by default) globals into structs
437  /// to enable reuse of a base pointer by indexed addressing modes.
438  /// It can also be configured to focus on size optimizations only.
439  ///
440  Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
441  bool OnlyOptimizeForSize = false,
442  bool MergeExternalByDefault = false);
443 
444  /// This pass splits the stack into a safe stack and an unsafe stack to
445  /// protect against stack-based overflow vulnerabilities.
446  FunctionPass *createSafeStackPass();
447 
448  /// This pass detects subregister lanes in a virtual register that are used
449  /// independently of other lanes and splits them into separate virtual
450  /// registers.
451  extern char &RenameIndependentSubregsID;
452 
453  /// This pass is executed POST-RA to collect which physical registers are
454  /// preserved by given machine function.
455  FunctionPass *createRegUsageInfoCollector();
456 
457  /// Return a MachineFunction pass that identifies call sites
458  /// and propagates register usage information of callee to caller
459  /// if available with PysicalRegisterUsageInfo pass.
460  FunctionPass *createRegUsageInfoPropPass();
461 
462  /// This pass performs software pipelining on machine instructions.
463  extern char &MachinePipelinerID;
464 
465  /// This pass frees the memory occupied by the MachineFunction.
466  FunctionPass *createFreeMachineFunctionPass();
467 
468  /// This pass performs outlining on machine instructions directly before
469  /// printing assembly.
470  ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
471 
472  /// This pass expands the experimental reduction intrinsics into sequences of
473  /// shuffles.
474  FunctionPass *createExpandReductionsPass();
475 
476  // This pass replaces intrinsics operating on vector operands with calls to
477  // the corresponding function in a vector library (e.g., SVML, libmvec).
478  FunctionPass *createReplaceWithVeclibLegacyPass();
479 
480  /// This pass expands the vector predication intrinsics into unpredicated
481  /// instructions with selects or just the explicit vector length into the
482  /// predicate mask.
483  FunctionPass *createExpandVectorPredicationPass();
484 
485  // This pass expands memcmp() to load/stores.
486  FunctionPass *createExpandMemCmpPass();
487 
488  /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
489  FunctionPass *createBreakFalseDeps();
490 
491  // This pass expands indirectbr instructions.
492  FunctionPass *createIndirectBrExpandPass();
493 
494  /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
495  FunctionPass *createCFIInstrInserter();
496 
497  /// Creates CFGuard longjmp target identification pass.
498  /// \see CFGuardLongjmp.cpp
499  FunctionPass *createCFGuardLongjmpPass();
500 
501  /// Creates EHContGuard catchret target identification pass.
502  /// \see EHContGuardCatchret.cpp
503  FunctionPass *createEHContGuardCatchretPass();
504 
505  /// Create Hardware Loop pass. \see HardwareLoops.cpp
506  FunctionPass *createHardwareLoopsPass();
507 
508  /// This pass inserts pseudo probe annotation for callsite profiling.
509  FunctionPass *createPseudoProbeInserter();
510 
511  /// Create IR Type Promotion pass. \see TypePromotion.cpp
512  FunctionPass *createTypePromotionPass();
513 
514  /// Add Flow Sensitive Discriminators. PassNum specifies the
515  /// sequence number of this pass (starting from 1).
516  FunctionPass *
518 
519  /// Read Flow Sensitive Profile.
520  FunctionPass *createMIRProfileLoaderPass(std::string File,
521  std::string RemappingFile,
523 
524  /// Creates MIR Debugify pass. \see MachineDebugify.cpp
525  ModulePass *createDebugifyMachineModulePass();
526 
527  /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
528  /// If OnlyDebugified is true then it will only strip debug info if it was
529  /// added by a Debugify pass. The module will be left unchanged if the debug
530  /// info was generated by another source such as clang.
531  ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
532 
533  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
534  ModulePass *createCheckDebugMachineModulePass();
535 
536  /// The pass fixups statepoint machine instruction to replace usage of
537  /// caller saved registers with stack slots.
538  extern char &FixupStatepointCallerSavedID;
539 
540  /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
541  /// or split the data to two <128 x i32>.
542  FunctionPass *createX86LowerAMXTypePass();
543 
544  /// The pass insert tile config intrinsics for AMX fast register allocation.
545  FunctionPass *createX86PreAMXConfigPass();
546 
547  /// The pass transforms amx intrinsics to scalar operation if the function has
548  /// optnone attribute or it is O0.
549  FunctionPass *createX86LowerAMXIntrinsicsPass();
550 } // End llvm namespace
551 
552 #endif
llvm::createX86LowerAMXTypePass
FunctionPass * createX86LowerAMXTypePass()
The pass transforms load/store <256 x i32> to AMX load/store intrinsics or split the data to two <128...
Definition: X86LowerAMXType.cpp:1072
llvm::createFastRegisterAllocator
FunctionPass * createFastRegisterAllocator()
FastRegisterAllocation Pass - This pass register allocates as fast as possible.
Definition: RegAllocFast.cpp:1567
llvm::createCheckDebugMachineModulePass
ModulePass * createCheckDebugMachineModulePass()
Creates MIR Check Debug pass.
Definition: MachineCheckDebugify.cpp:124
llvm::OptimizePHIsID
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
Definition: OptimizePHIs.cpp:69
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::createGreedyRegisterAllocator
FunctionPass * createGreedyRegisterAllocator()
Greedy register allocation pass - This pass implements a global register allocator for optimized buil...
Definition: RegAllocGreedy.cpp:635
llvm::LiveStacksID
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
Definition: LiveStacks.cpp:33
Pass
print lazy value Lazy Value Info Printer Pass
Definition: LazyValueInfo.cpp:1966
RegAllocCommon.h
llvm::createMachineFunctionSplitterPass
MachineFunctionPass * createMachineFunctionSplitterPass()
createMachineFunctionSplitterPass - This pass splits machine functions using profile information.
llvm::PeepholeOptimizerID
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
Definition: PeepholeOptimizer.cpp:443
llvm::RABasicID
char & RABasicID
Basic register allocator.
Definition: RegAllocBasic.cpp:132
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::createDefaultPBQPRegisterAllocator
FunctionPass * createDefaultPBQPRegisterAllocator()
PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean Quadratic Prograaming (PBQ...
Definition: RegAllocPBQP.cpp:951
llvm::PHIEliminationID
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions.
Definition: PHIElimination.cpp:129
llvm::MachinePipelinerID
char & MachinePipelinerID
This pass performs software pipelining on machine instructions.
Definition: MachinePipeliner.cpp:184
llvm::createVirtRegRewriter
FunctionPass * createVirtRegRewriter(bool ClearVirtRegs=true)
Definition: VirtRegMap.cpp:653
llvm::UnpackMachineBundlesID
char & UnpackMachineBundlesID
UnpackMachineBundles - This pass unpack machine instruction bundles.
Definition: MachineInstrBundle.cpp:41
llvm::ExpandPostRAPseudosID
char & ExpandPostRAPseudosID
ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.
Definition: ExpandPostRAPseudos.cpp:59
llvm::createPrologEpilogInserterPass
MachineFunctionPass * createPrologEpilogInserterPass()
Definition: PrologEpilogInserter.cpp:150
Discriminator.h
llvm::ShadowStackGCLoweringID
char & ShadowStackGCLoweringID
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC.
Definition: ShadowStackGCLowering.cpp:92
llvm::LocalStackSlotAllocationID
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
Definition: LocalStackSlotAllocation.cpp:109
llvm::createGCInfoPrinter
FunctionPass * createGCInfoPrinter(raw_ostream &OS)
Creates a pass to print GC metadata.
Definition: GCMetadata.cpp:92
llvm::MIRAddFSDiscriminatorsID
char & MIRAddFSDiscriminatorsID
This pass adds flow sensitive discriminators.
llvm::SpillPlacementID
char & SpillPlacementID
SpillPlacement analysis.
Definition: SpillPlacement.cpp:50
llvm::StackSlotColoringID
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
Definition: StackSlotColoring.cpp:132
llvm::MachineCopyPropagationID
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
Definition: MachineCopyPropagation.cpp:308
llvm::TwoAddressInstructionPassID
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
Definition: TwoAddressInstructionPass.cpp:192
llvm::MachineLICMID
char & MachineLICMID
This pass performs loop invariant code motion on machine instructions.
Definition: MachineLICM.cpp:297
llvm::createUnreachableBlockEliminationPass
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
llvm::MIRCanonicalizerID
char & MIRCanonicalizerID
MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs according to the semantics of the in...
Definition: MIRCanonicalizerPass.cpp:71
F
#define F(x, y, z)
Definition: MD5.cpp:56
llvm::createExpandMemCmpPass
FunctionPass * createExpandMemCmpPass()
Definition: ExpandMemCmp.cpp:917
llvm::sampleprof::FSDiscriminatorPass
FSDiscriminatorPass
Definition: Discriminator.h:57
llvm::EdgeBundlesID
char & EdgeBundlesID
EdgeBundles analysis - Bundle machine CFG edges.
llvm::LiveDebugValuesID
char & LiveDebugValuesID
LiveDebugValues pass.
Definition: LiveDebugValues.cpp:88
llvm::createLowerEmuTLSPass
ModulePass * createLowerEmuTLSPass()
LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all TLS variables for the emulated ...
llvm::createDwarfEHPass
FunctionPass * createDwarfEHPass(CodeGenOpt::Level OptLevel)
createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation.
Definition: DwarfEHPrepare.cpp:348
llvm::createEHContGuardCatchretPass
FunctionPass * createEHContGuardCatchretPass()
Creates EHContGuard catchret target identification pass.
llvm::PrologEpilogCodeInserterID
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
Definition: PrologEpilogInserter.cpp:139
llvm::FEntryInserterID
char & FEntryInserterID
This pass inserts FEntry calls.
Definition: FEntryInserter.cpp:51
llvm::PostRAHazardRecognizerID
char & PostRAHazardRecognizerID
PostRAHazardRecognizer - This pass runs the post-ra hazard recognizer.
Definition: PostRAHazardRecognizer.cpp:64
llvm::createPreISelIntrinsicLoweringPass
ModulePass * createPreISelIntrinsicLoweringPass()
This pass lowers the @llvm.load.relative and @llvm.objc.
llvm::FuncletLayoutID
char & FuncletLayoutID
This pass lays out funclets contiguously.
Definition: FuncletLayout.cpp:39
llvm::GCMachineCodeAnalysisID
char & GCMachineCodeAnalysisID
GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.
Definition: GCRootLowering.cpp:241
llvm::createReplaceWithVeclibLegacyPass
FunctionPass * createReplaceWithVeclibLegacyPass()
Definition: ReplaceWithVeclib.cpp:252
llvm::MachineTraceMetricsID
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
Definition: MachineTraceMetrics.cpp:46
llvm::createResetMachineFunctionPass
MachineFunctionPass * createResetMachineFunctionPass(bool EmitFallbackDiag, bool AbortOnFailedISel)
This pass resets a MachineFunction when it has the FailedISel property as if it was just created.
llvm::RegisterCoalescerID
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
Definition: RegisterCoalescer.cpp:410
llvm::EarlyIfConverterID
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions.
Definition: EarlyIfConversion.cpp:784
llvm::createAtomicExpandPass
FunctionPass * createAtomicExpandPass()
llvm::createMIRProfileLoaderPass
FunctionPass * createMIRProfileLoaderPass(std::string File, std::string RemappingFile, sampleprof::FSDiscriminatorPass P)
Read Flow Sensitive Profile.
Definition: MIRSampleProfile.cpp:67
llvm::createX86LowerAMXIntrinsicsPass
FunctionPass * createX86LowerAMXIntrinsicsPass()
The pass transforms amx intrinsics to scalar operation if the function has optnone attribute or it is...
Definition: X86LowerAMXIntrinsics.cpp:677
llvm::createCFIInstrInserter
FunctionPass * createCFIInstrInserter()
Creates CFI Instruction Inserter pass.
llvm::AtomicExpandID
char & AtomicExpandID
AtomicExpandID – Lowers atomic operations in terms of either cmpxchg load-linked/store-conditional lo...
Definition: AtomicExpandPass.cpp:130
llvm::StackMapLivenessID
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
Definition: StackMapLivenessAnalysis.cpp:86
llvm::createShadowStackGCLoweringPass
FunctionPass * createShadowStackGCLoweringPass()
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC.
Definition: ShadowStackGCLowering.cpp:101
llvm::createMachineOutlinerPass
ModulePass * createMachineOutlinerPass(bool RunOnAllFunctions=true)
This pass performs outlining on machine instructions directly before printing assembly.
Definition: MachineOutliner.cpp:443
llvm::createMachineFunctionPrinterPass
MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")
MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...
llvm::EarlyTailDuplicateID
char & EarlyTailDuplicateID
Duplicate blocks with unconditional branches into tails of their predecessors.
Definition: TailDuplication.cpp:77
llvm::VirtRegRewriterID
char & VirtRegRewriterID
VirtRegRewriter pass.
Definition: VirtRegMap.cpp:227
llvm::MachineLoopInfoID
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
Definition: MachineLoopInfo.cpp:43
llvm::GCLoweringID
char & GCLoweringID
GCLowering Pass - Used by gc.root to perform its default lowering operations.
Definition: GCRootLowering.cpp:88
llvm::StackColoringID
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
Definition: StackColoring.cpp:551
llvm::MIRProfileLoaderPassID
char & MIRProfileLoaderPassID
This pass reads flow sensitive profile.
Definition: MIRSampleProfile.cpp:65
llvm::RAGreedyID
char & RAGreedyID
Greedy register allocator.
Definition: RegAllocGreedy.cpp:599
llvm::MachineSinkingID
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
Definition: MachineSink.cpp:256
llvm::DetectDeadLanesID
char & DetectDeadLanesID
This pass adds dead/undef flags after analyzing subregister lanes.
Definition: DetectDeadLanes.cpp:128
llvm::createPrintMIRPass
MachineFunctionPass * createPrintMIRPass(raw_ostream &OS)
MIRPrinting pass - this pass prints out the LLVM IR into the given stream using the MIR serialization...
Definition: MIRPrintingPass.cpp:66
llvm::FinalizeMachineBundlesID
char & FinalizeMachineBundlesID
FinalizeMachineBundles - This pass finalize machine instruction bundles (created earlier,...
Definition: MachineInstrBundle.cpp:98
llvm::RegClassFilterFunc
std::function< bool(const TargetRegisterInfo &TRI, const TargetRegisterClass &RC)> RegClassFilterFunc
Definition: RegAllocCommon.h:17
llvm::createUnpackMachineBundles
FunctionPass * createUnpackMachineBundles(std::function< bool(const MachineFunction &)> Ftor)
Definition: MachineInstrBundle.cpp:80
llvm::createRegUsageInfoPropPass
FunctionPass * createRegUsageInfoPropPass()
Return a MachineFunction pass that identifies call sites and propagates register usage information of...
Definition: RegUsageInfoPropagate.cpp:153
llvm::createMachineVerifierPass
FunctionPass * createMachineVerifierPass(const std::string &Banner)
createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness.
llvm::LiveRangeShrinkID
char & LiveRangeShrinkID
LiveRangeShrink pass.
Definition: LiveRangeShrink.cpp:65
llvm::LiveVariablesID
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
Definition: LiveVariables.cpp:45
llvm::MachineCSEID
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
Definition: MachineCSE.cpp:153
llvm::FinalizeISelID
char & FinalizeISelID
This pass expands pseudo-instructions, reserves registers and adjusts machine frame information.
Definition: FinalizeISel.cpp:44
llvm::createExpandReductionsPass
FunctionPass * createExpandReductionsPass()
This pass expands the experimental reduction intrinsics into sequences of shuffles.
Definition: ExpandReductions.cpp:202
llvm::createTypePromotionPass
FunctionPass * createTypePromotionPass()
Create IR Type Promotion pass.
Definition: TypePromotion.cpp:1004
llvm::createGCLoweringPass
FunctionPass * createGCLoweringPass()
GCLowering Pass - Used by gc.root to perform its default lowering operations.
llvm::createExpandVectorPredicationPass
FunctionPass * createExpandVectorPredicationPass()
This pass expands the vector predication intrinsics into unpredicated instructions with selects or ju...
Definition: ExpandVectorPredication.cpp:594
function
print Print MemDeps of function
Definition: MemDepPrinter.cpp:83
llvm::ProcessImplicitDefsID
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
Definition: ProcessImplicitDefs.cpp:52
llvm::PatchableFunctionID
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
Definition: PatchableFunction.cpp:96
llvm::MachineBlockPlacementStatsID
char & MachineBlockPlacementStatsID
MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...
Definition: MachineBlockPlacement.cpp:3458
llvm::createFreeMachineFunctionPass
FunctionPass * createFreeMachineFunctionPass()
This pass frees the memory occupied by the MachineFunction.
Definition: MachineModuleInfo.cpp:351
llvm::createSjLjEHPreparePass
FunctionPass * createSjLjEHPreparePass(const TargetMachine *TM)
createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...
llvm::createX86PreAMXConfigPass
FunctionPass * createX86PreAMXConfigPass()
The pass insert tile config intrinsics for AMX fast register allocation.
Definition: X86PreAMXConfig.cpp:421
llvm::XRayInstrumentationID
char & XRayInstrumentationID
This pass inserts the XRay instrumentation sleds if they are supported by the target platform.
Definition: XRayInstrumentation.cpp:263
llvm::UnreachableMachineBlockElimID
char & UnreachableMachineBlockElimID
UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.
llvm::createHardwareLoopsPass
FunctionPass * createHardwareLoopsPass()
Create Hardware Loop pass.
Definition: HardwareLoops.cpp:546
llvm::createStripDebugMachineModulePass
ModulePass * createStripDebugMachineModulePass(bool OnlyDebugified)
Creates MIR Strip Debug pass.
Definition: MachineStripDebug.cpp:109
llvm::BranchFolderPassID
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
Definition: BranchFolding.cpp:114
llvm::MachineBlockPlacementID
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
Definition: MachineBlockPlacement.cpp:590
llvm::createIndirectBrExpandPass
FunctionPass * createIndirectBrExpandPass()
Definition: IndirectBrExpandPass.cpp:81
llvm::MachineRegionInfoPassID
char & MachineRegionInfoPassID
MachineRegionInfo - This pass computes SESE regions for machine functions.
Definition: MachineRegionInfo.cpp:129
llvm::ShrinkWrapID
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:250
llvm::createWinEHPass
FunctionPass * createWinEHPass(bool DemoteCatchSwitchPHIOnly=false)
createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...
llvm::createDebugifyMachineModulePass
ModulePass * createDebugifyMachineModulePass()
Creates MIR Debugify pass.
Definition: MachineDebugify.cpp:200
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::RenameIndependentSubregsID
char & RenameIndependentSubregsID
This pass detects subregister lanes in a virtual register that are used independently of other lanes ...
Definition: RenameIndependentSubregs.cpp:113
llvm::FixupStatepointCallerSavedID
char & FixupStatepointCallerSavedID
The pass fixups statepoint machine instruction to replace usage of caller saved registers with stack ...
Definition: FixupStatepointCallerSaved.cpp:87
llvm::createInterleavedAccessPass
FunctionPass * createInterleavedAccessPass()
InterleavedAccess Pass - This pass identifies and matches interleaved memory accesses to target speci...
Definition: InterleavedAccessPass.cpp:145
llvm::createRegUsageInfoCollector
FunctionPass * createRegUsageInfoCollector()
This pass is executed POST-RA to collect which physical registers are preserved by given machine func...
Definition: RegUsageInfoCollector.cpp:76
llvm::createMIRAddFSDiscriminatorsPass
FunctionPass * createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P)
Add Flow Sensitive Discriminators.
llvm::createBreakFalseDeps
FunctionPass * createBreakFalseDeps()
Creates Break False Dependencies pass.
Definition: BreakFalseDeps.cpp:105
llvm::createJumpInstrTablesPass
ModulePass * createJumpInstrTablesPass()
createJumpInstrTables - This pass creates jump-instruction tables.
llvm::createBasicBlockSectionsPass
MachineFunctionPass * createBasicBlockSectionsPass(const MemoryBuffer *Buf)
createBasicBlockSections Pass - This pass assigns sections to machine basic blocks and is enabled wit...
Definition: BasicBlockSections.cpp:531
llvm::createWasmEHPass
FunctionPass * createWasmEHPass()
createWasmEHPass - This pass adapts exception handling code to use WebAssembly's exception handling s...
Definition: WasmEHPrepare.cpp:134
llvm::createPseudoProbeInserter
FunctionPass * createPseudoProbeInserter()
This pass inserts pseudo probe annotation for callsite profiling.
Definition: PseudoProbeInserter.cpp:153
llvm::MachineFunctionPrinterPassID
char & MachineFunctionPrinterPassID
MachineFunctionPrinterPass - This pass prints out MachineInstr's.
Definition: MachineFunctionPrinterPass.cpp:58
llvm::TailDuplicateID
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
Definition: TailDuplication.cpp:76
llvm::DeadMachineInstructionElimID
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
Definition: DeadMachineInstructionElim.cpp:57
llvm::createIfConverter
FunctionPass * createIfConverter(std::function< bool(const MachineFunction &)> Ftor)
Definition: IfConversion.cpp:2366
llvm::createGlobalMergePass
Pass * createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, bool OnlyOptimizeForSize=false, bool MergeExternalByDefault=false)
GlobalMerge - This pass merges internal (by default) globals into structs to enable reuse of a base p...
Definition: GlobalMerge.cpp:680
llvm::BranchRelaxationPassID
char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
Definition: BranchRelaxation.cpp:119
llvm::MachineSchedulerID
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
Definition: MachineScheduler.cpp:210
CodeGen.h
llvm::MachineDominanceFrontierID
char & MachineDominanceFrontierID
MachineDominanaceFrontier - This pass is a machine dominators analysis.
Definition: MachineDominanceFrontier.cpp:38
llvm::PostRASchedulerID
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
Definition: PostRASchedulerList.cpp:199
llvm::MachineDominatorsID
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
llvm::MachineCombinerID
char & MachineCombinerID
This pass performs instruction combining using trace metrics to estimate critical-path and resource d...
Definition: MachineCombiner.cpp:130
llvm::MIRPrintingPassID
char & MIRPrintingPassID
MIRPrintingPass - this pass prints out the LLVM IR using the MIR serialization format.
Definition: MIRPrintingPass.cpp:61
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::createBasicRegisterAllocator
FunctionPass * createBasicRegisterAllocator()
BasicRegisterAllocation Pass - This pass implements a degenerate global register allocator using the ...
Definition: RegAllocBasic.cpp:337
llvm::ImplicitNullChecksID
char & ImplicitNullChecksID
ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.
Definition: ImplicitNullChecks.cpp:816
llvm::EarlyMachineLICMID
char & EarlyMachineLICMID
This pass performs loop invariant code motion on machine instructions.
Definition: MachineLICM.cpp:298
llvm::createInterleavedLoadCombinePass
FunctionPass * createInterleavedLoadCombinePass()
InterleavedLoadCombines Pass - This pass identifies interleaved loads and combines them into wide loa...
Definition: InterleavedLoadCombinePass.cpp:1363
llvm::PostMachineSchedulerID
char & PostMachineSchedulerID
PostMachineScheduler - This pass schedules machine instructions postRA.
Definition: MachineScheduler.cpp:241
llvm::PostRAMachineSinkingID
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
Definition: MachineSink.cpp:1561
llvm::RemoveRedundantDebugValuesID
char & RemoveRedundantDebugValuesID
RemoveRedundantDebugValues pass.
Definition: RemoveRedundantDebugValues.cpp:62
llvm::IfConverterID
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
Definition: IfConversion.cpp:436
llvm::createSafeStackPass
FunctionPass * createSafeStackPass()
This pass splits the stack into a safe stack and an unsafe stack to protect against stack-based overf...
Definition: SafeStack.cpp:943
llvm::LiveIntervalsID
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers.
Definition: LiveIntervals.cpp:64
File
Instrumentation for Order File
Definition: InstrOrderFile.cpp:205
llvm::createCodeGenPreparePass
FunctionPass * createCodeGenPreparePass()
createCodeGenPreparePass - Transform the code to expose more pattern matching during instruction sele...
Definition: CodeGenPrepare.cpp:453
llvm::EarlyIfPredicatorID
char & EarlyIfPredicatorID
EarlyIfPredicator - This pass performs if-conversion on SSA form by predicating if/else block and ins...
Definition: EarlyIfConversion.cpp:1109
llvm::createStackProtectorPass
FunctionPass * createStackProtectorPass()
createStackProtectorPass - This pass adds stack protectors to functions.
Definition: StackProtector.cpp:77
llvm::createCFGuardLongjmpPass
FunctionPass * createCFGuardLongjmpPass()
Creates CFGuard longjmp target identification pass.