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HexagonFrameLowering.h
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1 //==- HexagonFrameLowering.h - Define frame lowering for Hexagon -*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
10 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
11 
12 #include "Hexagon.h"
13 #include "HexagonBlockRanges.h"
15 #include "llvm/ADT/STLExtras.h"
19 #include <vector>
20 
21 namespace llvm {
22 
23 class BitVector;
24 class HexagonInstrInfo;
25 class HexagonRegisterInfo;
26 class MachineFunction;
27 class MachineInstr;
28 class MachineRegisterInfo;
29 class TargetRegisterClass;
30 
32 public:
33  // First register which could possibly hold a variable argument.
37 
38  // All of the prolog/epilog functionality, including saving and restoring
39  // callee-saved registers is handled in emitPrologue. This is to have the
40  // logic for shrink-wrapping in one place.
42  override;
44  override {}
45 
46  bool enableCalleeSaveSkip(const MachineFunction &MF) const override;
47 
51  const TargetRegisterInfo *TRI) const override {
52  return true;
53  }
54 
55  bool
59  const TargetRegisterInfo *TRI) const override {
60  return true;
61  }
62 
63  bool hasReservedCallFrame(const MachineFunction &MF) const override {
64  // We always reserve call frame as a part of the initial stack allocation.
65  return true;
66  }
67 
68  bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override {
69  // Override this function to avoid calling hasFP before CSI is set
70  // (the default implementation calls hasFP).
71  return true;
72  }
73 
76  MachineBasicBlock::iterator I) const override;
78  RegScavenger *RS = nullptr) const override;
79  void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
80  RegScavenger *RS) const override;
81 
82  bool targetHandlesStackFrameRounding() const override {
83  return true;
84  }
85 
87  Register &FrameReg) const override;
88  bool hasFP(const MachineFunction &MF) const override;
89 
90  const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries)
91  const override {
92  static const SpillSlot Offsets[] = {
93  { Hexagon::R17, -4 }, { Hexagon::R16, -8 }, { Hexagon::D8, -8 },
94  { Hexagon::R19, -12 }, { Hexagon::R18, -16 }, { Hexagon::D9, -16 },
95  { Hexagon::R21, -20 }, { Hexagon::R20, -24 }, { Hexagon::D10, -24 },
96  { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 },
97  { Hexagon::R25, -36 }, { Hexagon::R24, -40 }, { Hexagon::D12, -40 },
98  { Hexagon::R27, -44 }, { Hexagon::R26, -48 }, { Hexagon::D13, -48 }
99  };
100  NumEntries = array_lengthof(Offsets);
101  return Offsets;
102  }
103 
105  const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI)
106  const override;
107 
108  bool needsAligna(const MachineFunction &MF) const;
109  const MachineInstr *getAlignaInstr(const MachineFunction &MF) const;
110 
111  void insertCFIInstructions(MachineFunction &MF) const;
112 
113 private:
114  using CSIVect = std::vector<CalleeSavedInfo>;
115 
116  void expandAlloca(MachineInstr *AI, const HexagonInstrInfo &TII,
117  unsigned SP, unsigned CF) const;
118  void insertPrologueInBlock(MachineBasicBlock &MBB, bool PrologueStubs) const;
119  void insertEpilogueInBlock(MachineBasicBlock &MBB) const;
120  void insertAllocframe(MachineBasicBlock &MBB,
121  MachineBasicBlock::iterator InsertPt, unsigned NumBytes) const;
122  bool insertCSRSpillsInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
123  const HexagonRegisterInfo &HRI, bool &PrologueStubs) const;
124  bool insertCSRRestoresInBlock(MachineBasicBlock &MBB, const CSIVect &CSI,
125  const HexagonRegisterInfo &HRI) const;
126  void updateEntryPaths(MachineFunction &MF, MachineBasicBlock &SaveB) const;
127  bool updateExitPaths(MachineBasicBlock &MBB, MachineBasicBlock &RestoreB,
128  BitVector &DoneT, BitVector &DoneF, BitVector &Path) const;
129  void insertCFIInstructionsAt(MachineBasicBlock &MBB,
130  MachineBasicBlock::iterator At) const;
131 
132  void adjustForCalleeSavedRegsSpillCall(MachineFunction &MF) const;
133 
134  bool expandCopy(MachineBasicBlock &B, MachineBasicBlock::iterator It,
136  SmallVectorImpl<unsigned> &NewRegs) const;
137  bool expandStoreInt(MachineBasicBlock &B, MachineBasicBlock::iterator It,
139  SmallVectorImpl<unsigned> &NewRegs) const;
140  bool expandLoadInt(MachineBasicBlock &B, MachineBasicBlock::iterator It,
142  SmallVectorImpl<unsigned> &NewRegs) const;
143  bool expandStoreVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It,
145  SmallVectorImpl<unsigned> &NewRegs) const;
146  bool expandLoadVecPred(MachineBasicBlock &B, MachineBasicBlock::iterator It,
148  SmallVectorImpl<unsigned> &NewRegs) const;
149  bool expandStoreVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It,
151  SmallVectorImpl<unsigned> &NewRegs) const;
152  bool expandLoadVec2(MachineBasicBlock &B, MachineBasicBlock::iterator It,
154  SmallVectorImpl<unsigned> &NewRegs) const;
155  bool expandStoreVec(MachineBasicBlock &B, MachineBasicBlock::iterator It,
157  SmallVectorImpl<unsigned> &NewRegs) const;
158  bool expandLoadVec(MachineBasicBlock &B, MachineBasicBlock::iterator It,
160  SmallVectorImpl<unsigned> &NewRegs) const;
161  bool expandSpillMacros(MachineFunction &MF,
162  SmallVectorImpl<unsigned> &NewRegs) const;
163 
164  unsigned findPhysReg(MachineFunction &MF, HexagonBlockRanges::IndexRange &FIR,
167  const TargetRegisterClass *RC) const;
168  void optimizeSpillSlots(MachineFunction &MF,
169  SmallVectorImpl<unsigned> &VRegs) const;
170 
171  void findShrunkPrologEpilog(MachineFunction &MF, MachineBasicBlock *&PrologB,
172  MachineBasicBlock *&EpilogB) const;
173 
174  void addCalleeSaveRegistersAsImpOperand(MachineInstr *MI, const CSIVect &CSI,
175  bool IsDef, bool IsKill) const;
176  bool shouldInlineCSR(const MachineFunction &MF, const CSIVect &CSI) const;
177  bool useSpillFunction(const MachineFunction &MF, const CSIVect &CSI) const;
178  bool useRestoreFunction(const MachineFunction &MF, const CSIVect &CSI) const;
179  bool mayOverflowFrameOffset(MachineFunction &MF) const;
180 };
181 
182 } // end namespace llvm
183 
184 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H
HexagonMCTargetDesc.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:102
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
TargetFrameLowering.h
llvm::TargetFrameLowering
Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:43
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::HexagonFrameLowering::HexagonFrameLowering
HexagonFrameLowering()
Definition: HexagonFrameLowering.h:35
llvm::HexagonFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: HexagonFrameLowering.cpp:1261
llvm::HexagonBlockRanges::IndexRange
Definition: HexagonBlockRanges.h:81
MachineBasicBlock.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
llvm::HexagonFrameLowering::assignCalleeSavedSpillSlots
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
Definition: HexagonFrameLowering.cpp:1611
STLExtras.h
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::HexagonFrameLowering::insertCFIInstructions
void insertCFIInstructions(MachineFunction &MF) const
Definition: HexagonFrameLowering.cpp:1020
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
llvm::HexagonFrameLowering::enableCalleeSaveSkip
bool enableCalleeSaveSkip(const MachineFunction &MF) const override
Returns true if the target can safely skip saving callee-saved registers for noreturn nounwind functi...
Definition: HexagonFrameLowering.cpp:557
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::HexagonFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: HexagonFrameLowering.cpp:1142
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::HexagonFrameLowering::needsAligna
bool needsAligna(const MachineFunction &MF) const
Definition: HexagonFrameLowering.cpp:2592
llvm::HexagonFrameLowering::canSimplifyCallFramePseudos
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
canSimplifyCallFramePseudos - When possible, it's best to simplify the call frame pseudo ops before d...
Definition: HexagonFrameLowering.h:68
llvm::BitVector
Definition: BitVector.h:74
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::array_lengthof
constexpr size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:1390
llvm::HexagonFrameLowering::targetHandlesStackFrameRounding
bool targetHandlesStackFrameRounding() const override
targetHandlesStackFrameRounding - Returns true if the target is responsible for rounding up the stack...
Definition: HexagonFrameLowering.h:82
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
Hexagon.h
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::RegScavenger
Definition: RegisterScavenging.h:34
HexagonBlockRanges.h
llvm::MachineFunction
Definition: MachineFunction.h:230
llvm::HexagonInstrInfo
Definition: HexagonInstrInfo.h:38
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::HexagonFrameLowering::getCalleeSavedSpillSlots
const SpillSlot * getCalleeSavedSpillSlots(unsigned &NumEntries) const override
getCalleeSavedSpillSlots - This method returns a pointer to an array of pairs, that contains an entry...
Definition: HexagonFrameLowering.h:90
llvm::HexagonFrameLowering
Definition: HexagonFrameLowering.h:31
llvm::HexagonBlockRanges::RegToRangeMap
std::map< RegisterRef, RangeList > RegToRangeMap
Definition: HexagonBlockRanges.h:145
llvm::HexagonFrameLowering::getAlignaInstr
const MachineInstr * getAlignaInstr(const MachineFunction &MF) const
Definition: HexagonFrameLowering.cpp:2602
MachineFrameInfo.h
llvm::HexagonBlockRanges::InstrIndexMap
Definition: HexagonBlockRanges.h:125
llvm::HexagonFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: HexagonFrameLowering.cpp:1493
llvm::HexagonFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: HexagonFrameLowering.h:48
llvm::HexagonFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: HexagonFrameLowering.h:43
llvm::HexagonFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: HexagonFrameLowering.cpp:2124
llvm::HexagonFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Perform most of the PEI work here:
Definition: HexagonFrameLowering.cpp:506
llvm::HexagonFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: HexagonFrameLowering.h:63
llvm::SmallVectorImpl< unsigned >
llvm::TargetFrameLowering::StackGrowsDown
@ StackGrowsDown
Definition: TargetFrameLowering.h:47
llvm::HexagonFrameLowering::restoreCalleeSavedRegisters
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
Definition: HexagonFrameLowering.h:56
llvm::HexagonRegisterInfo
Definition: HexagonRegisterInfo.h:29
llvm::SI::KernelInputOffsets::Offsets
Offsets
Offsets in bytes from the start of the input buffer.
Definition: SIInstrInfo.h:1247
llvm::MachineInstrBundleIterator< MachineInstr >
true
basic Basic Alias true
Definition: BasicAliasAnalysis.cpp:1815
llvm::TargetFrameLowering::SpillSlot
Definition: TargetFrameLowering.h:51
llvm::HexagonFrameLowering::FirstVarArgSavedReg
int FirstVarArgSavedReg
Definition: HexagonFrameLowering.h:34
llvm::HexagonFrameLowering::processFunctionBeforeFrameFinalized
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=nullptr) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Definition: HexagonFrameLowering.cpp:1504