LLVM 17.0.0git
SystemZRegisterInfo.h
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1//===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H
10#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H
11
12#include "SystemZ.h"
15
16#define GET_REGINFO_HEADER
17#include "SystemZGenRegisterInfo.inc"
18
19namespace llvm {
20
21class LiveIntervals;
22
23namespace SystemZ {
24// Return the subreg to use for referring to the even and odd registers
25// in a GR128 pair. Is32Bit says whether we want a GR32 or GR64.
26inline unsigned even128(bool Is32bit) {
27 return Is32bit ? subreg_hl32 : subreg_h64;
28}
29inline unsigned odd128(bool Is32bit) {
30 return Is32bit ? subreg_l32 : subreg_l64;
31}
32
33// Reg should be a 32-bit GPR. Return true if it is a high register rather
34// than a low register.
35inline bool isHighReg(unsigned int Reg) {
36 if (SystemZ::GRH32BitRegClass.contains(Reg))
37 return true;
38 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32");
39 return false;
40}
41} // end namespace SystemZ
42
43/// A SystemZ-specific class detailing special use registers
44/// particular for calling conventions.
45/// It is abstract, all calling conventions must override and
46/// define the pure virtual member function defined in this class.
48
49public:
50 /// \returns the register that keeps the return function address.
52
53 /// \returns the register that keeps the
54 /// stack pointer address.
55 virtual int getStackPointerRegister() = 0;
56
57 /// \returns the register that keeps the
58 /// frame pointer address.
59 virtual int getFramePointerRegister() = 0;
60
61 /// \returns an array of all the callee saved registers.
62 virtual const MCPhysReg *
63 getCalleeSavedRegs(const MachineFunction *MF) const = 0;
64
65 /// \returns the mask of all the call preserved registers.
67 CallingConv::ID CC) const = 0;
68
69 /// \returns the offset to the locals area.
70 virtual int getCallFrameSize() = 0;
71
72 /// \returns the stack pointer bias.
73 virtual int getStackPointerBias() = 0;
74
75 /// Destroys the object. Bogus destructor allowing derived classes
76 /// to override it.
78};
79
80/// XPLINK64 calling convention specific use registers
81/// Particular to z/OS when in 64 bit mode
83public:
84 int getReturnFunctionAddressRegister() final { return SystemZ::R7D; };
85
86 int getStackPointerRegister() final { return SystemZ::R4D; };
87
88 int getFramePointerRegister() final { return SystemZ::R8D; };
89
90 int getAddressOfCalleeRegister() { return SystemZ::R6D; };
91
92 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const final;
93
95 CallingConv::ID CC) const final;
96
97 int getCallFrameSize() final { return 128; }
98
99 int getStackPointerBias() final { return 2048; }
100
101 /// Destroys the object. Bogus destructor overriding base class destructor
103};
104
105/// ELF calling convention specific use registers
106/// Particular when on zLinux in 64 bit mode
108public:
109 int getReturnFunctionAddressRegister() final { return SystemZ::R14D; };
110
111 int getStackPointerRegister() final { return SystemZ::R15D; };
112
113 int getFramePointerRegister() final { return SystemZ::R11D; };
114
115 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const final;
116
118 CallingConv::ID CC) const final;
119
121
122 int getStackPointerBias() final { return 0; }
123
124 /// Destroys the object. Bogus destructor overriding base class destructor
126};
127
129public:
130 SystemZRegisterInfo(unsigned int RA);
131
132 /// getPointerRegClass - Return the register class to use to hold pointers.
133 /// This is currently only used by LOAD_STACK_GUARD, which requires a non-%r0
134 /// register, hence ADDR64.
135 const TargetRegisterClass *
137 unsigned Kind=0) const override {
138 return &SystemZ::ADDR64BitRegClass;
139 }
140
141 /// getCrossCopyRegClass - Returns a legal register class to copy a register
142 /// in the specified class to or from. Returns NULL if it is possible to copy
143 /// between a two registers of the specified class.
144 const TargetRegisterClass *
145 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
146
149 const MachineFunction &MF, const VirtRegMap *VRM,
150 const LiveRegMatrix *Matrix) const override;
151
152 // Override TargetRegisterInfo.h.
153 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
154 return true;
155 }
156 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
157 return true;
158 }
159 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
161 CallingConv::ID CC) const override;
162 BitVector getReservedRegs(const MachineFunction &MF) const override;
164 int SPAdj, unsigned FIOperandNum,
165 RegScavenger *RS) const override;
166
167 /// SrcRC and DstRC will be morphed into NewRC if this returns true.
169 const TargetRegisterClass *SrcRC,
170 unsigned SubReg,
171 const TargetRegisterClass *DstRC,
172 unsigned DstSubReg,
173 const TargetRegisterClass *NewRC,
174 LiveIntervals &LIS) const override;
175
176 Register getFrameRegister(const MachineFunction &MF) const override;
177};
178
179} // end namespace llvm
180
181#endif
unsigned SubReg
IRTranslator LLVM IR MI
Live Register Matrix
unsigned Reg
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
SI optimize exec mask operations pre RA
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
Definition: Value.cpp:467
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
Representation of each machine instruction.
Definition: MachineInstr.h:68
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
A SystemZ-specific class detailing special use registers particular for calling conventions.
virtual ~SystemZCallingConventionRegisters()=default
Destroys the object.
virtual const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const =0
virtual const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const =0
ELF calling convention specific use registers Particular when on zLinux in 64 bit mode.
~SystemZELFRegisters()=default
Destroys the object. Bogus destructor overriding base class destructor.
int getReturnFunctionAddressRegister() final
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const final
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const final
XPLINK64 calling convention specific use registers Particular to z/OS when in 64 bit mode.
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const final
~SystemZXPLINK64Registers()=default
Destroys the object. Bogus destructor overriding base class destructor.
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const final
const int64_t ELFCallFrameSize
unsigned odd128(bool Is32bit)
unsigned even128(bool Is32bit)
bool isHighReg(unsigned int Reg)
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const override
bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override
getPointerRegClass - Return the register class to use to hold pointers.
bool requiresRegisterScavenging(const MachineFunction &MF) const override
bool getRegAllocationHints(Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override
Register getFrameRegister(const MachineFunction &MF) const override
bool shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
SrcRC and DstRC will be morphed into NewRC if this returns true.
const TargetRegisterClass * getCrossCopyRegClass(const TargetRegisterClass *RC) const override
getCrossCopyRegClass - Returns a legal register class to copy a register in the specified class to or...