26 if (!Def->getMF()->getFunction().getSubprogram())
32 if (!Def->getOperand(0).isReg())
34 CurrentReg = Def->getOperand(0).getReg();
37 ME = Def->getParent()->end();
40 if (MI->definesRegister(CurrentReg, nullptr))
42 if (MI->isDebugValue() && MI->hasDebugOperandForReg(CurrentReg))
43 DbgValues.push_back(&*MI);
50 if (
A->getOpcode() !=
B->getOpcode() ||
55 if ((OpA.
isImm() && OpB.isImm() && OpA.
getImm() == OpB.getImm()) ||
63WebAssemblyDebugValueManager::getSinkableDebugValues(
65 if (DbgValues.empty())
68 SmallVector<MachineInstr *, 8> DbgValuesInBetween;
70 if (Def->getParent() ==
Insert->getParent()) {
73 bool DefFirst =
false;
75 ME = Def->getParent()->end();
81 if (
MI->isDebugValue())
90 if (!Def->getParent()->isSuccessor(
Insert->getParent()))
96 ME = Def->getParent()->end();
98 if (
MI->isDebugValue())
102 ME =
Insert->getIterator();
104 if (
MI->isDebugValue())
111 SmallDenseMap<DebugVariable, SmallVector<MachineInstr *, 2>>
112 SeenDbgVarToDbgValues;
113 for (
auto *DV : DbgValuesInBetween) {
115 DebugVariable Var(DV->getDebugVariable(), DV->getDebugExpression(),
116 DV->getDebugLoc()->getInlinedAt());
117 SeenDbgVarToDbgValues[Var].push_back(DV);
131 MachineRegisterInfo &
MRI = Def->getParent()->getParent()->getRegInfo();
132 for (
auto *DV : DbgValues) {
133 DebugVariable Var(DV->getDebugVariable(), DV->getDebugExpression(),
134 DV->getDebugLoc()->getInlinedAt());
135 auto It = SeenDbgVarToDbgValues.
find(Var);
136 if (It == SeenDbgVarToDbgValues.
end()) {
142 auto &OverlappingDbgValues = It->second;
143 bool Sinkable =
true;
144 for (
auto *OverlappingDV : OverlappingDbgValues) {
145 MachineOperand &DbgOp = OverlappingDV->getDebugOperand(0);
146 if (!DbgOp.
isReg()) {
151 MachineInstr *OtherDef =
MRI.getUniqueVRegDef(OtherReg);
215 return SinkableDbgValues;
220bool WebAssemblyDebugValueManager::isInsertSamePlace(
222 if (Def->getParent() !=
Insert->getParent())
237 for (
const auto &
MI : *
MBB)
238 if (
MI.getDebugLoc() ==
DL)
268 if (isInsertSamePlace(Insert))
277 getSinkableDebugValues(Insert);
286 MBB->splice(Insert, Def->getParent(), Def);
288 if (DbgValues.empty())
295 MBB->insert(Insert, Clone);
339 DV->setDebugValueUndef();
341 DbgValues.
swap(NewDbgValues);
356 bool CloneDef)
const {
361 getSinkableDebugValues(Insert);
371 if (NewReg != CurrentReg && NewReg.
isValid())
373 MBB->insert(Insert, Clone);
376 if (DbgValues.empty())
383 MBB->insert(Insert, Clone);
387 if (NewReg != CurrentReg && NewReg.
isValid())
388 for (
auto *DBI : NewDbgValues)
389 for (
auto &MO : DBI->getDebugOperandsForReg(CurrentReg))
395 if (Reg != CurrentReg && Reg.isValid()) {
396 for (
auto *DBI : DbgValues)
397 for (
auto &MO : DBI->getDebugOperandsForReg(CurrentReg))
400 Def->getOperand(0).setReg(Reg);
405 for (
auto *DBI : DbgValues) {
406 auto IndexType = DBI->isIndirectDebugValue()
409 for (
auto &MO : DBI->getDebugOperandsForReg(CurrentReg))
410 MO.ChangeToTargetIndex(IndexType, LocalId);
416 Def->removeFromParent();
418 DV->setDebugValueUndef();
unsigned const MachineRegisterInfo * MRI
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Promote Memory to Register
static bool isSameScalarConst(const MachineInstr *A, const MachineInstr *B)
static bool hasSameDebugLoc(const MachineBasicBlock *MBB, DebugLoc DL)
This file contains the declaration of the WebAssembly-specific manager for DebugValues associated wit...
This file provides WebAssembly-specific target descriptions.
This file declares WebAssembly-specific per-machine-function information.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.
iterator find(const_arg_type_t< KeyT > Val)
MachineInstrBundleIterator< MachineInstr > iterator
Representation of each machine instruction.
const MachineOperand & getOperand(unsigned i) const
void setDebugLoc(DebugLoc DL)
Replace current source information with new such.
MachineOperand class - Representation of each machine instruction operand.
const GlobalValue * getGlobal() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
LLVM_ABI void setReg(Register Reg)
Change the register this operand corresponds to.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
Register getReg() const
getReg - Returns the register number.
const ConstantFP * getFPImm() const
bool isFPImm() const
isFPImm - Tests if this is a MO_FPImmediate operand.
Wrapper class representing virtual and physical registers.
constexpr bool isValid() const
void swap(SmallVectorImpl &RHS)
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
WebAssemblyDebugValueManager(MachineInstr *Def)
void updateReg(Register Reg)
void cloneSink(MachineInstr *Insert, Register NewReg=Register(), bool CloneDef=true) const
void replaceWithLocal(unsigned LocalId)
void sink(MachineInstr *Insert)
bool isScalarConst(unsigned Opc)
This is an optimization pass for GlobalISel generic memory operations.
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool is_contained(R &&Range, const E &Element)
Returns true if Element is found in Range.