43#define DEBUG_TYPE "x86-insert-vzeroupper"
47 cl::desc(
"Minimize AVX to SSE transition penalty"),
50STATISTIC(NumVZU,
"Number of vzeroupper instructions inserted");
59 StringRef getPassName()
const override {
return "X86 vzeroupper inserter"; }
61 bool runOnMachineFunction(MachineFunction &MF)
override;
63 MachineFunctionProperties getRequiredProperties()
const override {
64 return MachineFunctionProperties().setNoVRegs();
68enum BlockExitState { PASS_THROUGH, EXITS_CLEAN, EXITS_DIRTY };
89 BlockExitState ExitState = PASS_THROUGH;
90 bool AddedToDirtySuccessors =
false;
93 BlockState() =
default;
100char X86InsertVZeroUpperLegacy::ID = 0;
103 return new X86InsertVZeroUpperLegacy();
110 return "Pass-through";
112 return "Exits-dirty";
114 return "Exits-clean";
123 return (
Reg >= X86::YMM0 &&
Reg <= X86::YMM15) ||
124 (
Reg >= X86::ZMM0 &&
Reg <= X86::ZMM15);
128 for (std::pair<MCRegister, Register> LI : MRI.
liveins())
136 for (
unsigned reg = X86::YMM0; reg <= X86::YMM15; ++reg) {
140 for (
unsigned reg = X86::ZMM0; reg <= X86::ZMM15; ++reg) {
163 assert(
MI.isCall() &&
"Can only be called on call instructions.");
182 BlockStateMap &BlockStates,
183 DirtySuccessorsWorkList &DirtySuccessors) {
184 if (!BlockStates[
MBB.getNumber()].AddedToDirtySuccessors) {
185 DirtySuccessors.push_back(&
MBB);
186 BlockStates[
MBB.getNumber()].AddedToDirtySuccessors =
true;
193 BlockStateMap &BlockStates,
194 DirtySuccessorsWorkList &DirtySuccessors,
198 BlockExitState CurState = PASS_THROUGH;
199 BlockStates[
MBB.getNumber()].FirstUnguardedCall =
MBB.end();
200 bool MadeChange =
false;
203 bool IsCall =
MI.isCall();
204 bool IsReturn =
MI.isReturn();
205 bool IsControlFlow = IsCall || IsReturn;
209 if (IsX86INTR && IsReturn)
213 if (
MI.getOpcode() == X86::VZEROALL ||
MI.getOpcode() == X86::VZEROUPPER) {
214 CurState = EXITS_CLEAN;
219 if (!IsControlFlow && CurState == EXITS_DIRTY)
225 CurState = EXITS_DIRTY;
249 if (CurState == EXITS_DIRTY) {
254 CurState = EXITS_CLEAN;
255 }
else if (CurState == PASS_THROUGH) {
261 BlockStates[
MBB.getNumber()].FirstUnguardedCall =
MI;
262 CurState = EXITS_CLEAN;
269 if (CurState == EXITS_DIRTY)
273 BlockStates[
MBB.getNumber()].ExitState = CurState;
284 if (!ST.hasAVX() || !ST.insertVZEROUPPER())
294 bool YmmOrZmmUsed = FnHasLiveInYmmOrZmm;
295 for (
const auto *RC : {&X86::VR256RegClass, &X86::VR512_0_15RegClass}) {
310 bool EverMadeChange =
false;
312 DirtySuccessorsWorkList DirtySuccessors;
315 "X86VZeroUpper state should be clear");
326 if (FnHasLiveInYmmOrZmm)
332 while (!DirtySuccessors.empty()) {
334 DirtySuccessors.pop_back();
335 BlockState &BBState = BlockStates[
MBB.getNumber()];
339 if (BBState.FirstUnguardedCall !=
MBB.end())
345 if (BBState.ExitState == PASS_THROUGH) {
347 <<
" was Pass-through, is now Dirty-out.\n");
353 return EverMadeChange;
356bool X86InsertVZeroUpperLegacy::runOnMachineFunction(
MachineFunction &MF) {
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
const HexagonInstrInfo * TII
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
static bool callHasRegMask(MachineInstr &MI)
Check if given call instruction has a RegMask operand.
static bool checkFnHasLiveInYmmOrZmm(MachineRegisterInfo &MRI)
static bool hasYmmOrZmmReg(MachineInstr &MI)
static bool isYmmOrZmmReg(MCRegister Reg)
VZEROUPPER cleans state that is related to Y/ZMM0-15 only.
static bool clobbersAllYmmAndZmmRegs(const MachineOperand &MO)
static bool processBasicBlock(MachineBasicBlock &MBB, BlockStateMap &BlockStates, DirtySuccessorsWorkList &DirtySuccessors, bool IsX86INTR, const TargetInstrInfo *TII)
Loop over all of the instructions in the basic block, inserting vzeroupper instructions before functi...
static const char * getBlockExitStateName(BlockExitState ST)
static cl::opt< bool > UseVZeroUpper("x86-use-vzeroupper", cl::Hidden, cl::desc("Minimize AVX to SSE transition penalty"), cl::init(true))
static bool insertVZeroUpper(MachineBasicBlock::iterator I, MachineBasicBlock &MBB, const TargetInstrInfo *TII)
Insert a vzeroupper instruction before I.
static void addDirtySuccessor(MachineBasicBlock &MBB, BlockStateMap &BlockStates, DirtySuccessorsWorkList &DirtySuccessors)
Add MBB to the DirtySuccessors list if it hasn't already been added.
Represents analyses that only rely on functions' control flow.
FunctionPass class - This class is used to implement most global optimizations.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Wrapper class representing physical registers. Should be passed by value.
MachineInstrBundleIterator< MachineInstr > iterator
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
const MachineBasicBlock & front() const
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
bool reg_nodbg_empty(Register RegNo) const
reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.
ArrayRef< std::pair< MCRegister, Register > > liveins() const
static PreservedAnalyses all()
Construct a special preserved set that preserves all passes.
PreservedAnalyses & preserveSet()
Mark an analysis set as preserved.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
TargetInstrInfo - Interface to description of machine instruction set.
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
Pass manager infrastructure for declaring and invalidating analyses.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ X86_INTR
x86 hardware interrupt context.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
LLVM_ABI PreservedAnalyses getMachineFunctionPassPreservedAnalyses()
Returns the minimum set of Analyses that all machine function passes must preserve.
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
FunctionPass * createX86InsertVZeroUpperLegacyPass()
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...