LLVM  14.0.0git
X86RegisterBankInfo.h
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1 //===- X86RegisterBankInfo ---------------------------------------*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file declares the targeting of the RegisterBankInfo class for X86.
10 /// \todo This should be generated by TableGen.
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H
14 #define LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H
15 
17 
18 #define GET_REGBANK_DECLARATIONS
19 #include "X86GenRegisterBank.inc"
20 
21 namespace llvm {
22 
23 class LLT;
24 
26 protected:
27 #define GET_TARGET_REGBANK_CLASS
28 #include "X86GenRegisterBank.inc"
29 #define GET_TARGET_REGBANK_INFO_CLASS
30 #include "X86GenRegisterBankInfo.def"
31 
34 
35  static PartialMappingIdx getPartialMappingIdx(const LLT &Ty, bool isFP);
36  static const RegisterBankInfo::ValueMapping *
37  getValueMapping(PartialMappingIdx Idx, unsigned NumOperands);
38 };
39 
40 class TargetRegisterInfo;
41 
42 /// This class provides the information for the target register banks.
44 private:
45  /// Get an instruction mapping.
46  /// \return An InstructionMappings with a statically allocated
47  /// OperandsMapping.
48  const InstructionMapping &getSameOperandsMapping(const MachineInstr &MI,
49  bool isFP) const;
50 
51  /// Track the bank of each instruction operand(register)
52  static void
53  getInstrPartialMappingIdxs(const MachineInstr &MI,
54  const MachineRegisterInfo &MRI, const bool isFP,
56 
57  /// Construct the instruction ValueMapping from PartialMappingIdxs
58  /// \return true if mapping succeeded.
59  static bool
60  getInstrValueMapping(const MachineInstr &MI,
61  const SmallVectorImpl<PartialMappingIdx> &OpRegBankIdx,
63 
64 public:
66 
68  LLT) const override;
69 
71  getInstrAlternativeMappings(const MachineInstr &MI) const override;
72 
73  /// See RegisterBankInfo::applyMapping.
74  void applyMappingImpl(const OperandsMapper &OpdMapper) const override;
75 
76  const InstructionMapping &
77  getInstrMapping(const MachineInstr &MI) const override;
78 };
79 
80 } // namespace llvm
81 #endif
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::X86RegisterBankInfo::applyMappingImpl
void applyMappingImpl(const OperandsMapper &OpdMapper) const override
See RegisterBankInfo::applyMapping.
Definition: X86RegisterBankInfo.cpp:272
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
RegisterBankInfo.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::X86RegisterBankInfo::getInstrMapping
const InstructionMapping & getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.
Definition: X86RegisterBankInfo.cpp:162
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::X86GenRegisterBankInfo::getPartialMappingIdx
static PartialMappingIdx getPartialMappingIdx(const LLT &Ty, bool isFP)
Definition: X86RegisterBankInfo.cpp:66
llvm::RegisterBank
This class implements the register bank concept.
Definition: RegisterBank.h:28
llvm::X86GenRegisterBankInfo::PartMappings
static RegisterBankInfo::PartialMapping PartMappings[]
Definition: X86RegisterBankInfo.h:32
llvm::RegisterBankInfo::PartialMapping
Helper struct that represents how a value is partially mapped into a register.
Definition: RegisterBankInfo.h:48
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::X86RegisterBankInfo::X86RegisterBankInfo
X86RegisterBankInfo(const TargetRegisterInfo &TRI)
Definition: X86RegisterBankInfo.cpp:28
llvm::RegisterBankInfo::OperandsMapper
Helper class used to get/create the virtual registers that will be used to replace the MachineOperand...
Definition: RegisterBankInfo.h:280
llvm::RegisterBankInfo
Holds all the information related to register banks.
Definition: RegisterBankInfo.h:39
llvm::X86RegisterBankInfo::getRegBankFromRegClass
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT) const override
Get a register bank that covers RC.
Definition: X86RegisterBankInfo.cpp:44
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::RegisterBankInfo::InstructionMapping
Helper class that represents how the value of an instruction may be mapped and what is the related co...
Definition: RegisterBankInfo.h:189
llvm::X86GenRegisterBankInfo::getValueMapping
static const RegisterBankInfo::ValueMapping * getValueMapping(PartialMappingIdx Idx, unsigned NumOperands)
llvm::RegisterBankInfo::ValueMapping
Helper struct that represents how a value is mapped through different register banks.
Definition: RegisterBankInfo.h:145
llvm::X86RegisterBankInfo
This class provides the information for the target register banks.
Definition: X86RegisterBankInfo.h:43
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::X86RegisterBankInfo::getInstrAlternativeMappings
InstructionMappings getInstrAlternativeMappings(const MachineInstr &MI) const override
Get the alternative mappings for MI.
Definition: X86RegisterBankInfo.cpp:278
llvm::X86GenRegisterBankInfo
Definition: X86RegisterBankInfo.h:25
llvm::X86GenRegisterBankInfo::ValMappings
static RegisterBankInfo::ValueMapping ValMappings[]
Definition: X86RegisterBankInfo.h:33
llvm::ARM::PartialMappingIdx
PartialMappingIdx
Definition: ARMRegisterBankInfo.cpp:31
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::LLT
Definition: LowLevelTypeImpl.h:40