36#define DEBUG_TYPE "gcn-create-vopd"
37STATISTIC(NumVOPDCreated,
"Number of VOPD Insts Created.");
57 return "GCN Create VOPD Instructions";
61 std::pair<MachineInstr *, MachineInstr *> &Pair) {
62 auto *FirstMI = Pair.first;
63 auto *SecondMI = Pair.second;
64 unsigned Opc1 = FirstMI->getOpcode();
65 unsigned Opc2 = SecondMI->getOpcode();
67 AMDGPU::getVOPDOpcode(Opc2));
69 "Should have previously determined this as a possible VOPD\n");
71 auto VOPDInst =
BuildMI(*FirstMI->getParent(), FirstMI,
72 FirstMI->getDebugLoc(), SII->get(NewOpcode))
73 .
setMIFlags(FirstMI->getFlags() | SecondMI->getFlags());
75 namespace VOPD = AMDGPU::VOPD;
80 for (
auto CompIdx : VOPD::COMPONENTS) {
81 auto MCOprIdx = InstInfo[CompIdx].getIndexOfDstInMCOperands();
82 VOPDInst.add(
MI[CompIdx]->getOperand(MCOprIdx));
85 for (
auto CompIdx : VOPD::COMPONENTS) {
86 auto CompSrcOprNum = InstInfo[CompIdx].getCompSrcOperandsNum();
87 for (
unsigned CompSrcIdx = 0; CompSrcIdx < CompSrcOprNum; ++CompSrcIdx) {
88 auto MCOprIdx = InstInfo[CompIdx].getIndexOfSrcInMCOperands(CompSrcIdx);
89 VOPDInst.add(
MI[CompIdx]->getOperand(MCOprIdx));
93 for (
auto CompIdx : VOPD::COMPONENTS)
94 VOPDInst.copyImplicitOps(*
MI[CompIdx]);
97 << *Pair.first <<
"\tY: " << *Pair.second <<
"\n");
99 for (
auto CompIdx : VOPD::COMPONENTS)
100 MI[CompIdx]->eraseFromParent();
110 if (!AMDGPU::hasVOPD(*ST) || !
ST->isWave32())
115 bool Changed =
false;
119 for (
auto &
MBB : MF) {
122 auto *FirstMI = &*MII;
126 if (FirstMI->isDebugInstr())
128 auto *SecondMI = &*MII;
129 unsigned Opc = FirstMI->getOpcode();
130 unsigned Opc2 = SecondMI->getOpcode();
133 std::pair<MachineInstr *, MachineInstr *> Pair;
135 if (FirstCanBeVOPD.
X && SecondCanBeVOPD.
Y)
136 Pair = {FirstMI, SecondMI};
137 else if (FirstCanBeVOPD.
Y && SecondCanBeVOPD.
X)
138 Pair = {SecondMI, FirstMI};
149 for (
auto &Pair : ReplaceCandidates) {
150 Changed |= doReplace(SII, Pair);
159char GCNCreateVOPD::ID = 0;
This file defines the StringMap class.
Provides AMDGPU specific target descriptions.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
AMD GCN specific subclass of TargetSubtarget.
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Interface definition for SIInstrInfo.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Represent the analysis usage information of a pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
bool skipFunction(const Function &F) const
Optional passes call this function to check whether the pass should be skipped.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Function & getFunction()
Return the LLVM function that this machine code represents.
const MachineInstrBuilder & setMIFlags(unsigned Flags) const
Representation of each machine instruction.
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
int getVOPDFull(unsigned OpX, unsigned OpY)
CanBeVOPD getCanBeVOPD(unsigned Opc)
VOPD::InstInfo getVOPDInstInfo(const MCInstrDesc &OpX, const MCInstrDesc &OpY)
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It, then continue incrementing it while it points to a debug instruction.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
bool checkVOPDRegConstraints(const SIInstrInfo &TII, const MachineInstr &FirstMI, const MachineInstr &SecondMI)