LLVM 17.0.0git
GCNCreateVOPD.cpp
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1//===- GCNCreateVOPD.cpp - Create VOPD Instructions ----------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// Combine VALU pairs into VOPD instructions
11/// Only works on wave32
12/// Has register requirements, we reject creating VOPD if the requirements are
13/// not met.
14/// shouldCombineVOPD mutator in postRA machine scheduler puts candidate
15/// instructions for VOPD back-to-back
16///
17//
18//===----------------------------------------------------------------------===//
19
20#include "AMDGPU.h"
21#include "GCNSubtarget.h"
22#include "GCNVOPDUtils.h"
24#include "SIInstrInfo.h"
27#include "llvm/ADT/Statistic.h"
28#include "llvm/ADT/StringMap.h"
33#include "llvm/Support/Debug.h"
34#include <utility>
35
36#define DEBUG_TYPE "gcn-create-vopd"
37STATISTIC(NumVOPDCreated, "Number of VOPD Insts Created.");
38
39using namespace llvm;
40
41namespace {
42
43class GCNCreateVOPD : public MachineFunctionPass {
44private:
45public:
46 static char ID;
47 const GCNSubtarget *ST = nullptr;
48
49 GCNCreateVOPD() : MachineFunctionPass(ID) {}
50
51 void getAnalysisUsage(AnalysisUsage &AU) const override {
52 AU.setPreservesCFG();
54 }
55
56 StringRef getPassName() const override {
57 return "GCN Create VOPD Instructions";
58 }
59
60 bool doReplace(const SIInstrInfo *SII,
61 std::pair<MachineInstr *, MachineInstr *> &Pair) {
62 auto *FirstMI = Pair.first;
63 auto *SecondMI = Pair.second;
64 unsigned Opc1 = FirstMI->getOpcode();
65 unsigned Opc2 = SecondMI->getOpcode();
66 int NewOpcode = AMDGPU::getVOPDFull(AMDGPU::getVOPDOpcode(Opc1),
67 AMDGPU::getVOPDOpcode(Opc2));
68 assert(NewOpcode != -1 &&
69 "Should have previously determined this as a possible VOPD\n");
70
71 auto VOPDInst = BuildMI(*FirstMI->getParent(), FirstMI,
72 FirstMI->getDebugLoc(), SII->get(NewOpcode))
73 .setMIFlags(FirstMI->getFlags() | SecondMI->getFlags());
74
75 namespace VOPD = AMDGPU::VOPD;
76 MachineInstr *MI[] = {FirstMI, SecondMI};
77 auto InstInfo =
78 AMDGPU::getVOPDInstInfo(FirstMI->getDesc(), SecondMI->getDesc());
79
80 for (auto CompIdx : VOPD::COMPONENTS) {
81 auto MCOprIdx = InstInfo[CompIdx].getIndexOfDstInMCOperands();
82 VOPDInst.add(MI[CompIdx]->getOperand(MCOprIdx));
83 }
84
85 for (auto CompIdx : VOPD::COMPONENTS) {
86 auto CompSrcOprNum = InstInfo[CompIdx].getCompSrcOperandsNum();
87 for (unsigned CompSrcIdx = 0; CompSrcIdx < CompSrcOprNum; ++CompSrcIdx) {
88 auto MCOprIdx = InstInfo[CompIdx].getIndexOfSrcInMCOperands(CompSrcIdx);
89 VOPDInst.add(MI[CompIdx]->getOperand(MCOprIdx));
90 }
91 }
92
93 for (auto CompIdx : VOPD::COMPONENTS)
94 VOPDInst.copyImplicitOps(*MI[CompIdx]);
95
96 LLVM_DEBUG(dbgs() << "VOPD Fused: " << *VOPDInst << " from\tX: "
97 << *Pair.first << "\tY: " << *Pair.second << "\n");
98
99 for (auto CompIdx : VOPD::COMPONENTS)
100 MI[CompIdx]->eraseFromParent();
101
102 ++NumVOPDCreated;
103 return true;
104 }
105
106 bool runOnMachineFunction(MachineFunction &MF) override {
107 if (skipFunction(MF.getFunction()))
108 return false;
110 if (!AMDGPU::hasVOPD(*ST) || !ST->isWave32())
111 return false;
112 LLVM_DEBUG(dbgs() << "CreateVOPD Pass:\n");
113
114 const SIInstrInfo *SII = ST->getInstrInfo();
115 bool Changed = false;
116
118
119 for (auto &MBB : MF) {
120 auto MII = MBB.begin(), E = MBB.end();
121 while (MII != E) {
122 auto *FirstMI = &*MII;
123 MII = next_nodbg(MII, MBB.end());
124 if (MII == MBB.end())
125 break;
126 if (FirstMI->isDebugInstr())
127 continue;
128 auto *SecondMI = &*MII;
129 unsigned Opc = FirstMI->getOpcode();
130 unsigned Opc2 = SecondMI->getOpcode();
131 llvm::AMDGPU::CanBeVOPD FirstCanBeVOPD = AMDGPU::getCanBeVOPD(Opc);
132 llvm::AMDGPU::CanBeVOPD SecondCanBeVOPD = AMDGPU::getCanBeVOPD(Opc2);
133 std::pair<MachineInstr *, MachineInstr *> Pair;
134
135 if (FirstCanBeVOPD.X && SecondCanBeVOPD.Y)
136 Pair = {FirstMI, SecondMI};
137 else if (FirstCanBeVOPD.Y && SecondCanBeVOPD.X)
138 Pair = {SecondMI, FirstMI};
139 else
140 continue;
141 // checkVOPDRegConstraints cares about program order, but doReplace
142 // cares about X-Y order in the constituted VOPD
143 if (llvm::checkVOPDRegConstraints(*SII, *FirstMI, *SecondMI)) {
144 ReplaceCandidates.push_back(Pair);
145 ++MII;
146 }
147 }
148 }
149 for (auto &Pair : ReplaceCandidates) {
150 Changed |= doReplace(SII, Pair);
151 }
152
153 return Changed;
154 }
155};
156
157} // namespace
158
159char GCNCreateVOPD::ID = 0;
160
161char &llvm::GCNCreateVOPDID = GCNCreateVOPD::ID;
162
163INITIALIZE_PASS(GCNCreateVOPD, DEBUG_TYPE, "GCN Create VOPD Instructions",
164 false, false)
MachineBasicBlock & MBB
This file defines the StringMap class.
Provides AMDGPU specific target descriptions.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define LLVM_DEBUG(X)
Definition: Debug.h:101
#define DEBUG_TYPE
AMD GCN specific subclass of TargetSubtarget.
IRTranslator LLVM IR MI
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:38
Interface definition for SIInstrInfo.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Definition: Statistic.h:167
Represent the analysis usage information of a pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:265
bool skipFunction(const Function &F) const
Optional passes call this function to check whether the pass should be skipped.
Definition: Pass.cpp:174
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Function & getFunction()
Return the LLVM function that this machine code represents.
const MachineInstrBuilder & setMIFlags(unsigned Flags) const
Representation of each machine instruction.
Definition: MachineInstr.h:68
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
void push_back(const T &Elt)
Definition: SmallVector.h:416
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
int getVOPDFull(unsigned OpX, unsigned OpY)
CanBeVOPD getCanBeVOPD(unsigned Opc)
VOPD::InstInfo getVOPDInstInfo(const MCInstrDesc &OpX, const MCInstrDesc &OpY)
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It, then continue incrementing it while it points to a debug instruction.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
char & GCNCreateVOPDID
bool checkVOPDRegConstraints(const SIInstrInfo &TII, const MachineInstr &FirstMI, const MachineInstr &SecondMI)