16 #ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H 17 #define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H 42 TLI(ST->getTargetLowering()) {}
87 bool IsZeroCmp)
const;
102 unsigned Opcode,
Type *Ty,
128 bool UseMaskForCond =
false,
bool UseMaskForGaps =
false);
bool useColdCCForColdCall(Function &F)
This class represents lattice values for constants.
unsigned getCacheLineSize() const override
The main scalar evolution driver.
bool enableInterleavedAccessVectorization()
A cache of @llvm.assume calls within a function.
TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
Base class which can be used to help build a TTI implementation.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
bool isNumRegsMajorCostOfLSR()
int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp)
int getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
bool isLSRCostLess(TargetTransformInfo::LSRCost &C1, TargetTransformInfo::LSRCost &C2)
int getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind)
PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const
int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)
The core instruction combiner logic.
mir Rename Register Operands
unsigned getMaxInterleaveFactor(unsigned VF)
int getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo)
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Analysis containing CSE Info
int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, bool UseMaskForCond=false, bool UseMaskForGaps=false)
unsigned getRegisterBitWidth(bool Vector) const
LLVM Basic Block Representation.
int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
The instances of the Type class are immutable: once they are created, they are never changed.
Conditional or Unconditional Branch instruction.
Optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr)
unsigned getNumberOfRegisters(unsigned ClassID) const
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
unsigned getUserCost(const User *U, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind)
Attributes of a target dependent hardware loop.
Common code between 32-bit and 64-bit PowerPC targets.
This struct is a compact representation of a valid (non-zero power of two) alignment.
const char * getRegisterClassName(unsigned ClassID) const
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Provides information about what library functions are available for the current target.
int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
bool enableAggressiveInterleaving(bool LoopHasReductions)
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP)
Class for arbitrary precision integers.
int vectorCostAdjustment(int Cost, unsigned Opcode, Type *Ty1, Type *Ty2)
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
Represents a single loop in the control flow graph.
int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getPrefetchDistance() const override
static const Function * getParent(const Value *V)
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
Information about a load/store intrinsic defined by the target.
bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo)
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
unsigned getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
A wrapper class for inspecting calls to intrinsic functions.
This file describes how to lower LLVM code to machine code.