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1 //===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// PPC target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
19 #include "PPCTargetMachine.h"
24 namespace llvm {
26 class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
28  typedef TargetTransformInfo TTI;
29  friend BaseT;
31  const PPCSubtarget *ST;
32  const PPCTargetLowering *TLI;
34  const PPCSubtarget *getST() const { return ST; }
35  const PPCTargetLowering *getTLI() const { return TLI; }
36  bool mightUseCTR(BasicBlock *BB, TargetLibraryInfo *LibInfo,
39 public:
40  explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
41  : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
42  TLI(ST->getTargetLowering()) {}
45  IntrinsicInst &II) const;
47  /// \name Scalar TTI Implementations
48  /// @{
51  int getIntImmCost(const APInt &Imm, Type *Ty,
54  int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm,
56  Instruction *Inst = nullptr);
57  int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
63  TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
65  AssumptionCache &AC,
66  TargetLibraryInfo *LibInfo,
67  HardwareLoopInfo &HWLoopInfo);
68  bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
70  TargetLibraryInfo *LibInfo);
80  /// @}
82  /// \name Vector TTI Implementations
83  /// @{
85  bool enableAggressiveInterleaving(bool LoopHasReductions);
87  bool IsZeroCmp) const;
92  };
93  unsigned getNumberOfRegisters(unsigned ClassID) const;
94  unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const;
95  const char* getRegisterClassName(unsigned ClassID) const;
96  unsigned getRegisterBitWidth(bool Vector) const;
97  unsigned getCacheLineSize() const override;
98  unsigned getPrefetchDistance() const override;
99  unsigned getMaxInterleaveFactor(unsigned VF);
100  int vectorCostAdjustment(int Cost, unsigned Opcode, Type *Ty1, Type *Ty2);
102  unsigned Opcode, Type *Ty,
109  const Instruction *CxtI = nullptr);
110  int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp);
111  int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
113  const Instruction *I = nullptr);
114  int getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind);
115  int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
116  CmpInst::Predicate VecPred,
118  const Instruction *I = nullptr);
119  int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
120  int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment,
121  unsigned AddressSpace,
123  const Instruction *I = nullptr);
125  unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
126  Align Alignment, unsigned AddressSpace,
128  bool UseMaskForCond = false, bool UseMaskForGaps = false);
132  /// @}
133 };
135 } // end namespace llvm
137 #endif
Represents a hint about the context in which a cast is used.
bool useColdCCForColdCall(Function &F)
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned getCacheLineSize() const override
The main scalar evolution driver.
A cache of @llvm.assume calls within a function.
TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
Base class which can be used to help build a TTI implementation.
Definition: BasicTTIImpl.h:75
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:722
int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp)
int getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
bool isLSRCostLess(TargetTransformInfo::LSRCost &C1, TargetTransformInfo::LSRCost &C2)
int getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind)
PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
unsigned getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const
unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const
int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)
The core instruction combiner logic.
Definition: InstCombiner.h:45
mir Rename Register Operands
unsigned getMaxInterleaveFactor(unsigned VF)
int getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info)
Flags indicating the kind of support for population count.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo)
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition: Dominators.h:151
Analysis containing CSE Info
Definition: CSEInfo.cpp:25
The weighted sum of size and latency.
int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, bool UseMaskForCond=false, bool UseMaskForGaps=false)
unsigned getRegisterBitWidth(bool Vector) const
Returns options for expansion of memcmp. IsZeroCmp is.
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:46
Conditional or Unconditional Branch instruction.
Optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr)
unsigned getNumberOfRegisters(unsigned ClassID) const
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
unsigned getUserCost(const User *U, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind)
Attributes of a target dependent hardware loop.
Common code between 32-bit and 64-bit PowerPC targets.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
Additional properties of an operand's values.
const char * getRegisterClassName(unsigned ClassID) const
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Definition: Alignment.h:119
Provides information about what library functions are available for the current target.
Definition: NVPTXBaseInfo.h:21
uint32_t Index
int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
bool enableAggressiveInterleaving(bool LoopHasReductions)
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP)
Class for arbitrary precision integers.
Definition: APInt.h:70
int vectorCostAdjustment(int Cost, unsigned Opcode, Type *Ty1, Type *Ty2)
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:529
Parameters that control the generic loop unrolling transformation.
#define I(x, y, z)
Definition: MD5.cpp:59
int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getPrefetchDistance() const override
static const Function * getParent(const Value *V)
const DataLayout & getDataLayout() const
Additional information about an operand's possible values.
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
This pass exposes codegen information to IR-level passes.
The kind of cost model.
Information about a load/store intrinsic defined by the target.
bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo)
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
unsigned getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:44
This file describes how to lower LLVM code to machine code.
The various kinds of shuffle patterns for vector queries.