LLVM 23.0.0git
BasicTTIImpl.h
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1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file provides a helper that implements much of the TTI interface in
11/// terms of the target-independent code generator and TargetLowering
12/// interfaces.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17#define LLVM_CODEGEN_BASICTTIIMPL_H
18
19#include "llvm/ADT/APInt.h"
20#include "llvm/ADT/BitVector.h"
21#include "llvm/ADT/STLExtras.h"
35#include "llvm/IR/BasicBlock.h"
36#include "llvm/IR/Constant.h"
37#include "llvm/IR/Constants.h"
38#include "llvm/IR/DataLayout.h"
40#include "llvm/IR/InstrTypes.h"
41#include "llvm/IR/Instruction.h"
43#include "llvm/IR/Intrinsics.h"
44#include "llvm/IR/Operator.h"
45#include "llvm/IR/Type.h"
46#include "llvm/IR/Value.h"
55#include <algorithm>
56#include <cassert>
57#include <cstdint>
58#include <limits>
59#include <optional>
60#include <utility>
61
62namespace llvm {
63
64class Function;
65class GlobalValue;
66class LLVMContext;
67class ScalarEvolution;
68class SCEV;
69class TargetMachine;
70
72
73/// Base class which can be used to help build a TTI implementation.
74///
75/// This class provides as much implementation of the TTI interface as is
76/// possible using the target independent parts of the code generator.
77///
78/// In order to subclass it, your class must implement a getST() method to
79/// return the subtarget, and a getTLI() method to return the target lowering.
80/// We need these methods implemented in the derived class so that this class
81/// doesn't have to duplicate storage for them.
82template <typename T>
84private:
86 using TTI = TargetTransformInfo;
87
88 /// Helper function to access this as a T.
89 const T *thisT() const { return static_cast<const T *>(this); }
90
91 /// Estimate a cost of Broadcast as an extract and sequence of insert
92 /// operations.
94 getBroadcastShuffleOverhead(FixedVectorType *VTy,
97 // Broadcast cost is equal to the cost of extracting the zero'th element
98 // plus the cost of inserting it into every element of the result vector.
99 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
100 CostKind, 0, nullptr, nullptr);
101
102 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
103 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
104 CostKind, i, nullptr, nullptr);
105 }
106 return Cost;
107 }
108
109 /// Estimate a cost of shuffle as a sequence of extract and insert
110 /// operations.
112 getPermuteShuffleOverhead(FixedVectorType *VTy,
115 // Shuffle cost is equal to the cost of extracting element from its argument
116 // plus the cost of inserting them onto the result vector.
117
118 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
119 // index 0 of first vector, index 1 of second vector,index 2 of first
120 // vector and finally index 3 of second vector and insert them at index
121 // <0,1,2,3> of result vector.
122 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
123 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
124 CostKind, i, nullptr, nullptr);
125 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
126 CostKind, i, nullptr, nullptr);
127 }
128 return Cost;
129 }
130
131 /// Estimate a cost of subvector extraction as a sequence of extract and
132 /// insert operations.
133 InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
135 int Index,
136 FixedVectorType *SubVTy) const {
137 assert(VTy && SubVTy &&
138 "Can only extract subvectors from vectors");
139 int NumSubElts = SubVTy->getNumElements();
141 (Index + NumSubElts) <=
143 "SK_ExtractSubvector index out of range");
144
146 // Subvector extraction cost is equal to the cost of extracting element from
147 // the source type plus the cost of inserting them into the result vector
148 // type.
149 for (int i = 0; i != NumSubElts; ++i) {
150 Cost +=
151 thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
152 CostKind, i + Index, nullptr, nullptr);
153 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
154 CostKind, i, nullptr, nullptr);
155 }
156 return Cost;
157 }
158
159 /// Estimate a cost of subvector insertion as a sequence of extract and
160 /// insert operations.
161 InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
163 int Index,
164 FixedVectorType *SubVTy) const {
165 assert(VTy && SubVTy &&
166 "Can only insert subvectors into vectors");
167 int NumSubElts = SubVTy->getNumElements();
169 (Index + NumSubElts) <=
171 "SK_InsertSubvector index out of range");
172
174 // Subvector insertion cost is equal to the cost of extracting element from
175 // the source type plus the cost of inserting them into the result vector
176 // type.
177 for (int i = 0; i != NumSubElts; ++i) {
178 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
179 CostKind, i, nullptr, nullptr);
180 Cost +=
181 thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
182 i + Index, nullptr, nullptr);
183 }
184 return Cost;
185 }
186
187 /// Local query method delegates up to T which *must* implement this!
188 const TargetSubtargetInfo *getST() const {
189 return static_cast<const T *>(this)->getST();
190 }
191
192 /// Local query method delegates up to T which *must* implement this!
193 const TargetLoweringBase *getTLI() const {
194 return static_cast<const T *>(this)->getTLI();
195 }
196
197 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
198 switch (M) {
200 return ISD::UNINDEXED;
201 case TTI::MIM_PreInc:
202 return ISD::PRE_INC;
203 case TTI::MIM_PreDec:
204 return ISD::PRE_DEC;
205 case TTI::MIM_PostInc:
206 return ISD::POST_INC;
207 case TTI::MIM_PostDec:
208 return ISD::POST_DEC;
209 }
210 llvm_unreachable("Unexpected MemIndexedMode");
211 }
212
213 InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
214 Align Alignment,
215 bool VariableMask,
216 bool IsGatherScatter,
218 unsigned AddressSpace = 0) const {
219 // We cannot scalarize scalable vectors, so return Invalid.
220 if (isa<ScalableVectorType>(DataTy))
222
223 auto *VT = cast<FixedVectorType>(DataTy);
224 unsigned VF = VT->getNumElements();
225
226 // Assume the target does not have support for gather/scatter operations
227 // and provide a rough estimate.
228 //
229 // First, compute the cost of the individual memory operations.
230 InstructionCost AddrExtractCost =
231 IsGatherScatter ? getScalarizationOverhead(
233 PointerType::get(VT->getContext(), 0), VF),
234 /*Insert=*/false, /*Extract=*/true, CostKind)
235 : 0;
236
237 // The cost of the scalar loads/stores.
238 InstructionCost MemoryOpCost =
239 VF * thisT()->getMemoryOpCost(Opcode, VT->getElementType(), Alignment,
241
242 // Next, compute the cost of packing the result in a vector.
243 InstructionCost PackingCost =
244 getScalarizationOverhead(VT, Opcode != Instruction::Store,
245 Opcode == Instruction::Store, CostKind);
246
247 InstructionCost ConditionalCost = 0;
248 if (VariableMask) {
249 // Compute the cost of conditionally executing the memory operations with
250 // variable masks. This includes extracting the individual conditions, a
251 // branches and PHIs to combine the results.
252 // NOTE: Estimating the cost of conditionally executing the memory
253 // operations accurately is quite difficult and the current solution
254 // provides a very rough estimate only.
255 ConditionalCost =
258 /*Insert=*/false, /*Extract=*/true, CostKind) +
259 VF * (thisT()->getCFInstrCost(Instruction::CondBr, CostKind) +
260 thisT()->getCFInstrCost(Instruction::PHI, CostKind));
261 }
262
263 return AddrExtractCost + MemoryOpCost + PackingCost + ConditionalCost;
264 }
265
266 /// Checks if the provided mask \p is a splat mask, i.e. it contains only -1
267 /// or same non -1 index value and this index value contained at least twice.
268 /// So, mask <0, -1,-1, -1> is not considered splat (it is just identity),
269 /// same for <-1, 0, -1, -1> (just a slide), while <2, -1, 2, -1> is a splat
270 /// with \p Index=2.
271 static bool isSplatMask(ArrayRef<int> Mask, unsigned NumSrcElts, int &Index) {
272 // Check that the broadcast index meets at least twice.
273 bool IsCompared = false;
274 if (int SplatIdx = PoisonMaskElem;
275 all_of(enumerate(Mask), [&](const auto &P) {
276 if (P.value() == PoisonMaskElem)
277 return P.index() != Mask.size() - 1 || IsCompared;
278 if (static_cast<unsigned>(P.value()) >= NumSrcElts * 2)
279 return false;
280 if (SplatIdx == PoisonMaskElem) {
281 SplatIdx = P.value();
282 return P.index() != Mask.size() - 1;
283 }
284 IsCompared = true;
285 return SplatIdx == P.value();
286 })) {
287 Index = SplatIdx;
288 return true;
289 }
290 return false;
291 }
292
293 /// Several intrinsics that return structs (including llvm.sincos[pi] and
294 /// llvm.modf) can be lowered to a vector library call (for certain VFs). The
295 /// vector library functions correspond to the scalar calls (e.g. sincos or
296 /// modf), which unlike the intrinsic return values via output pointers. This
297 /// helper checks if a vector call exists for the given intrinsic, and returns
298 /// the cost, which includes the cost of the mask (if required), and the loads
299 /// for values returned via output pointers. \p LC is the scalar libcall and
300 /// \p CallRetElementIndex (optional) is the struct element which is mapped to
301 /// the call return value. If std::nullopt is returned, then no vector library
302 /// call is available, so the intrinsic should be assigned the default cost
303 /// (e.g. scalarization).
304 std::optional<InstructionCost> getMultipleResultIntrinsicVectorLibCallCost(
306 std::optional<unsigned> CallRetElementIndex = {}) const {
307 Type *RetTy = ICA.getReturnType();
308 // Vector variants of the intrinsic can be mapped to a vector library call.
309 if (!isa<StructType>(RetTy) ||
311 return std::nullopt;
312
313 Type *Ty = getContainedTypes(RetTy).front();
314 EVT VT = getTLI()->getValueType(DL, Ty);
315
316 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
317
318 switch (ICA.getID()) {
319 case Intrinsic::modf:
320 LC = RTLIB::getMODF(VT);
321 break;
322 case Intrinsic::sincospi:
323 LC = RTLIB::getSINCOSPI(VT);
324 break;
325 case Intrinsic::sincos:
326 LC = RTLIB::getSINCOS(VT);
327 break;
328 default:
329 return std::nullopt;
330 }
331
332 // Find associated libcall.
333 RTLIB::LibcallImpl LibcallImpl = getTLI()->getLibcallImpl(LC);
334 if (LibcallImpl == RTLIB::Unsupported)
335 return std::nullopt;
336
337 LLVMContext &Ctx = RetTy->getContext();
338
339 // Cost the call + mask.
340 auto Cost =
341 thisT()->getCallInstrCost(nullptr, RetTy, ICA.getArgTypes(), CostKind);
342
345 auto VecTy = VectorType::get(IntegerType::getInt1Ty(Ctx), VF);
346 Cost += thisT()->getShuffleCost(TargetTransformInfo::SK_Broadcast, VecTy,
347 VecTy, {}, CostKind, 0, nullptr, {});
348 }
349
350 // Lowering to a library call (with output pointers) may require us to emit
351 // reloads for the results.
352 for (auto [Idx, VectorTy] : enumerate(getContainedTypes(RetTy))) {
353 if (Idx == CallRetElementIndex)
354 continue;
355 Cost += thisT()->getMemoryOpCost(
356 Instruction::Load, VectorTy,
357 thisT()->getDataLayout().getABITypeAlign(VectorTy), 0, CostKind);
358 }
359 return Cost;
360 }
361
362 /// Filter out constant and duplicated entries in \p Ops and return a vector
363 /// containing the types from \p Tys corresponding to the remaining operands.
365 filterConstantAndDuplicatedOperands(ArrayRef<const Value *> Ops,
366 ArrayRef<Type *> Tys) {
367 SmallPtrSet<const Value *, 4> UniqueOperands;
368 SmallVector<Type *, 4> FilteredTys;
369 for (const auto &[Op, Ty] : zip_equal(Ops, Tys)) {
370 if (isa<Constant>(Op) || !UniqueOperands.insert(Op).second)
371 continue;
372 FilteredTys.push_back(Ty);
373 }
374 return FilteredTys;
375 }
376
377protected:
378 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
379 : BaseT(DL) {}
380 ~BasicTTIImplBase() override = default;
381
384
385public:
386 /// \name Scalar TTI Implementations
387 /// @{
389 unsigned AddressSpace, Align Alignment,
390 unsigned *Fast) const override {
391 EVT E = EVT::getIntegerVT(Context, BitWidth);
392 return getTLI()->allowsMisalignedMemoryAccesses(
394 }
395
396 bool areInlineCompatible(const Function *Caller,
397 const Function *Callee) const override {
398 const TargetMachine &TM = getTLI()->getTargetMachine();
399
400 const FeatureBitset &CallerBits =
401 TM.getSubtargetImpl(*Caller)->getFeatureBits();
402 const FeatureBitset &CalleeBits =
403 TM.getSubtargetImpl(*Callee)->getFeatureBits();
404
405 // Inline a callee if its target-features are a subset of the callers
406 // target-features.
407 return (CallerBits & CalleeBits) == CalleeBits;
408 }
409
410 bool hasBranchDivergence(const Function *F = nullptr) const override {
411 return false;
412 }
413
414 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
415 return false;
416 }
417
418 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
419 return true;
420 }
421
422 unsigned getFlatAddressSpace() const override {
423 // Return an invalid address space.
424 return -1;
425 }
426
428 Intrinsic::ID IID) const override {
429 return false;
430 }
431
432 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
433 return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
434 }
435
436 unsigned getAssumedAddrSpace(const Value *V) const override {
437 return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
438 }
439
440 bool isSingleThreaded() const override {
441 return getTLI()->getTargetMachine().Options.ThreadModel ==
443 }
444
445 std::pair<const Value *, unsigned>
446 getPredicatedAddrSpace(const Value *V) const override {
447 return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
448 }
449
451 Value *NewV) const override {
452 return nullptr;
453 }
454
455 bool isLegalAddImmediate(int64_t imm) const override {
456 return getTLI()->isLegalAddImmediate(imm);
457 }
458
459 bool isLegalAddScalableImmediate(int64_t Imm) const override {
460 return getTLI()->isLegalAddScalableImmediate(Imm);
461 }
462
463 bool isLegalICmpImmediate(int64_t imm) const override {
464 return getTLI()->isLegalICmpImmediate(imm);
465 }
466
467 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
468 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
469 Instruction *I = nullptr,
470 int64_t ScalableOffset = 0) const override {
472 AM.BaseGV = BaseGV;
473 AM.BaseOffs = BaseOffset;
474 AM.HasBaseReg = HasBaseReg;
475 AM.Scale = Scale;
476 AM.ScalableOffset = ScalableOffset;
477 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
478 }
479
480 int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) {
481 return getTLI()->getPreferredLargeGEPBaseOffset(MinOffset, MaxOffset);
482 }
483
484 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy,
485 Align Alignment,
486 unsigned AddrSpace) const override {
487 auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy, Alignment,
488 AddrSpace](unsigned VF) {
489 auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
490 EVT VT = getTLI()->getValueType(DL, SrcTy);
491 if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
492 getTLI()->isOperationCustom(ISD::STORE, VT))
493 return true;
494
495 EVT ValVT =
496 getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
497 EVT LegalizedVT =
498 getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
499 return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT, Alignment,
500 AddrSpace);
501 };
502 while (VF > 2 && IsSupportedByTarget(VF))
503 VF /= 2;
504 return VF;
505 }
506
507 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override {
508 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
509 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
510 }
511
512 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override {
513 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
514 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
515 }
516
518 const TTI::LSRCost &C2) const override {
520 }
521
525
529
533
535 StackOffset BaseOffset, bool HasBaseReg,
536 int64_t Scale,
537 unsigned AddrSpace) const override {
539 AM.BaseGV = BaseGV;
540 AM.BaseOffs = BaseOffset.getFixed();
541 AM.HasBaseReg = HasBaseReg;
542 AM.Scale = Scale;
543 AM.ScalableOffset = BaseOffset.getScalable();
544 if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
545 return 0;
547 }
548
549 bool isTruncateFree(Type *Ty1, Type *Ty2) const override {
550 return getTLI()->isTruncateFree(Ty1, Ty2);
551 }
552
553 bool isProfitableToHoist(Instruction *I) const override {
554 return getTLI()->isProfitableToHoist(I);
555 }
556
557 bool useAA() const override { return getST()->useAA(); }
558
559 bool isTypeLegal(Type *Ty) const override {
560 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
561 return getTLI()->isTypeLegal(VT);
562 }
563
564 unsigned getRegUsageForType(Type *Ty) const override {
565 EVT ETy = getTLI()->getValueType(DL, Ty);
566 return getTLI()->getNumRegisters(Ty->getContext(), ETy);
567 }
568
569 InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
570 ArrayRef<const Value *> Operands, Type *AccessType,
571 TTI::TargetCostKind CostKind) const override {
572 return BaseT::getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
573 }
574
576 const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI,
577 BlockFrequencyInfo *BFI) const override {
578 /// Try to find the estimated number of clusters. Note that the number of
579 /// clusters identified in this function could be different from the actual
580 /// numbers found in lowering. This function ignore switches that are
581 /// lowered with a mix of jump table / bit test / BTree. This function was
582 /// initially intended to be used when estimating the cost of switch in
583 /// inline cost heuristic, but it's a generic cost model to be used in other
584 /// places (e.g., in loop unrolling).
585 unsigned N = SI.getNumCases();
586 const TargetLoweringBase *TLI = getTLI();
587 const DataLayout &DL = this->getDataLayout();
588
589 JumpTableSize = 0;
590 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
591
592 // Early exit if both a jump table and bit test are not allowed.
593 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
594 return N;
595
596 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
597 APInt MinCaseVal = MaxCaseVal;
598 for (auto CI : SI.cases()) {
599 const APInt &CaseVal = CI.getCaseValue()->getValue();
600 if (CaseVal.sgt(MaxCaseVal))
601 MaxCaseVal = CaseVal;
602 if (CaseVal.slt(MinCaseVal))
603 MinCaseVal = CaseVal;
604 }
605
606 // Check if suitable for a bit test
607 if (N <= DL.getIndexSizeInBits(0u)) {
609 for (auto I : SI.cases()) {
610 const BasicBlock *BB = I.getCaseSuccessor();
611 ++DestMap[BB];
612 }
613
614 if (TLI->isSuitableForBitTests(DestMap, MinCaseVal, MaxCaseVal, DL))
615 return 1;
616 }
617
618 // Check if suitable for a jump table.
619 if (IsJTAllowed) {
620 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
621 return N;
623 (MaxCaseVal - MinCaseVal)
624 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
625 // Check whether a range of clusters is dense enough for a jump table
626 if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
627 JumpTableSize = Range;
628 return 1;
629 }
630 }
631 return N;
632 }
633
634 bool shouldBuildLookupTables() const override {
635 const TargetLoweringBase *TLI = getTLI();
636 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
637 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
638 }
639
640 bool shouldBuildRelLookupTables() const override {
641 const TargetMachine &TM = getTLI()->getTargetMachine();
642 // If non-PIC mode, do not generate a relative lookup table.
643 if (!TM.isPositionIndependent())
644 return false;
645
646 /// Relative lookup table entries consist of 32-bit offsets.
647 /// Do not generate relative lookup tables for large code models
648 /// in 64-bit achitectures where 32-bit offsets might not be enough.
649 if (TM.getCodeModel() == CodeModel::Medium ||
651 return false;
652
653 const Triple &TargetTriple = TM.getTargetTriple();
654 if (!TargetTriple.isArch64Bit())
655 return false;
656
657 // TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
658 // there.
659 if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
660 return false;
661
662 return true;
663 }
664
665 bool haveFastSqrt(Type *Ty) const override {
666 const TargetLoweringBase *TLI = getTLI();
667 EVT VT = TLI->getValueType(DL, Ty);
668 return TLI->isTypeLegal(VT) &&
670 }
671
672 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override { return true; }
673
674 InstructionCost getFPOpCost(Type *Ty) const override {
675 // Check whether FADD is available, as a proxy for floating-point in
676 // general.
677 const TargetLoweringBase *TLI = getTLI();
678 EVT VT = TLI->getValueType(DL, Ty);
682 }
683
685 const Function &Fn) const override {
686 switch (Inst.getOpcode()) {
687 default:
688 break;
689 case Instruction::SDiv:
690 case Instruction::SRem:
691 case Instruction::UDiv:
692 case Instruction::URem: {
693 if (!isa<ConstantInt>(Inst.getOperand(1)))
694 return false;
695 EVT VT = getTLI()->getValueType(DL, Inst.getType());
696 return !getTLI()->isIntDivCheap(VT, Fn.getAttributes());
697 }
698 };
699
700 return false;
701 }
702
703 unsigned getInliningThresholdMultiplier() const override { return 1; }
704 unsigned adjustInliningThreshold(const CallBase *CB) const override {
705 return 0;
706 }
707 unsigned getCallerAllocaCost(const CallBase *CB,
708 const AllocaInst *AI) const override {
709 return 0;
710 }
711
712 int getInlinerVectorBonusPercent() const override { return 150; }
713
716 OptimizationRemarkEmitter *ORE) const override {
717 // This unrolling functionality is target independent, but to provide some
718 // motivation for its intended use, for x86:
719
720 // According to the Intel 64 and IA-32 Architectures Optimization Reference
721 // Manual, Intel Core models and later have a loop stream detector (and
722 // associated uop queue) that can benefit from partial unrolling.
723 // The relevant requirements are:
724 // - The loop must have no more than 4 (8 for Nehalem and later) branches
725 // taken, and none of them may be calls.
726 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
727
728 // According to the Software Optimization Guide for AMD Family 15h
729 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
730 // and loop buffer which can benefit from partial unrolling.
731 // The relevant requirements are:
732 // - The loop must have fewer than 16 branches
733 // - The loop must have less than 40 uops in all executed loop branches
734
735 // The number of taken branches in a loop is hard to estimate here, and
736 // benchmarking has revealed that it is better not to be conservative when
737 // estimating the branch count. As a result, we'll ignore the branch limits
738 // until someone finds a case where it matters in practice.
739
740 unsigned MaxOps;
741 const TargetSubtargetInfo *ST = getST();
742 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
744 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
745 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
746 else
747 return;
748
749 // Scan the loop: don't unroll loops with calls.
750 for (BasicBlock *BB : L->blocks()) {
751 for (Instruction &I : *BB) {
752 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
753 if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
754 if (!thisT()->isLoweredToCall(F))
755 continue;
756 }
757
758 if (ORE) {
759 ORE->emit([&]() {
760 return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
761 L->getHeader())
762 << "advising against unrolling the loop because it "
763 "contains a "
764 << ore::NV("Call", &I);
765 });
766 }
767 return;
768 }
769 }
770 }
771
772 // Enable runtime and partial unrolling up to the specified size.
773 // Enable using trip count upper bound to unroll loops.
774 UP.Partial = UP.Runtime = UP.UpperBound = true;
775 UP.PartialThreshold = MaxOps;
776
777 // Avoid unrolling when optimizing for size.
778 UP.OptSizeThreshold = 0;
780
781 // Set number of instructions optimized when "back edge"
782 // becomes "fall through" to default value of 2.
783 UP.BEInsns = 2;
784 }
785
787 TTI::PeelingPreferences &PP) const override {
788 PP.PeelCount = 0;
789 PP.AllowPeeling = true;
790 PP.AllowLoopNestsPeeling = false;
791 PP.PeelProfiledIterations = true;
792 }
793
796 HardwareLoopInfo &HWLoopInfo) const override {
797 return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
798 }
799
800 unsigned getEpilogueVectorizationMinVF() const override {
802 }
803
807
811
812 std::optional<Instruction *>
815 }
816
817 std::optional<Value *>
819 APInt DemandedMask, KnownBits &Known,
820 bool &KnownBitsComputed) const override {
821 return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
822 KnownBitsComputed);
823 }
824
826 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
827 APInt &UndefElts2, APInt &UndefElts3,
828 std::function<void(Instruction *, unsigned, APInt, APInt &)>
829 SimplifyAndSetOp) const override {
831 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
832 SimplifyAndSetOp);
833 }
834
835 std::optional<unsigned>
837 return std::optional<unsigned>(
838 getST()->getCacheSize(static_cast<unsigned>(Level)));
839 }
840
841 std::optional<unsigned>
843 std::optional<unsigned> TargetResult =
844 getST()->getCacheAssociativity(static_cast<unsigned>(Level));
845
846 if (TargetResult)
847 return TargetResult;
848
849 return BaseT::getCacheAssociativity(Level);
850 }
851
852 unsigned getCacheLineSize() const override {
853 return getST()->getCacheLineSize();
854 }
855
856 unsigned getPrefetchDistance() const override {
857 return getST()->getPrefetchDistance();
858 }
859
860 unsigned getMinPrefetchStride(unsigned NumMemAccesses,
861 unsigned NumStridedMemAccesses,
862 unsigned NumPrefetches,
863 bool HasCall) const override {
864 return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
865 NumPrefetches, HasCall);
866 }
867
868 unsigned getMaxPrefetchIterationsAhead() const override {
869 return getST()->getMaxPrefetchIterationsAhead();
870 }
871
872 bool enableWritePrefetching() const override {
873 return getST()->enableWritePrefetching();
874 }
875
876 bool shouldPrefetchAddressSpace(unsigned AS) const override {
877 return getST()->shouldPrefetchAddressSpace(AS);
878 }
879
880 /// @}
881
882 /// \name Vector TTI Implementations
883 /// @{
884
889
890 std::optional<unsigned> getMaxVScale() const override { return std::nullopt; }
891 std::optional<unsigned> getVScaleForTuning() const override {
892 return std::nullopt;
893 }
894
895 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
896 /// are set if the demanded result elements need to be inserted and/or
897 /// extracted from vectors.
899 getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts,
900 bool Insert, bool Extract,
902 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
904 TTI::VectorInstrContext::None) const override {
905 /// FIXME: a bitfield is not a reasonable abstraction for talking about
906 /// which elements are needed from a scalable vector
907 if (isa<ScalableVectorType>(InTy))
909 auto *Ty = cast<FixedVectorType>(InTy);
910
911 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
912 (VL.empty() || VL.size() == Ty->getNumElements()) &&
913 "Vector size mismatch");
914
916
917 for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
918 if (!DemandedElts[i])
919 continue;
920 if (Insert) {
921 Value *InsertedVal = VL.empty() ? nullptr : VL[i];
922 Cost +=
923 thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
924 CostKind, i, nullptr, InsertedVal, VIC);
925 }
926 if (Extract)
927 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
928 CostKind, i, nullptr, nullptr, VIC);
929 }
930
931 return Cost;
932 }
933
934 bool
936 unsigned ScalarOpdIdx) const override {
937 return false;
938 }
939
941 int OpdIdx) const override {
942 return OpdIdx == -1;
943 }
944
945 bool
947 int RetIdx) const override {
948 return RetIdx == 0;
949 }
950
951 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
953 VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind,
954 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
956 if (isa<ScalableVectorType>(InTy))
958 auto *Ty = cast<FixedVectorType>(InTy);
959
960 APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
961 // Use CRTP to allow target overrides
962 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
963 CostKind, ForPoisonSrc, VL, VIC);
964 }
965
966 /// Estimate the overhead of scalarizing an instruction's
967 /// operands. The (potentially vector) types to use for each of
968 /// argument are passes via Tys.
972 TTI::VectorInstrContext::None) const override {
974 for (Type *Ty : Tys) {
975 // Disregard things like metadata arguments.
976 if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
977 !Ty->isPtrOrPtrVectorTy())
978 continue;
979
980 if (auto *VecTy = dyn_cast<VectorType>(Ty))
981 Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
982 /*Extract*/ true, CostKind,
983 /*ForPoisonSrc=*/true, {}, VIC);
984 }
985
986 return Cost;
987 }
988
989 /// Estimate the overhead of scalarizing the inputs and outputs of an
990 /// instruction, with return type RetTy and arguments Args of type Tys. If
991 /// Args are unknown (empty), then the cost associated with one argument is
992 /// added as a heuristic.
998 RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
999 if (!Args.empty())
1001 filterConstantAndDuplicatedOperands(Args, Tys), CostKind);
1002 else
1003 // When no information on arguments is provided, we add the cost
1004 // associated with one argument as a heuristic.
1005 Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
1006 /*Extract*/ true, CostKind);
1007
1008 return Cost;
1009 }
1010
1011 /// Estimate the cost of type-legalization and the legalized type.
1012 std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
1013 LLVMContext &C = Ty->getContext();
1014 EVT MTy = getTLI()->getValueType(DL, Ty);
1015
1017 // We keep legalizing the type until we find a legal kind. We assume that
1018 // the only operation that costs anything is the split. After splitting
1019 // we need to handle two types.
1020 while (true) {
1021 TargetLoweringBase::LegalizeKind LK = getTLI()->getTypeConversion(C, MTy);
1022
1024 // Ensure we return a sensible simple VT here, since many callers of
1025 // this function require it.
1026 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
1027 return std::make_pair(InstructionCost::getInvalid(), VT);
1028 }
1029
1030 if (LK.first == TargetLoweringBase::TypeLegal)
1031 return std::make_pair(Cost, MTy.getSimpleVT());
1032
1033 if (LK.first == TargetLoweringBase::TypeSplitVector ||
1035 Cost *= 2;
1036
1037 // Do not loop with f128 type.
1038 if (MTy == LK.second)
1039 return std::make_pair(Cost, MTy.getSimpleVT());
1040
1041 // Keep legalizing the type.
1042 MTy = LK.second;
1043 }
1044 }
1045
1046 unsigned getMaxInterleaveFactor(ElementCount VF) const override { return 1; }
1047
1049 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1052 ArrayRef<const Value *> Args = {},
1053 const Instruction *CxtI = nullptr) const override {
1054 // Check if any of the operands are vector operands.
1055 const TargetLoweringBase *TLI = getTLI();
1056 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1057 assert(ISD && "Invalid opcode");
1058
1059 // TODO: Handle more cost kinds.
1061 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
1062 Opd1Info, Opd2Info,
1063 Args, CxtI);
1064
1065 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
1066
1067 bool IsFloat = Ty->isFPOrFPVectorTy();
1068 // Assume that floating point arithmetic operations cost twice as much as
1069 // integer operations.
1070 InstructionCost OpCost = (IsFloat ? 2 : 1);
1071
1072 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
1073 // The operation is legal. Assume it costs 1.
1074 // TODO: Once we have extract/insert subvector cost we need to use them.
1075 return LT.first * OpCost;
1076 }
1077
1078 if (!TLI->isOperationExpand(ISD, LT.second)) {
1079 // If the operation is custom lowered, then assume that the code is twice
1080 // as expensive.
1081 return LT.first * 2 * OpCost;
1082 }
1083
1084 // An 'Expand' of URem and SRem is special because it may default
1085 // to expanding the operation into a sequence of sub-operations
1086 // i.e. X % Y -> X-(X/Y)*Y.
1087 if (ISD == ISD::UREM || ISD == ISD::SREM) {
1088 bool IsSigned = ISD == ISD::SREM;
1089 if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
1090 LT.second) ||
1091 TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
1092 LT.second)) {
1093 unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
1094 InstructionCost DivCost = thisT()->getArithmeticInstrCost(
1095 DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
1096 InstructionCost MulCost =
1097 thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
1098 InstructionCost SubCost =
1099 thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
1100 return DivCost + MulCost + SubCost;
1101 }
1102 }
1103
1104 // We cannot scalarize scalable vectors, so return Invalid.
1107
1108 // Else, assume that we need to scalarize this op.
1109 // TODO: If one of the types get legalized by splitting, handle this
1110 // similarly to what getCastInstrCost() does.
1111 if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
1112 InstructionCost Cost = thisT()->getArithmeticInstrCost(
1113 Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
1114 Args, CxtI);
1115 // Return the cost of multiple scalar invocation plus the cost of
1116 // inserting and extracting the values.
1117 SmallVector<Type *> Tys(Args.size(), Ty);
1118 return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
1119 VTy->getNumElements() * Cost;
1120 }
1121
1122 // We don't know anything about this scalar instruction.
1123 return OpCost;
1124 }
1125
1127 ArrayRef<int> Mask,
1128 VectorType *SrcTy, int &Index,
1129 VectorType *&SubTy) const {
1130 if (Mask.empty())
1131 return Kind;
1132 int NumDstElts = Mask.size();
1133 int NumSrcElts = SrcTy->getElementCount().getKnownMinValue();
1134 switch (Kind) {
1136 if (ShuffleVectorInst::isReverseMask(Mask, NumSrcElts))
1137 return TTI::SK_Reverse;
1138 if (ShuffleVectorInst::isZeroEltSplatMask(Mask, NumSrcElts))
1139 return TTI::SK_Broadcast;
1140 if (isSplatMask(Mask, NumSrcElts, Index))
1141 return TTI::SK_Broadcast;
1142 if (ShuffleVectorInst::isExtractSubvectorMask(Mask, NumSrcElts, Index) &&
1143 (Index + NumDstElts) <= NumSrcElts) {
1144 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumDstElts);
1146 }
1147 break;
1148 }
1149 case TTI::SK_PermuteTwoSrc: {
1150 if (all_of(Mask, [NumSrcElts](int M) { return M < NumSrcElts; }))
1152 Index, SubTy);
1153 int NumSubElts;
1154 if (NumDstElts > 2 && ShuffleVectorInst::isInsertSubvectorMask(
1155 Mask, NumSrcElts, NumSubElts, Index)) {
1156 if (Index + NumSubElts > NumSrcElts)
1157 return Kind;
1158 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumSubElts);
1160 }
1161 if (ShuffleVectorInst::isSelectMask(Mask, NumSrcElts))
1162 return TTI::SK_Select;
1163 if (ShuffleVectorInst::isTransposeMask(Mask, NumSrcElts))
1164 return TTI::SK_Transpose;
1165 if (ShuffleVectorInst::isSpliceMask(Mask, NumSrcElts, Index))
1166 return TTI::SK_Splice;
1167 break;
1168 }
1169 case TTI::SK_Select:
1170 case TTI::SK_Reverse:
1171 case TTI::SK_Broadcast:
1172 case TTI::SK_Transpose:
1175 case TTI::SK_Splice:
1176 break;
1177 }
1178 return Kind;
1179 }
1180
1184 VectorType *SubTp, ArrayRef<const Value *> Args = {},
1185 const Instruction *CxtI = nullptr) const override {
1186 switch (improveShuffleKindFromMask(Kind, Mask, SrcTy, Index, SubTp)) {
1187 case TTI::SK_Broadcast:
1188 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1189 return getBroadcastShuffleOverhead(FVT, CostKind);
1191 case TTI::SK_Select:
1192 case TTI::SK_Splice:
1193 case TTI::SK_Reverse:
1194 case TTI::SK_Transpose:
1197 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1198 return getPermuteShuffleOverhead(FVT, CostKind);
1201 return getExtractSubvectorOverhead(SrcTy, CostKind, Index,
1202 cast<FixedVectorType>(SubTp));
1204 return getInsertSubvectorOverhead(DstTy, CostKind, Index,
1205 cast<FixedVectorType>(SubTp));
1206 }
1207 llvm_unreachable("Unknown TTI::ShuffleKind");
1208 }
1209
1211 getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1213 const Instruction *I = nullptr) const override {
1214 if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
1215 return 0;
1216
1217 const TargetLoweringBase *TLI = getTLI();
1218 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1219 assert(ISD && "Invalid opcode");
1220 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
1221 std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
1222
1223 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1224 TypeSize DstSize = DstLT.second.getSizeInBits();
1225 bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
1226 bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
1227
1228 switch (Opcode) {
1229 default:
1230 break;
1231 case Instruction::Trunc:
1232 // Check for NOOP conversions.
1233 if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
1234 return 0;
1235 [[fallthrough]];
1236 case Instruction::BitCast:
1237 // Bitcast between types that are legalized to the same type are free and
1238 // assume int to/from ptr of the same size is also free.
1239 if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
1240 SrcSize == DstSize)
1241 return 0;
1242 break;
1243 case Instruction::FPExt:
1244 if (I && getTLI()->isExtFree(I))
1245 return 0;
1246 break;
1247 case Instruction::ZExt:
1248 if (TLI->isZExtFree(SrcLT.second, DstLT.second))
1249 return 0;
1250 [[fallthrough]];
1251 case Instruction::SExt:
1252 if (I && getTLI()->isExtFree(I))
1253 return 0;
1254
1255 // If this is a zext/sext of a load, return 0 if the corresponding
1256 // extending load exists on target and the result type is legal.
1257 if (CCH == TTI::CastContextHint::Normal) {
1258 EVT ExtVT = EVT::getEVT(Dst);
1259 EVT LoadVT = EVT::getEVT(Src);
1260 unsigned LType =
1261 Opcode == Instruction::ZExt ? ISD::ZEXTLOAD : ISD::SEXTLOAD;
1262 if (I) {
1263 if (auto *LI = dyn_cast<LoadInst>(I->getOperand(0))) {
1264 if (DstLT.first == SrcLT.first &&
1265 TLI->isLoadLegal(ExtVT, LoadVT, LI->getAlign(),
1266 LI->getPointerAddressSpace(), LType, false))
1267 return 0;
1268 } else if (auto *II = dyn_cast<IntrinsicInst>(I->getOperand(0))) {
1269 switch (II->getIntrinsicID()) {
1270 case Intrinsic::masked_load: {
1271 Type *PtrType = II->getArgOperand(0)->getType();
1272 assert(PtrType->isPointerTy());
1273
1274 if (DstLT.first == SrcLT.first &&
1275 TLI->isLoadLegal(
1276 ExtVT, LoadVT, II->getParamAlign(0).valueOrOne(),
1277 PtrType->getPointerAddressSpace(), LType, false))
1278 return 0;
1279
1280 break;
1281 }
1282 default:
1283 break;
1284 }
1285 }
1286 }
1287 }
1288 break;
1289 case Instruction::AddrSpaceCast:
1290 if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
1291 Dst->getPointerAddressSpace()))
1292 return 0;
1293 break;
1294 }
1295
1296 auto *SrcVTy = dyn_cast<VectorType>(Src);
1297 auto *DstVTy = dyn_cast<VectorType>(Dst);
1298
1299 // If the cast is marked as legal (or promote) then assume low cost.
1300 if (SrcLT.first == DstLT.first &&
1301 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
1302 return SrcLT.first;
1303
1304 // Handle scalar conversions.
1305 if (!SrcVTy && !DstVTy) {
1306 // Just check the op cost. If the operation is legal then assume it costs
1307 // 1.
1308 if (!TLI->isOperationExpand(ISD, DstLT.second))
1309 return 1;
1310
1311 // Assume that illegal scalar instruction are expensive.
1312 return 4;
1313 }
1314
1315 // Check vector-to-vector casts.
1316 if (DstVTy && SrcVTy) {
1317 // If the cast is between same-sized registers, then the check is simple.
1318 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
1319
1320 // Assume that Zext is done using AND.
1321 if (Opcode == Instruction::ZExt)
1322 return SrcLT.first;
1323
1324 // Assume that sext is done using SHL and SRA.
1325 if (Opcode == Instruction::SExt)
1326 return SrcLT.first * 2;
1327
1328 // Just check the op cost. If the operation is legal then assume it
1329 // costs
1330 // 1 and multiply by the type-legalization overhead.
1331 if (!TLI->isOperationExpand(ISD, DstLT.second))
1332 return SrcLT.first * 1;
1333 }
1334
1335 // If we are legalizing by splitting, query the concrete TTI for the cost
1336 // of casting the original vector twice. We also need to factor in the
1337 // cost of the split itself. Count that as 1, to be consistent with
1338 // getTypeLegalizationCost().
1339 bool SplitSrc =
1340 TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
1342 bool SplitDst =
1343 TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
1345 if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isKnownEven() &&
1346 DstVTy->getElementCount().isKnownEven()) {
1347 Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
1348 Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
1349 const T *TTI = thisT();
1350 // If both types need to be split then the split is free.
1351 InstructionCost SplitCost =
1352 (!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
1353 return SplitCost +
1354 (2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
1355 CostKind, I));
1356 }
1357
1358 // Scalarization cost is Invalid, can't assume any num elements.
1359 if (isa<ScalableVectorType>(DstVTy))
1361
1362 // In other cases where the source or destination are illegal, assume
1363 // the operation will get scalarized.
1364 unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
1365 InstructionCost Cost = thisT()->getCastInstrCost(
1366 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
1367
1368 // Return the cost of multiple scalar invocation plus the cost of
1369 // inserting and extracting the values.
1370 return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
1371 CostKind) +
1372 Num * Cost;
1373 }
1374
1375 // We already handled vector-to-vector and scalar-to-scalar conversions.
1376 // This
1377 // is where we handle bitcast between vectors and scalars. We need to assume
1378 // that the conversion is scalarized in one way or another.
1379 if (Opcode == Instruction::BitCast) {
1380 // Illegal bitcasts are done by storing and loading from a stack slot.
1381 return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
1382 /*Extract*/ true, CostKind)
1383 : 0) +
1384 (DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
1385 /*Extract*/ false, CostKind)
1386 : 0);
1387 }
1388
1389 llvm_unreachable("Unhandled cast");
1390 }
1391
1393 getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
1394 unsigned Index,
1395 TTI::TargetCostKind CostKind) const override {
1396 return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
1397 CostKind, Index, nullptr, nullptr) +
1398 thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
1400 }
1401
1404 const Instruction *I = nullptr) const override {
1405 return BaseT::getCFInstrCost(Opcode, CostKind, I);
1406 }
1407
1409 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1413 const Instruction *I = nullptr) const override {
1414 const TargetLoweringBase *TLI = getTLI();
1415 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1416 assert(ISD && "Invalid opcode");
1417
1418 if (getTLI()->getValueType(DL, ValTy, true) == MVT::Other)
1419 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
1420 Op1Info, Op2Info, I);
1421
1422 // Selects on vectors are actually vector selects.
1423 if (ISD == ISD::SELECT) {
1424 assert(CondTy && "CondTy must exist");
1425 if (CondTy->isVectorTy())
1426 ISD = ISD::VSELECT;
1427 }
1428 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
1429
1430 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
1431 !TLI->isOperationExpand(ISD, LT.second)) {
1432 // The operation is legal. Assume it costs 1. Multiply
1433 // by the type-legalization overhead.
1434 return LT.first * 1;
1435 }
1436
1437 // Otherwise, assume that the cast is scalarized.
1438 // TODO: If one of the types get legalized by splitting, handle this
1439 // similarly to what getCastInstrCost() does.
1440 if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
1441 if (isa<ScalableVectorType>(ValTy))
1443
1444 unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
1445 InstructionCost Cost = thisT()->getCmpSelInstrCost(
1446 Opcode, ValVTy->getScalarType(), CondTy->getScalarType(), VecPred,
1447 CostKind, Op1Info, Op2Info, I);
1448
1449 // Return the cost of multiple scalar invocation plus the cost of
1450 // inserting and extracting the values.
1451 return getScalarizationOverhead(ValVTy, /*Insert*/ true,
1452 /*Extract*/ false, CostKind) +
1453 Num * Cost;
1454 }
1455
1456 // Unknown scalar opcode.
1457 return 1;
1458 }
1459
1462 unsigned Index, const Value *Op0, const Value *Op1,
1464 TTI::VectorInstrContext::None) const override {
1465 return getRegUsageForType(Val->getScalarType());
1466 }
1467
1468 /// \param ScalarUserAndIdx encodes the information about extracts from a
1469 /// vector with 'Scalar' being the value being extracted,'User' being the user
1470 /// of the extract(nullptr if user is not known before vectorization) and
1471 /// 'Idx' being the extract lane.
1473 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1474 Value *Scalar,
1475 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1477 TTI::VectorInstrContext::None) const override {
1478 return getVectorInstrCost(Opcode, Val, CostKind, Index, nullptr, nullptr,
1479 VIC);
1480 }
1481
1484 TTI::TargetCostKind CostKind, unsigned Index,
1486 TTI::VectorInstrContext::None) const override {
1487 Value *Op0 = nullptr;
1488 Value *Op1 = nullptr;
1489 if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
1490 Op0 = IE->getOperand(0);
1491 Op1 = IE->getOperand(1);
1492 }
1493 // If VIC is None, compute it from the instruction
1496 return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
1497 Op1, VIC);
1498 }
1499
1503 unsigned Index) const override {
1504 unsigned NewIndex = -1;
1505 if (auto *FVTy = dyn_cast<FixedVectorType>(Val)) {
1506 assert(Index < FVTy->getNumElements() &&
1507 "Unexpected index from end of vector");
1508 NewIndex = FVTy->getNumElements() - 1 - Index;
1509 }
1510 return thisT()->getVectorInstrCost(Opcode, Val, CostKind, NewIndex, nullptr,
1511 nullptr);
1512 }
1513
1515 getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
1516 const APInt &DemandedDstElts,
1517 TTI::TargetCostKind CostKind) const override {
1518 assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
1519 "Unexpected size of DemandedDstElts.");
1520
1522
1523 auto *SrcVT = FixedVectorType::get(EltTy, VF);
1524 auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
1525
1526 // The Mask shuffling cost is extract all the elements of the Mask
1527 // and insert each of them Factor times into the wide vector:
1528 //
1529 // E.g. an interleaved group with factor 3:
1530 // %mask = icmp ult <8 x i32> %vec1, %vec2
1531 // %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
1532 // <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
1533 // The cost is estimated as extract all mask elements from the <8xi1> mask
1534 // vector and insert them factor times into the <24xi1> shuffled mask
1535 // vector.
1536 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
1537 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
1538 /*Insert*/ false,
1539 /*Extract*/ true, CostKind);
1540 Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
1541 /*Insert*/ true,
1542 /*Extract*/ false, CostKind);
1543
1544 return Cost;
1545 }
1546
1548 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1551 const Instruction *I = nullptr) const override {
1552 assert(!Src->isVoidTy() && "Invalid type");
1553 // Assume types, such as structs, are expensive.
1554 if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
1555 return 4;
1556 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
1557
1558 // Assuming that all loads of legal types cost 1.
1559 InstructionCost Cost = LT.first;
1561 return Cost;
1562
1563 const DataLayout &DL = this->getDataLayout();
1564 if (Src->isVectorTy() &&
1565 // In practice it's not currently possible to have a change in lane
1566 // length for extending loads or truncating stores so both types should
1567 // have the same scalable property.
1568 TypeSize::isKnownLT(DL.getTypeStoreSizeInBits(Src),
1569 LT.second.getSizeInBits())) {
1570 // This is a vector load that legalizes to a larger type than the vector
1571 // itself. Unless the corresponding extending load or truncating store is
1572 // legal, then this will scalarize.
1574 EVT MemVT = getTLI()->getValueType(DL, Src);
1575 if (Opcode == Instruction::Store)
1576 LA = getTLI()->getTruncStoreAction(LT.second, MemVT, Alignment,
1577 AddressSpace);
1578 else
1579 LA = getTLI()->getLoadAction(LT.second, MemVT, Alignment, AddressSpace,
1580 ISD::EXTLOAD, false);
1581
1582 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
1583 // This is a vector load/store for some illegal type that is scalarized.
1584 // We must account for the cost of building or decomposing the vector.
1586 cast<VectorType>(Src), Opcode != Instruction::Store,
1587 Opcode == Instruction::Store, CostKind);
1588 }
1589 }
1590
1591 return Cost;
1592 }
1593
1595 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1596 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1597 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override {
1598
1599 // We cannot scalarize scalable vectors, so return Invalid.
1600 if (isa<ScalableVectorType>(VecTy))
1602
1603 auto *VT = cast<FixedVectorType>(VecTy);
1604
1605 unsigned NumElts = VT->getNumElements();
1606 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
1607
1608 unsigned NumSubElts = NumElts / Factor;
1609 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1610
1611 // Firstly, the cost of load/store operation.
1613 if (UseMaskForCond || UseMaskForGaps) {
1614 unsigned IID = Opcode == Instruction::Load ? Intrinsic::masked_load
1615 : Intrinsic::masked_store;
1616 Cost = thisT()->getMemIntrinsicInstrCost(
1617 MemIntrinsicCostAttributes(IID, VecTy, Alignment, AddressSpace),
1618 CostKind);
1619 } else
1620 Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
1621 CostKind);
1622
1623 // Legalize the vector type, and get the legalized and unlegalized type
1624 // sizes.
1625 MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
1626 unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
1627 unsigned VecTyLTSize = VecTyLT.getStoreSize();
1628
1629 // Scale the cost of the memory operation by the fraction of legalized
1630 // instructions that will actually be used. We shouldn't account for the
1631 // cost of dead instructions since they will be removed.
1632 //
1633 // E.g., An interleaved load of factor 8:
1634 // %vec = load <16 x i64>, <16 x i64>* %ptr
1635 // %v0 = shufflevector %vec, undef, <0, 8>
1636 //
1637 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
1638 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
1639 // type). The other loads are unused.
1640 //
1641 // TODO: Note that legalization can turn masked loads/stores into unmasked
1642 // (legalized) loads/stores. This can be reflected in the cost.
1643 if (Cost.isValid() && VecTySize > VecTyLTSize) {
1644 // The number of loads of a legal type it will take to represent a load
1645 // of the unlegalized vector type.
1646 unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
1647
1648 // The number of elements of the unlegalized type that correspond to a
1649 // single legal instruction.
1650 unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
1651
1652 // Determine which legal instructions will be used.
1653 BitVector UsedInsts(NumLegalInsts, false);
1654 for (unsigned Index : Indices)
1655 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1656 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
1657
1658 // Scale the cost of the load by the fraction of legal instructions that
1659 // will be used.
1660 Cost = divideCeil(UsedInsts.count() * Cost.getValue(), NumLegalInsts);
1661 }
1662
1663 // Then plus the cost of interleave operation.
1664 assert(Indices.size() <= Factor &&
1665 "Interleaved memory op has too many members");
1666
1667 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1668 const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
1669
1670 APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
1671 for (unsigned Index : Indices) {
1672 assert(Index < Factor && "Invalid index for interleaved memory op");
1673 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
1674 DemandedLoadStoreElts.setBit(Index + Elm * Factor);
1675 }
1676
1677 if (Opcode == Instruction::Load) {
1678 // The interleave cost is similar to extract sub vectors' elements
1679 // from the wide vector, and insert them into sub vectors.
1680 //
1681 // E.g. An interleaved load of factor 2 (with one member of index 0):
1682 // %vec = load <8 x i32>, <8 x i32>* %ptr
1683 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
1684 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
1685 // <8 x i32> vector and insert them into a <4 x i32> vector.
1686 InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
1687 SubVT, DemandedAllSubElts,
1688 /*Insert*/ true, /*Extract*/ false, CostKind);
1689 Cost += Indices.size() * InsSubCost;
1690 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1691 /*Insert*/ false,
1692 /*Extract*/ true, CostKind);
1693 } else {
1694 // The interleave cost is extract elements from sub vectors, and
1695 // insert them into the wide vector.
1696 //
1697 // E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
1698 // (using VF=4):
1699 // %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
1700 // %gaps.mask = <true, true, false, true, true, false,
1701 // true, true, false, true, true, false>
1702 // call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
1703 // i32 Align, <12 x i1> %gaps.mask
1704 // The cost is estimated as extract all elements (of actual members,
1705 // excluding gaps) from both <4 x i32> vectors and insert into the <12 x
1706 // i32> vector.
1707 InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
1708 SubVT, DemandedAllSubElts,
1709 /*Insert*/ false, /*Extract*/ true, CostKind);
1710 Cost += ExtSubCost * Indices.size();
1711 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1712 /*Insert*/ true,
1713 /*Extract*/ false, CostKind);
1714 }
1715
1716 if (!UseMaskForCond)
1717 return Cost;
1718
1719 Type *I8Type = Type::getInt8Ty(VT->getContext());
1720
1721 Cost += thisT()->getReplicationShuffleCost(
1722 I8Type, Factor, NumSubElts,
1723 UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
1724 CostKind);
1725
1726 // The Gaps mask is invariant and created outside the loop, therefore the
1727 // cost of creating it is not accounted for here. However if we have both
1728 // a MaskForGaps and some other mask that guards the execution of the
1729 // memory access, we need to account for the cost of And-ing the two masks
1730 // inside the loop.
1731 if (UseMaskForGaps) {
1732 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1733 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
1734 CostKind);
1735 }
1736
1737 return Cost;
1738 }
1739
1740 /// Get intrinsic cost based on arguments.
1743 TTI::TargetCostKind CostKind) const override {
1744 // Check for generically free intrinsics.
1746 return 0;
1747
1748 // Assume that target intrinsics are cheap.
1749 Intrinsic::ID IID = ICA.getID();
1752
1753 // VP Intrinsics should have the same cost as their non-vp counterpart.
1754 // TODO: Adjust the cost to make the vp intrinsic cheaper than its non-vp
1755 // counterpart when the vector length argument is smaller than the maximum
1756 // vector length.
1757 // TODO: Support other kinds of VPIntrinsics
1758 if (VPIntrinsic::isVPIntrinsic(ICA.getID())) {
1759 std::optional<unsigned> FOp =
1761 if (FOp) {
1762 if (ICA.getID() == Intrinsic::vp_load) {
1763 Align Alignment;
1764 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1765 Alignment = VPI->getPointerAlignment().valueOrOne();
1766 unsigned AS = 0;
1767 if (ICA.getArgTypes().size() > 1)
1768 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[0]))
1769 AS = PtrTy->getAddressSpace();
1770 return thisT()->getMemoryOpCost(*FOp, ICA.getReturnType(), Alignment,
1771 AS, CostKind);
1772 }
1773 if (ICA.getID() == Intrinsic::vp_store) {
1774 Align Alignment;
1775 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1776 Alignment = VPI->getPointerAlignment().valueOrOne();
1777 unsigned AS = 0;
1778 if (ICA.getArgTypes().size() >= 2)
1779 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[1]))
1780 AS = PtrTy->getAddressSpace();
1781 return thisT()->getMemoryOpCost(*FOp, ICA.getArgTypes()[0], Alignment,
1782 AS, CostKind);
1783 }
1785 ICA.getID() == Intrinsic::vp_fneg) {
1786 return thisT()->getArithmeticInstrCost(*FOp, ICA.getReturnType(),
1787 CostKind);
1788 }
1789 if (VPCastIntrinsic::isVPCast(ICA.getID())) {
1790 return thisT()->getCastInstrCost(
1791 *FOp, ICA.getReturnType(), ICA.getArgTypes()[0],
1793 }
1794 if (VPCmpIntrinsic::isVPCmp(ICA.getID())) {
1795 // We can only handle vp_cmp intrinsics with underlying instructions.
1796 if (ICA.getInst()) {
1797 assert(FOp);
1798 auto *UI = cast<VPCmpIntrinsic>(ICA.getInst());
1799 return thisT()->getCmpSelInstrCost(*FOp, ICA.getArgTypes()[0],
1800 ICA.getReturnType(),
1801 UI->getPredicate(), CostKind);
1802 }
1803 }
1804 }
1805 if (ICA.getID() == Intrinsic::vp_load_ff) {
1806 Type *RetTy = ICA.getReturnType();
1807 Type *DataTy = cast<StructType>(RetTy)->getElementType(0);
1808 Align Alignment;
1809 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1810 Alignment = VPI->getPointerAlignment().valueOrOne();
1811 return thisT()->getMemIntrinsicInstrCost(
1812 MemIntrinsicCostAttributes(ICA.getID(), DataTy, Alignment),
1813 CostKind);
1814 }
1815 if (ICA.getID() == Intrinsic::vp_scatter) {
1816 if (ICA.isTypeBasedOnly()) {
1817 IntrinsicCostAttributes MaskedScatter(
1820 ICA.getFlags());
1821 return getTypeBasedIntrinsicInstrCost(MaskedScatter, CostKind);
1822 }
1823 Align Alignment;
1824 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1825 Alignment = VPI->getPointerAlignment().valueOrOne();
1826 bool VarMask = isa<Constant>(ICA.getArgs()[2]);
1827 return thisT()->getMemIntrinsicInstrCost(
1828 MemIntrinsicCostAttributes(Intrinsic::vp_scatter,
1829 ICA.getArgTypes()[0], ICA.getArgs()[1],
1830 VarMask, Alignment, nullptr),
1831 CostKind);
1832 }
1833 if (ICA.getID() == Intrinsic::vp_gather) {
1834 if (ICA.isTypeBasedOnly()) {
1835 IntrinsicCostAttributes MaskedGather(
1838 ICA.getFlags());
1839 return getTypeBasedIntrinsicInstrCost(MaskedGather, CostKind);
1840 }
1841 Align Alignment;
1842 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1843 Alignment = VPI->getPointerAlignment().valueOrOne();
1844 bool VarMask = isa<Constant>(ICA.getArgs()[1]);
1845 return thisT()->getMemIntrinsicInstrCost(
1846 MemIntrinsicCostAttributes(Intrinsic::vp_gather,
1847 ICA.getReturnType(), ICA.getArgs()[0],
1848 VarMask, Alignment, nullptr),
1849 CostKind);
1850 }
1851
1852 if (ICA.getID() == Intrinsic::vp_select ||
1853 ICA.getID() == Intrinsic::vp_merge) {
1854 TTI::OperandValueInfo OpInfoX, OpInfoY;
1855 if (!ICA.isTypeBasedOnly()) {
1856 OpInfoX = TTI::getOperandInfo(ICA.getArgs()[0]);
1857 OpInfoY = TTI::getOperandInfo(ICA.getArgs()[1]);
1858 }
1859 return getCmpSelInstrCost(
1860 Instruction::Select, ICA.getReturnType(), ICA.getArgTypes()[0],
1861 CmpInst::BAD_ICMP_PREDICATE, CostKind, OpInfoX, OpInfoY);
1862 }
1863
1864 std::optional<Intrinsic::ID> FID =
1866
1867 // Not functionally equivalent but close enough for cost modelling.
1868 if (ICA.getID() == Intrinsic::experimental_vp_reverse)
1869 FID = Intrinsic::vector_reverse;
1870
1871 if (FID) {
1872 // Non-vp version will have same arg types except mask and vector
1873 // length.
1874 assert(ICA.getArgTypes().size() >= 2 &&
1875 "Expected VPIntrinsic to have Mask and Vector Length args and "
1876 "types");
1877
1878 ArrayRef<const Value *> NewArgs = ArrayRef(ICA.getArgs());
1879 if (!ICA.isTypeBasedOnly())
1880 NewArgs = NewArgs.drop_back(2);
1882
1883 // VPReduction intrinsics have a start value argument that their non-vp
1884 // counterparts do not have, except for the fadd and fmul non-vp
1885 // counterpart.
1887 *FID != Intrinsic::vector_reduce_fadd &&
1888 *FID != Intrinsic::vector_reduce_fmul) {
1889 if (!ICA.isTypeBasedOnly())
1890 NewArgs = NewArgs.drop_front();
1891 NewTys = NewTys.drop_front();
1892 }
1893
1894 IntrinsicCostAttributes NewICA(*FID, ICA.getReturnType(), NewArgs,
1895 NewTys, ICA.getFlags());
1896 return thisT()->getIntrinsicInstrCost(NewICA, CostKind);
1897 }
1898 }
1899
1900 if (ICA.isTypeBasedOnly())
1902
1903 Type *RetTy = ICA.getReturnType();
1904
1905 ElementCount RetVF = isVectorizedTy(RetTy) ? getVectorizedTypeVF(RetTy)
1907
1908 const IntrinsicInst *I = ICA.getInst();
1909 const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
1910 FastMathFlags FMF = ICA.getFlags();
1911 switch (IID) {
1912 default:
1913 break;
1914
1915 case Intrinsic::powi:
1916 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
1917 bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
1918 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
1919 ShouldOptForSize)) {
1920 // The cost is modeled on the expansion performed by ExpandPowI in
1921 // SelectionDAGBuilder.
1922 APInt Exponent = RHSC->getValue().abs();
1923 unsigned ActiveBits = Exponent.getActiveBits();
1924 unsigned PopCount = Exponent.popcount();
1925 InstructionCost Cost = (ActiveBits + PopCount - 2) *
1926 thisT()->getArithmeticInstrCost(
1927 Instruction::FMul, RetTy, CostKind);
1928 if (RHSC->isNegative())
1929 Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
1930 CostKind);
1931 return Cost;
1932 }
1933 }
1934 break;
1935 case Intrinsic::cttz:
1936 // FIXME: If necessary, this should go in target-specific overrides.
1937 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
1939 break;
1940
1941 case Intrinsic::ctlz:
1942 // FIXME: If necessary, this should go in target-specific overrides.
1943 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
1945 break;
1946
1947 case Intrinsic::memcpy:
1948 return thisT()->getMemcpyCost(ICA.getInst());
1949
1950 case Intrinsic::masked_scatter: {
1951 const Value *Mask = Args[2];
1952 bool VarMask = !isa<Constant>(Mask);
1953 Align Alignment = I->getParamAlign(1).valueOrOne();
1954 return thisT()->getMemIntrinsicInstrCost(
1955 MemIntrinsicCostAttributes(Intrinsic::masked_scatter,
1956 ICA.getArgTypes()[0], Args[1], VarMask,
1957 Alignment, I),
1958 CostKind);
1959 }
1960 case Intrinsic::masked_gather: {
1961 const Value *Mask = Args[1];
1962 bool VarMask = !isa<Constant>(Mask);
1963 Align Alignment = I->getParamAlign(0).valueOrOne();
1964 return thisT()->getMemIntrinsicInstrCost(
1965 MemIntrinsicCostAttributes(Intrinsic::masked_gather, RetTy, Args[0],
1966 VarMask, Alignment, I),
1967 CostKind);
1968 }
1969 case Intrinsic::masked_compressstore: {
1970 const Value *Data = Args[0];
1971 const Value *Mask = Args[2];
1972 Align Alignment = I->getParamAlign(1).valueOrOne();
1973 return thisT()->getMemIntrinsicInstrCost(
1974 MemIntrinsicCostAttributes(IID, Data->getType(), !isa<Constant>(Mask),
1975 Alignment, I),
1976 CostKind);
1977 }
1978 case Intrinsic::masked_expandload: {
1979 const Value *Mask = Args[1];
1980 Align Alignment = I->getParamAlign(0).valueOrOne();
1981 return thisT()->getMemIntrinsicInstrCost(
1982 MemIntrinsicCostAttributes(IID, RetTy, !isa<Constant>(Mask),
1983 Alignment, I),
1984 CostKind);
1985 }
1986 case Intrinsic::experimental_vp_strided_store: {
1987 const Value *Data = Args[0];
1988 const Value *Ptr = Args[1];
1989 const Value *Mask = Args[3];
1990 const Value *EVL = Args[4];
1991 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
1992 Type *EltTy = cast<VectorType>(Data->getType())->getElementType();
1993 Align Alignment =
1994 I->getParamAlign(1).value_or(thisT()->DL.getABITypeAlign(EltTy));
1995 return thisT()->getMemIntrinsicInstrCost(
1996 MemIntrinsicCostAttributes(IID, Data->getType(), Ptr, VarMask,
1997 Alignment, I),
1998 CostKind);
1999 }
2000 case Intrinsic::experimental_vp_strided_load: {
2001 const Value *Ptr = Args[0];
2002 const Value *Mask = Args[2];
2003 const Value *EVL = Args[3];
2004 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2005 Type *EltTy = cast<VectorType>(RetTy)->getElementType();
2006 Align Alignment =
2007 I->getParamAlign(0).value_or(thisT()->DL.getABITypeAlign(EltTy));
2008 return thisT()->getMemIntrinsicInstrCost(
2009 MemIntrinsicCostAttributes(IID, RetTy, Ptr, VarMask, Alignment, I),
2010 CostKind);
2011 }
2012 case Intrinsic::stepvector: {
2013 if (isa<ScalableVectorType>(RetTy))
2015 // The cost of materialising a constant integer vector.
2017 }
2018 case Intrinsic::vector_extract: {
2019 // FIXME: Handle case where a scalable vector is extracted from a scalable
2020 // vector
2021 if (isa<ScalableVectorType>(RetTy))
2023 unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
2024 return thisT()->getShuffleCost(TTI::SK_ExtractSubvector,
2025 cast<VectorType>(RetTy),
2026 cast<VectorType>(Args[0]->getType()), {},
2027 CostKind, Index, cast<VectorType>(RetTy));
2028 }
2029 case Intrinsic::vector_insert: {
2030 // FIXME: Handle case where a scalable vector is inserted into a scalable
2031 // vector
2032 if (isa<ScalableVectorType>(Args[1]->getType()))
2034 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
2035 return thisT()->getShuffleCost(
2037 cast<VectorType>(Args[0]->getType()), {}, CostKind, Index,
2038 cast<VectorType>(Args[1]->getType()));
2039 }
2040 case Intrinsic::vector_splice_left:
2041 case Intrinsic::vector_splice_right: {
2042 auto *COffset = dyn_cast<ConstantInt>(Args[2]);
2043 if (!COffset)
2044 break;
2045 unsigned Index = COffset->getZExtValue();
2046 return thisT()->getShuffleCost(
2048 cast<VectorType>(Args[0]->getType()), {}, CostKind,
2049 IID == Intrinsic::vector_splice_left ? Index : -Index,
2050 cast<VectorType>(RetTy));
2051 }
2052 case Intrinsic::vector_reduce_add:
2053 case Intrinsic::vector_reduce_mul:
2054 case Intrinsic::vector_reduce_and:
2055 case Intrinsic::vector_reduce_or:
2056 case Intrinsic::vector_reduce_xor:
2057 case Intrinsic::vector_reduce_smax:
2058 case Intrinsic::vector_reduce_smin:
2059 case Intrinsic::vector_reduce_fmax:
2060 case Intrinsic::vector_reduce_fmin:
2061 case Intrinsic::vector_reduce_fmaximum:
2062 case Intrinsic::vector_reduce_fminimum:
2063 case Intrinsic::vector_reduce_umax:
2064 case Intrinsic::vector_reduce_umin: {
2065 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
2067 }
2068 case Intrinsic::vector_reduce_fadd:
2069 case Intrinsic::vector_reduce_fmul: {
2071 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
2073 }
2074 case Intrinsic::fshl:
2075 case Intrinsic::fshr: {
2076 const Value *X = Args[0];
2077 const Value *Y = Args[1];
2078 const Value *Z = Args[2];
2081 const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
2082
2083 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2084 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2086 Cost +=
2087 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2088 Cost += thisT()->getArithmeticInstrCost(
2089 BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
2090 {OpInfoZ.Kind, TTI::OP_None});
2091 Cost += thisT()->getArithmeticInstrCost(
2092 BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
2093 {OpInfoZ.Kind, TTI::OP_None});
2094
2095 if (!OpInfoZ.isConstant()) {
2096 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
2097 CostKind);
2098 // Non-constant shift amounts requires a modulo. If the typesize is a
2099 // power-2 then this will be converted to an and, otherwise it will use
2100 // a urem.
2101 Cost += thisT()->getArithmeticInstrCost(
2102 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2103 : BinaryOperator::URem,
2104 RetTy, CostKind, OpInfoZ,
2105 {TTI::OK_UniformConstantValue, TTI::OP_None});
2106 // For non-rotates (X != Y) we must add shift-by-zero handling costs.
2107 if (X != Y) {
2108 Type *CondTy = RetTy->getWithNewBitWidth(1);
2109 Cost += thisT()->getCmpSelInstrCost(
2110 BinaryOperator::ICmp, RetTy, CondTy, CmpInst::ICMP_EQ, CostKind);
2111 Cost +=
2112 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2114 }
2115 }
2116 return Cost;
2117 }
2118 case Intrinsic::experimental_cttz_elts: {
2119 EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
2120
2121 // If we're not expanding the intrinsic then we assume this is cheap
2122 // to implement.
2123 if (!getTLI()->shouldExpandCttzElements(ArgType))
2124 return getTypeLegalizationCost(RetTy).first;
2125
2126 // TODO: The costs below reflect the expansion code in
2127 // SelectionDAGBuilder, but we may want to sacrifice some accuracy in
2128 // favour of compile time.
2129
2130 // Find the smallest "sensible" element type to use for the expansion.
2131 bool ZeroIsPoison = !cast<ConstantInt>(Args[1])->isZero();
2132 ConstantRange VScaleRange(APInt(64, 1), APInt::getZero(64));
2133 if (isa<ScalableVectorType>(ICA.getArgTypes()[0]) && I && I->getCaller())
2134 VScaleRange = getVScaleRange(I->getCaller(), 64);
2135
2136 unsigned EltWidth = getTLI()->getBitWidthForCttzElements(
2137 getTLI()->getValueType(DL, RetTy), ArgType.getVectorElementCount(),
2138 ZeroIsPoison, &VScaleRange);
2139 Type *NewEltTy = IntegerType::getIntNTy(RetTy->getContext(), EltWidth);
2140
2141 // Create the new vector type & get the vector length
2142 Type *NewVecTy = VectorType::get(
2143 NewEltTy, cast<VectorType>(Args[0]->getType())->getElementCount());
2144
2145 IntrinsicCostAttributes StepVecAttrs(Intrinsic::stepvector, NewVecTy, {},
2146 FMF);
2148 thisT()->getIntrinsicInstrCost(StepVecAttrs, CostKind);
2149
2150 Cost +=
2151 thisT()->getArithmeticInstrCost(Instruction::Sub, NewVecTy, CostKind);
2152 Cost += thisT()->getCastInstrCost(Instruction::SExt, NewVecTy,
2153 Args[0]->getType(),
2155 Cost +=
2156 thisT()->getArithmeticInstrCost(Instruction::And, NewVecTy, CostKind);
2157
2158 IntrinsicCostAttributes ReducAttrs(Intrinsic::vector_reduce_umax,
2159 NewEltTy, NewVecTy, FMF, I, 1);
2160 Cost += thisT()->getTypeBasedIntrinsicInstrCost(ReducAttrs, CostKind);
2161 Cost +=
2162 thisT()->getArithmeticInstrCost(Instruction::Sub, NewEltTy, CostKind);
2163
2164 return Cost;
2165 }
2166 case Intrinsic::get_active_lane_mask:
2167 case Intrinsic::experimental_vector_match:
2168 case Intrinsic::experimental_vector_histogram_add:
2169 case Intrinsic::experimental_vector_histogram_uadd_sat:
2170 case Intrinsic::experimental_vector_histogram_umax:
2171 case Intrinsic::experimental_vector_histogram_umin:
2172 case Intrinsic::masked_udiv:
2173 case Intrinsic::masked_sdiv:
2174 case Intrinsic::masked_urem:
2175 case Intrinsic::masked_srem:
2176 return thisT()->getTypeBasedIntrinsicInstrCost(ICA, CostKind);
2177 case Intrinsic::modf:
2178 case Intrinsic::sincos:
2179 case Intrinsic::sincospi: {
2180 std::optional<unsigned> CallRetElementIndex;
2181 // The first element of the modf result is returned by value in the
2182 // libcall.
2183 if (ICA.getID() == Intrinsic::modf)
2184 CallRetElementIndex = 0;
2185
2186 if (auto Cost = getMultipleResultIntrinsicVectorLibCallCost(
2187 ICA, CostKind, CallRetElementIndex))
2188 return *Cost;
2189 // Otherwise, fallback to default scalarization cost.
2190 break;
2191 }
2192 case Intrinsic::loop_dependence_war_mask:
2193 case Intrinsic::loop_dependence_raw_mask: {
2194 // Compute the cost of the expanded version of these intrinsics:
2195 //
2196 // The possible expansions are...
2197 //
2198 // loop_dependence_war_mask:
2199 // diff = (ptrB - ptrA) / eltSize
2200 // cmp = icmp sle diff, 0
2201 // upper_bound = select cmp, -1, diff
2202 // mask = get_active_lane_mask 0, upper_bound
2203 //
2204 // loop_dependence_raw_mask:
2205 // diff = (abs(ptrB - ptrA)) / eltSize
2206 // cmp = icmp eq diff, 0
2207 // upper_bound = select cmp, -1, diff
2208 // mask = get_active_lane_mask 0, upper_bound
2209 //
2210 auto *PtrTy = cast<PointerType>(ICA.getArgTypes()[0]);
2211 Type *IntPtrTy = IntegerType::getIntNTy(
2212 RetTy->getContext(), thisT()->getDataLayout().getPointerSizeInBits(
2213 PtrTy->getAddressSpace()));
2214 bool IsReadAfterWrite = IID == Intrinsic::loop_dependence_raw_mask;
2215
2217 thisT()->getArithmeticInstrCost(Instruction::Sub, IntPtrTy, CostKind);
2218 if (IsReadAfterWrite) {
2219 IntrinsicCostAttributes AbsAttrs(Intrinsic::abs, IntPtrTy, {IntPtrTy},
2220 {});
2221 Cost += thisT()->getIntrinsicInstrCost(AbsAttrs, CostKind);
2222 }
2223
2224 TTI::OperandValueInfo EltSizeOpInfo =
2225 TTI::getOperandInfo(ICA.getArgs()[2]);
2226 Cost += thisT()->getArithmeticInstrCost(Instruction::SDiv, IntPtrTy,
2227 CostKind, {}, EltSizeOpInfo);
2228
2229 Type *CondTy = IntegerType::getInt1Ty(RetTy->getContext());
2230 CmpInst::Predicate Pred =
2231 IsReadAfterWrite ? CmpInst::ICMP_EQ : CmpInst::ICMP_SLE;
2232 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CondTy,
2233 IntPtrTy, Pred, CostKind);
2234 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, IntPtrTy,
2235 CondTy, Pred, CostKind);
2236
2237 IntrinsicCostAttributes Attrs(Intrinsic::get_active_lane_mask, RetTy,
2238 {IntPtrTy, IntPtrTy}, FMF);
2239 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2240 return Cost;
2241 }
2242 }
2243
2244 // Assume that we need to scalarize this intrinsic.)
2245 // Compute the scalarization overhead based on Args for a vector
2246 // intrinsic.
2247 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
2248 if (RetVF.isVector() && !RetVF.isScalable()) {
2249 ScalarizationCost = 0;
2250 if (!RetTy->isVoidTy()) {
2251 for (Type *VectorTy : getContainedTypes(RetTy)) {
2252 ScalarizationCost += getScalarizationOverhead(
2253 cast<VectorType>(VectorTy),
2254 /*Insert=*/true, /*Extract=*/false, CostKind);
2255 }
2256 }
2257 ScalarizationCost += getOperandsScalarizationOverhead(
2258 filterConstantAndDuplicatedOperands(Args, ICA.getArgTypes()),
2259 CostKind);
2260 }
2261
2262 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
2263 ScalarizationCost);
2264 return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2265 }
2266
2267 /// Get intrinsic cost based on argument types.
2268 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
2269 /// cost of scalarizing the arguments and the return value will be computed
2270 /// based on types.
2274 Intrinsic::ID IID = ICA.getID();
2275 Type *RetTy = ICA.getReturnType();
2276 const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
2277 FastMathFlags FMF = ICA.getFlags();
2278 InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
2279 bool SkipScalarizationCost = ICA.skipScalarizationCost();
2280
2281 VectorType *VecOpTy = nullptr;
2282 if (!Tys.empty()) {
2283 // The vector reduction operand is operand 0 except for fadd/fmul.
2284 // Their operand 0 is a scalar start value, so the vector op is operand 1.
2285 unsigned VecTyIndex = 0;
2286 if (IID == Intrinsic::vector_reduce_fadd ||
2287 IID == Intrinsic::vector_reduce_fmul)
2288 VecTyIndex = 1;
2289 assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
2290 VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
2291 }
2292
2293 // Library call cost - other than size, make it expensive.
2294 unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
2295 unsigned ISD = 0;
2296 switch (IID) {
2297 default: {
2298 // Scalable vectors cannot be scalarized, so return Invalid.
2299 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
2300 return isa<ScalableVectorType>(Ty);
2301 }))
2303
2304 // Assume that we need to scalarize this intrinsic.
2305 InstructionCost ScalarizationCost =
2306 SkipScalarizationCost ? ScalarizationCostPassed : 0;
2307 unsigned ScalarCalls = 1;
2308 Type *ScalarRetTy = RetTy;
2309 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
2310 if (!SkipScalarizationCost)
2311 ScalarizationCost = getScalarizationOverhead(
2312 RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
2313 ScalarCalls = std::max(ScalarCalls,
2315 ScalarRetTy = RetTy->getScalarType();
2316 }
2317 SmallVector<Type *, 4> ScalarTys;
2318 for (Type *Ty : Tys) {
2319 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
2320 if (!SkipScalarizationCost)
2321 ScalarizationCost += getScalarizationOverhead(
2322 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
2323 ScalarCalls = std::max(ScalarCalls,
2325 Ty = Ty->getScalarType();
2326 }
2327 ScalarTys.push_back(Ty);
2328 }
2329 if (ScalarCalls == 1)
2330 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
2331
2332 IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
2333 InstructionCost ScalarCost =
2334 thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
2335
2336 return ScalarCalls * ScalarCost + ScalarizationCost;
2337 }
2338 // Look for intrinsics that can be lowered directly or turned into a scalar
2339 // intrinsic call.
2340 case Intrinsic::sqrt:
2341 ISD = ISD::FSQRT;
2342 break;
2343 case Intrinsic::sin:
2344 ISD = ISD::FSIN;
2345 break;
2346 case Intrinsic::cos:
2347 ISD = ISD::FCOS;
2348 break;
2349 case Intrinsic::sincos:
2350 ISD = ISD::FSINCOS;
2351 break;
2352 case Intrinsic::sincospi:
2354 break;
2355 case Intrinsic::modf:
2356 ISD = ISD::FMODF;
2357 break;
2358 case Intrinsic::tan:
2359 ISD = ISD::FTAN;
2360 break;
2361 case Intrinsic::asin:
2362 ISD = ISD::FASIN;
2363 break;
2364 case Intrinsic::acos:
2365 ISD = ISD::FACOS;
2366 break;
2367 case Intrinsic::atan:
2368 ISD = ISD::FATAN;
2369 break;
2370 case Intrinsic::atan2:
2371 ISD = ISD::FATAN2;
2372 break;
2373 case Intrinsic::sinh:
2374 ISD = ISD::FSINH;
2375 break;
2376 case Intrinsic::cosh:
2377 ISD = ISD::FCOSH;
2378 break;
2379 case Intrinsic::tanh:
2380 ISD = ISD::FTANH;
2381 break;
2382 case Intrinsic::exp:
2383 ISD = ISD::FEXP;
2384 break;
2385 case Intrinsic::exp2:
2386 ISD = ISD::FEXP2;
2387 break;
2388 case Intrinsic::exp10:
2389 ISD = ISD::FEXP10;
2390 break;
2391 case Intrinsic::log:
2392 ISD = ISD::FLOG;
2393 break;
2394 case Intrinsic::log10:
2395 ISD = ISD::FLOG10;
2396 break;
2397 case Intrinsic::log2:
2398 ISD = ISD::FLOG2;
2399 break;
2400 case Intrinsic::ldexp:
2401 ISD = ISD::FLDEXP;
2402 break;
2403 case Intrinsic::fabs:
2404 ISD = ISD::FABS;
2405 break;
2406 case Intrinsic::canonicalize:
2408 break;
2409 case Intrinsic::minnum:
2410 ISD = ISD::FMINNUM;
2411 break;
2412 case Intrinsic::maxnum:
2413 ISD = ISD::FMAXNUM;
2414 break;
2415 case Intrinsic::minimum:
2417 break;
2418 case Intrinsic::maximum:
2420 break;
2421 case Intrinsic::minimumnum:
2423 break;
2424 case Intrinsic::maximumnum:
2426 break;
2427 case Intrinsic::copysign:
2429 break;
2430 case Intrinsic::floor:
2431 ISD = ISD::FFLOOR;
2432 break;
2433 case Intrinsic::ceil:
2434 ISD = ISD::FCEIL;
2435 break;
2436 case Intrinsic::trunc:
2437 ISD = ISD::FTRUNC;
2438 break;
2439 case Intrinsic::nearbyint:
2441 break;
2442 case Intrinsic::rint:
2443 ISD = ISD::FRINT;
2444 break;
2445 case Intrinsic::lrint:
2446 ISD = ISD::LRINT;
2447 break;
2448 case Intrinsic::llrint:
2449 ISD = ISD::LLRINT;
2450 break;
2451 case Intrinsic::round:
2452 ISD = ISD::FROUND;
2453 break;
2454 case Intrinsic::roundeven:
2456 break;
2457 case Intrinsic::lround:
2458 ISD = ISD::LROUND;
2459 break;
2460 case Intrinsic::llround:
2461 ISD = ISD::LLROUND;
2462 break;
2463 case Intrinsic::pow:
2464 ISD = ISD::FPOW;
2465 break;
2466 case Intrinsic::fma:
2467 ISD = ISD::FMA;
2468 break;
2469 case Intrinsic::fmuladd:
2470 ISD = ISD::FMA;
2471 break;
2472 case Intrinsic::experimental_constrained_fmuladd:
2474 break;
2475 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
2476 case Intrinsic::lifetime_start:
2477 case Intrinsic::lifetime_end:
2478 case Intrinsic::sideeffect:
2479 case Intrinsic::pseudoprobe:
2480 case Intrinsic::arithmetic_fence:
2481 return 0;
2482 case Intrinsic::masked_store: {
2483 Type *Ty = Tys[0];
2484 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2485 return thisT()->getMemIntrinsicInstrCost(
2486 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2487 }
2488 case Intrinsic::masked_load: {
2489 Type *Ty = RetTy;
2490 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2491 return thisT()->getMemIntrinsicInstrCost(
2492 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2493 }
2494 case Intrinsic::experimental_vp_strided_store: {
2495 auto *Ty = cast<VectorType>(ICA.getArgTypes()[0]);
2496 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2497 return thisT()->getMemIntrinsicInstrCost(
2498 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2499 /*VariableMask=*/true, Alignment,
2500 ICA.getInst()),
2501 CostKind);
2502 }
2503 case Intrinsic::experimental_vp_strided_load: {
2504 auto *Ty = cast<VectorType>(ICA.getReturnType());
2505 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2506 return thisT()->getMemIntrinsicInstrCost(
2507 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2508 /*VariableMask=*/true, Alignment,
2509 ICA.getInst()),
2510 CostKind);
2511 }
2512 case Intrinsic::vector_reduce_add:
2513 case Intrinsic::vector_reduce_mul:
2514 case Intrinsic::vector_reduce_and:
2515 case Intrinsic::vector_reduce_or:
2516 case Intrinsic::vector_reduce_xor:
2517 return thisT()->getArithmeticReductionCost(
2518 getArithmeticReductionInstruction(IID), VecOpTy, std::nullopt,
2519 CostKind);
2520 case Intrinsic::vector_reduce_fadd:
2521 case Intrinsic::vector_reduce_fmul:
2522 return thisT()->getArithmeticReductionCost(
2523 getArithmeticReductionInstruction(IID), VecOpTy, FMF, CostKind);
2524 case Intrinsic::vector_reduce_smax:
2525 case Intrinsic::vector_reduce_smin:
2526 case Intrinsic::vector_reduce_umax:
2527 case Intrinsic::vector_reduce_umin:
2528 case Intrinsic::vector_reduce_fmax:
2529 case Intrinsic::vector_reduce_fmin:
2530 case Intrinsic::vector_reduce_fmaximum:
2531 case Intrinsic::vector_reduce_fminimum:
2532 return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
2533 VecOpTy, ICA.getFlags(), CostKind);
2534 case Intrinsic::experimental_vector_match: {
2535 auto *SearchTy = cast<VectorType>(ICA.getArgTypes()[0]);
2536 auto *NeedleTy = cast<FixedVectorType>(ICA.getArgTypes()[1]);
2537 unsigned SearchSize = NeedleTy->getNumElements();
2538
2539 // If we're not expanding the intrinsic then we assume this is cheap to
2540 // implement.
2541 EVT SearchVT = getTLI()->getValueType(DL, SearchTy);
2542 if (!getTLI()->shouldExpandVectorMatch(SearchVT, SearchSize))
2543 return getTypeLegalizationCost(RetTy).first;
2544
2545 // Approximate the cost based on the expansion code in
2546 // SelectionDAGBuilder.
2548 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, NeedleTy,
2549 CostKind, 1, nullptr, nullptr);
2550 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SearchTy,
2551 CostKind, 0, nullptr, nullptr);
2552 Cost += thisT()->getShuffleCost(TTI::SK_Broadcast, SearchTy, SearchTy, {},
2553 CostKind, 0, nullptr);
2554 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SearchTy, RetTy,
2556 Cost +=
2557 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2558 Cost *= SearchSize;
2559 Cost +=
2560 thisT()->getArithmeticInstrCost(BinaryOperator::And, RetTy, CostKind);
2561 return Cost;
2562 }
2563 case Intrinsic::vector_reverse:
2564 return thisT()->getShuffleCost(TTI::SK_Reverse, cast<VectorType>(RetTy),
2565 cast<VectorType>(ICA.getArgTypes()[0]), {},
2566 CostKind, 0, cast<VectorType>(RetTy));
2567 case Intrinsic::experimental_vector_histogram_add:
2568 case Intrinsic::experimental_vector_histogram_uadd_sat:
2569 case Intrinsic::experimental_vector_histogram_umax:
2570 case Intrinsic::experimental_vector_histogram_umin: {
2572 Type *EltTy = ICA.getArgTypes()[1];
2573
2574 // Targets with scalable vectors must handle this on their own.
2575 if (!PtrsTy)
2577
2578 Align Alignment = thisT()->DL.getABITypeAlign(EltTy);
2580 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, PtrsTy,
2581 CostKind, 1, nullptr, nullptr);
2582 Cost += thisT()->getMemoryOpCost(Instruction::Load, EltTy, Alignment, 0,
2583 CostKind);
2584 switch (IID) {
2585 default:
2586 llvm_unreachable("Unhandled histogram update operation.");
2587 case Intrinsic::experimental_vector_histogram_add:
2588 Cost +=
2589 thisT()->getArithmeticInstrCost(Instruction::Add, EltTy, CostKind);
2590 break;
2591 case Intrinsic::experimental_vector_histogram_uadd_sat: {
2592 IntrinsicCostAttributes UAddSat(Intrinsic::uadd_sat, EltTy, {EltTy});
2593 Cost += thisT()->getIntrinsicInstrCost(UAddSat, CostKind);
2594 break;
2595 }
2596 case Intrinsic::experimental_vector_histogram_umax: {
2597 IntrinsicCostAttributes UMax(Intrinsic::umax, EltTy, {EltTy});
2598 Cost += thisT()->getIntrinsicInstrCost(UMax, CostKind);
2599 break;
2600 }
2601 case Intrinsic::experimental_vector_histogram_umin: {
2602 IntrinsicCostAttributes UMin(Intrinsic::umin, EltTy, {EltTy});
2603 Cost += thisT()->getIntrinsicInstrCost(UMin, CostKind);
2604 break;
2605 }
2606 }
2607 Cost += thisT()->getMemoryOpCost(Instruction::Store, EltTy, Alignment, 0,
2608 CostKind);
2609 Cost *= PtrsTy->getNumElements();
2610 return Cost;
2611 }
2612 case Intrinsic::get_active_lane_mask: {
2613 Type *ArgTy = ICA.getArgTypes()[0];
2614 EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
2615 EVT ArgVT = getTLI()->getValueType(DL, ArgTy, true);
2616
2617 // If we're not expanding the intrinsic then we assume this is cheap
2618 // to implement.
2619 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgVT))
2620 return getTypeLegalizationCost(RetTy).first;
2621
2622 // Create the expanded types that will be used to calculate the uadd_sat
2623 // operation.
2624 Type *ExpRetTy =
2625 VectorType::get(ArgTy, cast<VectorType>(RetTy)->getElementCount());
2626 IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
2628 thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2629 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
2631 return Cost;
2632 }
2633 case Intrinsic::experimental_memset_pattern:
2634 // This cost is set to match the cost of the memset_pattern16 libcall.
2635 // It should likely be re-evaluated after migration to this intrinsic
2636 // is complete.
2637 return TTI::TCC_Basic * 4;
2638 case Intrinsic::abs:
2639 ISD = ISD::ABS;
2640 break;
2641 case Intrinsic::fshl:
2642 ISD = ISD::FSHL;
2643 break;
2644 case Intrinsic::fshr:
2645 ISD = ISD::FSHR;
2646 break;
2647 case Intrinsic::smax:
2648 ISD = ISD::SMAX;
2649 break;
2650 case Intrinsic::smin:
2651 ISD = ISD::SMIN;
2652 break;
2653 case Intrinsic::umax:
2654 ISD = ISD::UMAX;
2655 break;
2656 case Intrinsic::umin:
2657 ISD = ISD::UMIN;
2658 break;
2659 case Intrinsic::sadd_sat:
2660 ISD = ISD::SADDSAT;
2661 break;
2662 case Intrinsic::ssub_sat:
2663 ISD = ISD::SSUBSAT;
2664 break;
2665 case Intrinsic::uadd_sat:
2666 ISD = ISD::UADDSAT;
2667 break;
2668 case Intrinsic::usub_sat:
2669 ISD = ISD::USUBSAT;
2670 break;
2671 case Intrinsic::smul_fix:
2672 ISD = ISD::SMULFIX;
2673 break;
2674 case Intrinsic::umul_fix:
2675 ISD = ISD::UMULFIX;
2676 break;
2677 case Intrinsic::sadd_with_overflow:
2678 ISD = ISD::SADDO;
2679 break;
2680 case Intrinsic::ssub_with_overflow:
2681 ISD = ISD::SSUBO;
2682 break;
2683 case Intrinsic::uadd_with_overflow:
2684 ISD = ISD::UADDO;
2685 break;
2686 case Intrinsic::usub_with_overflow:
2687 ISD = ISD::USUBO;
2688 break;
2689 case Intrinsic::smul_with_overflow:
2690 ISD = ISD::SMULO;
2691 break;
2692 case Intrinsic::umul_with_overflow:
2693 ISD = ISD::UMULO;
2694 break;
2695 case Intrinsic::fptosi_sat:
2696 case Intrinsic::fptoui_sat: {
2697 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Tys[0]);
2698 std::pair<InstructionCost, MVT> RetLT = getTypeLegalizationCost(RetTy);
2699
2700 // For cast instructions, types are different between source and
2701 // destination. Also need to check if the source type can be legalize.
2702 if (!SrcLT.first.isValid() || !RetLT.first.isValid())
2704 ISD = IID == Intrinsic::fptosi_sat ? ISD::FP_TO_SINT_SAT
2706 break;
2707 }
2708 case Intrinsic::ctpop:
2709 ISD = ISD::CTPOP;
2710 // In case of legalization use TCC_Expensive. This is cheaper than a
2711 // library call but still not a cheap instruction.
2712 SingleCallCost = TargetTransformInfo::TCC_Expensive;
2713 break;
2714 case Intrinsic::ctlz:
2715 ISD = ISD::CTLZ;
2716 break;
2717 case Intrinsic::cttz:
2718 ISD = ISD::CTTZ;
2719 break;
2720 case Intrinsic::bswap:
2721 ISD = ISD::BSWAP;
2722 break;
2723 case Intrinsic::bitreverse:
2725 break;
2726 case Intrinsic::ucmp:
2727 ISD = ISD::UCMP;
2728 break;
2729 case Intrinsic::scmp:
2730 ISD = ISD::SCMP;
2731 break;
2732 case Intrinsic::clmul:
2733 ISD = ISD::CLMUL;
2734 break;
2735 case Intrinsic::masked_udiv:
2736 case Intrinsic::masked_sdiv:
2737 case Intrinsic::masked_urem:
2738 case Intrinsic::masked_srem: {
2739 unsigned UnmaskedOpc;
2740 switch (IID) {
2741 case Intrinsic::masked_udiv:
2743 UnmaskedOpc = Instruction::UDiv;
2744 break;
2745 case Intrinsic::masked_sdiv:
2747 UnmaskedOpc = Instruction::SDiv;
2748 break;
2749 case Intrinsic::masked_urem:
2751 UnmaskedOpc = Instruction::URem;
2752 break;
2753 case Intrinsic::masked_srem:
2755 UnmaskedOpc = Instruction::SRem;
2756 break;
2757 default:
2758 llvm_unreachable("Unexpected intrinsic ID");
2759 }
2761 thisT()->getArithmeticInstrCost(UnmaskedOpc, RetTy, CostKind);
2762
2763 // Expansion generates a (select %mask, %rhs, 1) for the divisor.
2764 MVT LT = getTypeLegalizationCost(RetTy).second;
2765 if (!getTLI()->isOperationLegalOrCustom(ISD, LT)) {
2766 Type *CondTy = cast<VectorType>(RetTy)->getWithNewType(
2768 Cost += thisT()->getCmpSelInstrCost(
2769 BinaryOperator::Select, RetTy, CondTy, CmpInst::BAD_ICMP_PREDICATE,
2771 }
2772
2773 return Cost;
2774 }
2775 }
2776
2777 auto *ST = dyn_cast<StructType>(RetTy);
2778 Type *LegalizeTy = ST ? ST->getContainedType(0) : RetTy;
2779 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(LegalizeTy);
2780
2781 const TargetLoweringBase *TLI = getTLI();
2782
2783 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2784 if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2785 TLI->isFAbsFree(LT.second)) {
2786 return 0;
2787 }
2788
2789 // The operation is legal. Assume it costs 1.
2790 // If the type is split to multiple registers, assume that there is some
2791 // overhead to this.
2792 // TODO: Once we have extract/insert subvector cost we need to use them.
2793 if (LT.first > 1)
2794 return (LT.first * 2);
2795 else
2796 return (LT.first * 1);
2797 } else if (TLI->isOperationCustom(ISD, LT.second)) {
2798 // If the operation is custom lowered then assume
2799 // that the code is twice as expensive.
2800 return (LT.first * 2);
2801 }
2802
2803 switch (IID) {
2804 case Intrinsic::fmuladd: {
2805 // If we can't lower fmuladd into an FMA estimate the cost as a floating
2806 // point mul followed by an add.
2807
2808 return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
2809 CostKind) +
2810 thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
2811 CostKind);
2812 }
2813 case Intrinsic::experimental_constrained_fmuladd: {
2814 IntrinsicCostAttributes FMulAttrs(
2815 Intrinsic::experimental_constrained_fmul, RetTy, Tys);
2816 IntrinsicCostAttributes FAddAttrs(
2817 Intrinsic::experimental_constrained_fadd, RetTy, Tys);
2818 return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
2819 thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
2820 }
2821 case Intrinsic::smin:
2822 case Intrinsic::smax:
2823 case Intrinsic::umin:
2824 case Intrinsic::umax: {
2825 // minmax(X,Y) = select(icmp(X,Y),X,Y)
2826 Type *CondTy = RetTy->getWithNewBitWidth(1);
2827 bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
2828 CmpInst::Predicate Pred =
2829 IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
2831 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2832 Pred, CostKind);
2833 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2834 Pred, CostKind);
2835 return Cost;
2836 }
2837 case Intrinsic::sadd_with_overflow:
2838 case Intrinsic::ssub_with_overflow: {
2839 Type *SumTy = RetTy->getContainedType(0);
2840 Type *OverflowTy = RetTy->getContainedType(1);
2841 unsigned Opcode = IID == Intrinsic::sadd_with_overflow
2842 ? BinaryOperator::Add
2843 : BinaryOperator::Sub;
2844
2845 // Add:
2846 // Overflow -> (Result < LHS) ^ (RHS < 0)
2847 // Sub:
2848 // Overflow -> (Result < LHS) ^ (RHS > 0)
2850 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2851 Cost +=
2852 2 * thisT()->getCmpSelInstrCost(Instruction::ICmp, SumTy, OverflowTy,
2854 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
2855 CostKind);
2856 return Cost;
2857 }
2858 case Intrinsic::uadd_with_overflow:
2859 case Intrinsic::usub_with_overflow: {
2860 Type *SumTy = RetTy->getContainedType(0);
2861 Type *OverflowTy = RetTy->getContainedType(1);
2862 unsigned Opcode = IID == Intrinsic::uadd_with_overflow
2863 ? BinaryOperator::Add
2864 : BinaryOperator::Sub;
2865 CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
2868
2870 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2871 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy,
2872 OverflowTy, Pred, CostKind);
2873 return Cost;
2874 }
2875 case Intrinsic::smul_with_overflow:
2876 case Intrinsic::umul_with_overflow: {
2877 Type *MulTy = RetTy->getContainedType(0);
2878 Type *OverflowTy = RetTy->getContainedType(1);
2879 unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2880 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2881 bool IsSigned = IID == Intrinsic::smul_with_overflow;
2882
2883 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2885
2887 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2888 Cost +=
2889 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2890 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2891 CCH, CostKind);
2892 Cost += thisT()->getArithmeticInstrCost(
2893 Instruction::LShr, ExtTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2895
2896 if (IsSigned)
2897 Cost += thisT()->getArithmeticInstrCost(
2898 Instruction::AShr, MulTy, CostKind,
2901
2902 Cost += thisT()->getCmpSelInstrCost(
2903 BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2904 return Cost;
2905 }
2906 case Intrinsic::sadd_sat:
2907 case Intrinsic::ssub_sat: {
2908 // Assume a default expansion.
2909 Type *CondTy = RetTy->getWithNewBitWidth(1);
2910
2911 Type *OpTy = StructType::create({RetTy, CondTy});
2912 Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
2913 ? Intrinsic::sadd_with_overflow
2914 : Intrinsic::ssub_with_overflow;
2916
2917 // SatMax -> Overflow && SumDiff < 0
2918 // SatMin -> Overflow && SumDiff >= 0
2920 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2921 nullptr, ScalarizationCostPassed);
2922 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2923 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2924 Pred, CostKind);
2925 Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
2926 CondTy, Pred, CostKind);
2927 return Cost;
2928 }
2929 case Intrinsic::uadd_sat:
2930 case Intrinsic::usub_sat: {
2931 Type *CondTy = RetTy->getWithNewBitWidth(1);
2932
2933 Type *OpTy = StructType::create({RetTy, CondTy});
2934 Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
2935 ? Intrinsic::uadd_with_overflow
2936 : Intrinsic::usub_with_overflow;
2937
2939 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2940 nullptr, ScalarizationCostPassed);
2941 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2942 Cost +=
2943 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2945 return Cost;
2946 }
2947 case Intrinsic::smul_fix:
2948 case Intrinsic::umul_fix: {
2949 unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
2950 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
2951
2952 unsigned ExtOp =
2953 IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
2955
2957 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
2958 Cost +=
2959 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2960 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
2961 CCH, CostKind);
2962 Cost += thisT()->getArithmeticInstrCost(
2963 Instruction::LShr, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2965 Cost += thisT()->getArithmeticInstrCost(
2966 Instruction::Shl, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2968 Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
2969 return Cost;
2970 }
2971 case Intrinsic::abs: {
2972 // abs(X) = select(icmp(X,0),X,sub(0,X))
2973 Type *CondTy = RetTy->getWithNewBitWidth(1);
2976 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2977 Pred, CostKind);
2978 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2979 Pred, CostKind);
2980 // TODO: Should we add an OperandValueProperties::OP_Zero property?
2981 Cost += thisT()->getArithmeticInstrCost(
2982 BinaryOperator::Sub, RetTy, CostKind,
2984 return Cost;
2985 }
2986 case Intrinsic::fshl:
2987 case Intrinsic::fshr: {
2988 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2989 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2990 Type *CondTy = RetTy->getWithNewBitWidth(1);
2992 Cost +=
2993 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2994 Cost +=
2995 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
2996 Cost +=
2997 thisT()->getArithmeticInstrCost(BinaryOperator::Shl, RetTy, CostKind);
2998 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::LShr, RetTy,
2999 CostKind);
3000 // Non-constant shift amounts requires a modulo. If the typesize is a
3001 // power-2 then this will be converted to an and, otherwise it will use a
3002 // urem.
3003 Cost += thisT()->getArithmeticInstrCost(
3004 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
3005 : BinaryOperator::URem,
3006 RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
3007 {TTI::OK_UniformConstantValue, TTI::OP_None});
3008 // Shift-by-zero handling.
3009 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
3011 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
3013 return Cost;
3014 }
3015 case Intrinsic::fptosi_sat:
3016 case Intrinsic::fptoui_sat: {
3017 if (Tys.empty())
3018 break;
3019 Type *FromTy = Tys[0];
3020 bool IsSigned = IID == Intrinsic::fptosi_sat;
3021
3023 IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
3024 {FromTy, FromTy});
3025 Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
3026 IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
3027 {FromTy, FromTy});
3028 Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
3029 Cost += thisT()->getCastInstrCost(
3030 IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
3032 if (IsSigned) {
3033 Type *CondTy = RetTy->getWithNewBitWidth(1);
3034 Cost += thisT()->getCmpSelInstrCost(
3035 BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3036 Cost += thisT()->getCmpSelInstrCost(
3037 BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3038 }
3039 return Cost;
3040 }
3041 case Intrinsic::ucmp:
3042 case Intrinsic::scmp: {
3043 Type *CmpTy = Tys[0];
3044 Type *CondTy = RetTy->getWithNewBitWidth(1);
3046 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3048 CostKind) +
3049 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3051 CostKind);
3052
3053 EVT VT = TLI->getValueType(DL, CmpTy, true);
3055 // x < y ? -1 : (x > y ? 1 : 0)
3056 Cost += 2 * thisT()->getCmpSelInstrCost(
3057 BinaryOperator::Select, RetTy, CondTy,
3059 } else {
3060 // zext(x > y) - zext(x < y)
3061 Cost +=
3062 2 * thisT()->getCastInstrCost(CastInst::ZExt, RetTy, CondTy,
3064 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
3065 CostKind);
3066 }
3067 return Cost;
3068 }
3069 case Intrinsic::maximumnum:
3070 case Intrinsic::minimumnum: {
3071 // On platform that support FMAXNUM_IEEE/FMINNUM_IEEE, we expand
3072 // maximumnum/minimumnum to
3073 // ARG0 = fcanonicalize ARG0, ARG0 // to quiet ARG0
3074 // ARG1 = fcanonicalize ARG1, ARG1 // to quiet ARG1
3075 // RESULT = MAXNUM_IEEE ARG0, ARG1 // or MINNUM_IEEE
3076 // FIXME: In LangRef, we claimed FMAXNUM has the same behaviour of
3077 // FMAXNUM_IEEE, while the backend hasn't migrated the code yet.
3078 // Finally, we will remove FMAXNUM_IEEE and FMINNUM_IEEE.
3079 int IeeeISD =
3080 IID == Intrinsic::maximumnum ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
3081 if (TLI->isOperationLegal(IeeeISD, LT.second)) {
3082 IntrinsicCostAttributes FCanonicalizeAttrs(Intrinsic::canonicalize,
3083 RetTy, Tys[0]);
3084 InstructionCost FCanonicalizeCost =
3085 thisT()->getIntrinsicInstrCost(FCanonicalizeAttrs, CostKind);
3086 return LT.first + FCanonicalizeCost * 2;
3087 }
3088 break;
3089 }
3090 case Intrinsic::clmul: {
3091 // This cost model should match the expansion in
3092 // TargetLowering::expandCLMUL.
3093 InstructionCost PerBitCostMul =
3094 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind) +
3095 thisT()->getArithmeticInstrCost(Instruction::Mul, RetTy, CostKind) +
3096 thisT()->getArithmeticInstrCost(Instruction::Xor, RetTy, CostKind);
3097 InstructionCost PerBitCostBittest =
3098 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind) +
3099 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, RetTy,
3101 thisT()->getCmpSelInstrCost(Instruction::ICmp, RetTy, RetTy,
3103 InstructionCost PerBitCost = std::min(PerBitCostMul, PerBitCostBittest);
3104 return RetTy->getScalarSizeInBits() * PerBitCost;
3105 }
3106 default:
3107 break;
3108 }
3109
3110 // Else, assume that we need to scalarize this intrinsic. For math builtins
3111 // this will emit a costly libcall, adding call overhead and spills. Make it
3112 // very expensive.
3113 if (isVectorizedTy(RetTy)) {
3114 ArrayRef<Type *> RetVTys = getContainedTypes(RetTy);
3115
3116 // Scalable vectors cannot be scalarized, so return Invalid.
3117 if (any_of(concat<Type *const>(RetVTys, Tys),
3118 [](Type *Ty) { return isa<ScalableVectorType>(Ty); }))
3120
3121 InstructionCost ScalarizationCost = ScalarizationCostPassed;
3122 if (!SkipScalarizationCost) {
3123 ScalarizationCost = 0;
3124 for (Type *RetVTy : RetVTys) {
3125 ScalarizationCost += getScalarizationOverhead(
3126 cast<VectorType>(RetVTy), /*Insert=*/true,
3127 /*Extract=*/false, CostKind);
3128 }
3129 }
3130
3131 unsigned ScalarCalls = getVectorizedTypeVF(RetTy).getFixedValue();
3132 SmallVector<Type *, 4> ScalarTys;
3133 for (Type *Ty : Tys) {
3134 if (Ty->isVectorTy())
3135 Ty = Ty->getScalarType();
3136 ScalarTys.push_back(Ty);
3137 }
3138 IntrinsicCostAttributes Attrs(IID, toScalarizedTy(RetTy), ScalarTys, FMF);
3139 InstructionCost ScalarCost =
3140 thisT()->getIntrinsicInstrCost(Attrs, CostKind);
3141 for (Type *Ty : Tys) {
3142 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
3143 if (!ICA.skipScalarizationCost())
3144 ScalarizationCost += getScalarizationOverhead(
3145 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
3146 ScalarCalls = std::max(ScalarCalls,
3148 }
3149 }
3150 return ScalarCalls * ScalarCost + ScalarizationCost;
3151 }
3152
3153 // This is going to be turned into a library call, make it expensive.
3154 return SingleCallCost;
3155 }
3156
3157 /// Get memory intrinsic cost based on arguments.
3160 TTI::TargetCostKind CostKind) const override {
3161 unsigned Id = MICA.getID();
3162 Type *DataTy = MICA.getDataType();
3163 bool VariableMask = MICA.getVariableMask();
3164 Align Alignment = MICA.getAlignment();
3165
3166 switch (Id) {
3167 case Intrinsic::experimental_vp_strided_load:
3168 case Intrinsic::experimental_vp_strided_store: {
3169 unsigned Opcode = Id == Intrinsic::experimental_vp_strided_load
3170 ? Instruction::Load
3171 : Instruction::Store;
3172 // For a target without strided memory operations (or for an illegal
3173 // operation type on one which does), assume we lower to a gather/scatter
3174 // operation. (Which may in turn be scalarized.)
3175 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3176 VariableMask, true, CostKind);
3177 }
3178 case Intrinsic::masked_scatter:
3179 case Intrinsic::masked_gather:
3180 case Intrinsic::vp_scatter:
3181 case Intrinsic::vp_gather: {
3182 unsigned Opcode = (MICA.getID() == Intrinsic::masked_gather ||
3183 MICA.getID() == Intrinsic::vp_gather)
3184 ? Instruction::Load
3185 : Instruction::Store;
3186
3187 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3188 VariableMask, true, CostKind);
3189 }
3190 case Intrinsic::vp_load:
3191 case Intrinsic::vp_store:
3193 case Intrinsic::masked_load:
3194 case Intrinsic::masked_store: {
3195 unsigned Opcode =
3196 Id == Intrinsic::masked_load ? Instruction::Load : Instruction::Store;
3197 // TODO: Pass on AddressSpace when we have test coverage.
3198 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
3199 CostKind);
3200 }
3201 case Intrinsic::masked_compressstore:
3202 case Intrinsic::masked_expandload: {
3203 unsigned Opcode = MICA.getID() == Intrinsic::masked_expandload
3204 ? Instruction::Load
3205 : Instruction::Store;
3206 // Treat expand load/compress store as gather/scatter operation.
3207 // TODO: implement more precise cost estimation for these intrinsics.
3208 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3209 VariableMask,
3210 /*IsGatherScatter*/ true, CostKind);
3211 }
3212 case Intrinsic::vp_load_ff:
3214 default:
3215 llvm_unreachable("unexpected intrinsic");
3216 }
3217 }
3218
3219 /// Compute a cost of the given call instruction.
3220 ///
3221 /// Compute the cost of calling function F with return type RetTy and
3222 /// argument types Tys. F might be nullptr, in this case the cost of an
3223 /// arbitrary call with the specified signature will be returned.
3224 /// This is used, for instance, when we estimate call of a vector
3225 /// counterpart of the given function.
3226 /// \param F Called function, might be nullptr.
3227 /// \param RetTy Return value types.
3228 /// \param Tys Argument types.
3229 /// \returns The cost of Call instruction.
3232 TTI::TargetCostKind CostKind) const override {
3233 return 10;
3234 }
3235
3236 unsigned getNumberOfParts(Type *Tp) const override {
3237 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
3238 if (!LT.first.isValid())
3239 return 0;
3240 // Try to find actual number of parts for non-power-of-2 elements as
3241 // ceil(num-of-elements/num-of-subtype-elements).
3242 if (auto *FTp = dyn_cast<FixedVectorType>(Tp);
3243 Tp && LT.second.isFixedLengthVector() &&
3244 !has_single_bit(FTp->getNumElements())) {
3245 if (auto *SubTp = dyn_cast_if_present<FixedVectorType>(
3246 EVT(LT.second).getTypeForEVT(Tp->getContext()));
3247 SubTp && SubTp->getElementType() == FTp->getElementType())
3248 return divideCeil(FTp->getNumElements(), SubTp->getNumElements());
3249 }
3250 return LT.first.getValue();
3251 }
3252
3255 TTI::TargetCostKind) const override {
3256 return 0;
3257 }
3258
3259 /// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
3260 /// We're assuming that reduction operation are performing the following way:
3261 ///
3262 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
3263 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
3264 /// \----------------v-------------/ \----------v------------/
3265 /// n/2 elements n/2 elements
3266 /// %red1 = op <n x t> %val, <n x t> val1
3267 /// After this operation we have a vector %red1 where only the first n/2
3268 /// elements are meaningful, the second n/2 elements are undefined and can be
3269 /// dropped. All other operations are actually working with the vector of
3270 /// length n/2, not n, though the real vector length is still n.
3271 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
3272 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
3273 /// \----------------v-------------/ \----------v------------/
3274 /// n/4 elements 3*n/4 elements
3275 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
3276 /// length n/2, the resulting vector has length n/4 etc.
3277 ///
3278 /// The cost model should take into account that the actual length of the
3279 /// vector is reduced on each iteration.
3282 // Targets must implement a default value for the scalable case, since
3283 // we don't know how many lanes the vector has.
3286
3287 Type *ScalarTy = Ty->getElementType();
3288 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3289 if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
3290 ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
3291 NumVecElts >= 2) {
3292 // Or reduction for i1 is represented as:
3293 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3294 // %res = cmp ne iReduxWidth %val, 0
3295 // And reduction for i1 is represented as:
3296 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3297 // %res = cmp eq iReduxWidth %val, 11111
3298 Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
3299 return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
3301 thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
3304 }
3305 unsigned NumReduxLevels = Log2_32(NumVecElts);
3306 InstructionCost ArithCost = 0;
3307 InstructionCost ShuffleCost = 0;
3308 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3309 unsigned LongVectorCount = 0;
3310 unsigned MVTLen =
3311 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3312 while (NumVecElts > MVTLen) {
3313 NumVecElts /= 2;
3314 VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3315 ShuffleCost += thisT()->getShuffleCost(
3316 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3317 ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
3318 Ty = SubTy;
3319 ++LongVectorCount;
3320 }
3321
3322 NumReduxLevels -= LongVectorCount;
3323
3324 // The minimal length of the vector is limited by the real length of vector
3325 // operations performed on the current platform. That's why several final
3326 // reduction operations are performed on the vectors with the same
3327 // architecture-dependent length.
3328
3329 // By default reductions need one shuffle per reduction level.
3330 ShuffleCost +=
3331 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3332 Ty, {}, CostKind, 0, Ty);
3333 ArithCost +=
3334 NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
3335 return ShuffleCost + ArithCost +
3336 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3337 CostKind, 0, nullptr, nullptr);
3338 }
3339
3340 /// Try to calculate the cost of performing strict (in-order) reductions,
3341 /// which involves doing a sequence of floating point additions in lane
3342 /// order, starting with an initial value. For example, consider a scalar
3343 /// initial value 'InitVal' of type float and a vector of type <4 x float>:
3344 ///
3345 /// Vector = <float %v0, float %v1, float %v2, float %v3>
3346 ///
3347 /// %add1 = %InitVal + %v0
3348 /// %add2 = %add1 + %v1
3349 /// %add3 = %add2 + %v2
3350 /// %add4 = %add3 + %v3
3351 ///
3352 /// As a simple estimate we can say the cost of such a reduction is 4 times
3353 /// the cost of a scalar FP addition. We can only estimate the costs for
3354 /// fixed-width vectors here because for scalable vectors we do not know the
3355 /// runtime number of operations.
3358 // Targets must implement a default value for the scalable case, since
3359 // we don't know how many lanes the vector has.
3362
3363 auto *VTy = cast<FixedVectorType>(Ty);
3365 VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
3366 InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
3367 Opcode, VTy->getElementType(), CostKind);
3368 ArithCost *= VTy->getNumElements();
3369
3370 return ExtractCost + ArithCost;
3371 }
3372
3375 std::optional<FastMathFlags> FMF,
3376 TTI::TargetCostKind CostKind) const override {
3377 assert(Ty && "Unknown reduction vector type");
3379 return getOrderedReductionCost(Opcode, Ty, CostKind);
3380 return getTreeReductionCost(Opcode, Ty, CostKind);
3381 }
3382
3383 /// Try to calculate op costs for min/max reduction operations.
3384 /// \param CondTy Conditional type for the Select instruction.
3387 TTI::TargetCostKind CostKind) const override {
3388 // Targets must implement a default value for the scalable case, since
3389 // we don't know how many lanes the vector has.
3392
3393 Type *ScalarTy = Ty->getElementType();
3394 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3395 unsigned NumReduxLevels = Log2_32(NumVecElts);
3396 InstructionCost MinMaxCost = 0;
3397 InstructionCost ShuffleCost = 0;
3398 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3399 unsigned LongVectorCount = 0;
3400 unsigned MVTLen =
3401 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3402 while (NumVecElts > MVTLen) {
3403 NumVecElts /= 2;
3404 auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3405
3406 ShuffleCost += thisT()->getShuffleCost(
3407 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3408
3409 IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
3410 MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
3411 Ty = SubTy;
3412 ++LongVectorCount;
3413 }
3414
3415 NumReduxLevels -= LongVectorCount;
3416
3417 // The minimal length of the vector is limited by the real length of vector
3418 // operations performed on the current platform. That's why several final
3419 // reduction opertions are perfomed on the vectors with the same
3420 // architecture-dependent length.
3421 ShuffleCost +=
3422 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3423 Ty, {}, CostKind, 0, Ty);
3424 IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
3425 MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
3426 // The last min/max should be in vector registers and we counted it above.
3427 // So just need a single extractelement.
3428 return ShuffleCost + MinMaxCost +
3429 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3430 CostKind, 0, nullptr, nullptr);
3431 }
3432
3434 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
3435 VectorType *Ty, std::optional<FastMathFlags> FMF,
3436 TTI::TargetCostKind CostKind) const override {
3437 if (auto *FTy = dyn_cast<FixedVectorType>(Ty);
3438 FTy && IsUnsigned && Opcode == Instruction::Add &&
3439 FTy->getElementType() == IntegerType::getInt1Ty(Ty->getContext())) {
3440 // Represent vector_reduce_add(ZExt(<n x i1>)) as
3441 // ZExtOrTrunc(ctpop(bitcast <n x i1> to in)).
3442 auto *IntTy =
3443 IntegerType::get(ResTy->getContext(), FTy->getNumElements());
3444 IntrinsicCostAttributes ICA(Intrinsic::ctpop, IntTy, {IntTy},
3445 FMF ? *FMF : FastMathFlags());
3446 return thisT()->getCastInstrCost(Instruction::BitCast, IntTy, FTy,
3448 thisT()->getIntrinsicInstrCost(ICA, CostKind);
3449 }
3450 // Without any native support, this is equivalent to the cost of
3451 // vecreduce.opcode(ext(Ty A)).
3452 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3453 InstructionCost RedCost =
3454 thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
3455 InstructionCost ExtCost = thisT()->getCastInstrCost(
3456 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3458
3459 return RedCost + ExtCost;
3460 }
3461
3463 getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy,
3464 VectorType *Ty,
3465 TTI::TargetCostKind CostKind) const override {
3466 // Without any native support, this is equivalent to the cost of
3467 // vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
3468 // vecreduce.add(mul(A, B)).
3469 assert((RedOpcode == Instruction::Add || RedOpcode == Instruction::Sub) &&
3470 "The reduction opcode is expected to be Add or Sub.");
3471 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3472 InstructionCost RedCost = thisT()->getArithmeticReductionCost(
3473 RedOpcode, ExtTy, std::nullopt, CostKind);
3474 InstructionCost ExtCost = thisT()->getCastInstrCost(
3475 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3477
3478 InstructionCost MulCost =
3479 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
3480
3481 return RedCost + MulCost + 2 * ExtCost;
3482 }
3483
3485 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
3487 TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
3489 std::optional<FastMathFlags> FMF) const override {
3490 unsigned EltSizeAcc = AccumType->getScalarSizeInBits();
3491 unsigned EltSizeInA = InputTypeA->getScalarSizeInBits();
3492 unsigned Ratio = EltSizeAcc / EltSizeInA;
3493 if (VF.getKnownMinValue() <= Ratio || VF.getKnownMinValue() % Ratio != 0 ||
3494 EltSizeAcc % EltSizeInA != 0 || (BinOp && InputTypeA != InputTypeB))
3496
3497 Type *InputVectorType = VectorType::get(InputTypeA, VF);
3498 Type *ExtInputVectorType = VectorType::get(AccumType, VF);
3499 Type *AccumVectorType =
3500 VectorType::get(AccumType, VF.divideCoefficientBy(Ratio));
3501
3502 InstructionCost ExtendCostA = 0;
3504 ExtendCostA = getCastInstrCost(
3506 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3507 CostKind);
3508
3509 // TODO: add cost of extracting subvectors from the source vector that
3510 // is to be partially reduced.
3511 InstructionCost ReductionOpCost =
3512 Ratio * getArithmeticInstrCost(Opcode, AccumVectorType, CostKind);
3513
3514 if (!BinOp)
3515 return ExtendCostA + ReductionOpCost;
3516
3517 InstructionCost ExtendCostB = 0;
3519 ExtendCostB = getCastInstrCost(
3521 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3522 CostKind);
3523 return ExtendCostA + ExtendCostB + ReductionOpCost +
3524 getArithmeticInstrCost(*BinOp, ExtInputVectorType, CostKind);
3525 }
3526
3528
3529 /// @}
3530};
3531
3532/// Concrete BasicTTIImpl that can be used if no further customization
3533/// is needed.
3534class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
3535 using BaseT = BasicTTIImplBase<BasicTTIImpl>;
3536
3537 friend class BasicTTIImplBase<BasicTTIImpl>;
3538
3539 const TargetSubtargetInfo *ST;
3540 const TargetLoweringBase *TLI;
3541
3542 const TargetSubtargetInfo *getST() const { return ST; }
3543 const TargetLoweringBase *getTLI() const { return TLI; }
3544
3545public:
3546 explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
3547};
3548
3549} // end namespace llvm
3550
3551#endif // LLVM_CODEGEN_BASICTTIIMPL_H
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
#define X(NUM, ENUM, NAME)
Definition ELF.h:851
This file implements the BitVector class.
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
static const Function * getCalledFunction(const Value *V)
#define T
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
uint64_t IntrinsicInst * II
#define P(N)
static unsigned getNumElements(Type *Ty)
static Type * getValueType(Value *V, bool LookThroughCmp=false)
Returns the "element type" of the given value/instruction V.
This file contains some templates that are useful if you are working with the STL at all.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Definition TapiFile.cpp:39
This file describes how to lower LLVM code to machine code.
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition APInt.h:78
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition APInt.h:235
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition APInt.h:1353
bool sgt(const APInt &RHS) const
Signed greater than comparison.
Definition APInt.h:1208
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition APInt.h:1511
bool slt(const APInt &RHS) const
Signed less than comparison.
Definition APInt.h:1137
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition APInt.h:201
an instruction to allocate memory on the stack
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
ArrayRef< T > drop_front(size_t N=1) const
Drop the first N elements of the array.
Definition ArrayRef.h:195
size_t size() const
size - Get the array size.
Definition ArrayRef.h:142
ArrayRef< T > drop_back(size_t N=1) const
Drop the last N elements of the array.
Definition ArrayRef.h:201
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition BasicBlock.h:62
InstructionCost getFPOpCost(Type *Ty) const override
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const override
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
Try to calculate op costs for min/max reduction operations.
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const override
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override
bool shouldBuildLookupTables() const override
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isProfitableToHoist(Instruction *I) const override
unsigned getNumberOfParts(Type *Tp) const override
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
bool useAA() const override
unsigned getPrefetchDistance() const override
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *SrcTy, int &Index, VectorType *&SubTy) const
InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction's operands.
bool isLegalAddScalableImmediate(int64_t Imm) const override
unsigned getAssumedAddrSpace(const Value *V) const override
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const override
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0) const override
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override
bool areInlineCompatible(const Function *Caller, const Function *Callee) const override
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override
bool haveFastSqrt(Type *Ty) const override
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const override
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const override
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy, Align Alignment, unsigned AddrSpace) const override
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const override
unsigned adjustInliningThreshold(const CallBase *CB) const override
unsigned getInliningThresholdMultiplier() const override
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset)
bool shouldBuildRelLookupTables() const override
bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const override
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
unsigned getEpilogueVectorizationMinVF() const override
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorSplitCost() const
bool isTruncateFree(Type *Ty1, Type *Ty2) const override
std::optional< unsigned > getMaxVScale() const override
unsigned getFlatAddressSpace() const override
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Compute a cost of the given call instruction.
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
~BasicTTIImplBase() override=default
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
unsigned getMaxPrefetchIterationsAhead() const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
InstructionCost getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Get intrinsic cost based on argument types.
bool hasBranchDivergence(const Function *F=nullptr) const override
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence...
std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const override
bool shouldPrefetchAddressSpace(unsigned AS) const override
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const override
unsigned getCacheLineSize() const override
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override
bool shouldDropLSRSolutionIfLessProfitable() const override
int getInlinerVectorBonusPercent() const override
InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const override
InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
std::pair< InstructionCost, MVT > getTypeLegalizationCost(Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, TTI::PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind, std::optional< FastMathFlags > FMF) const override
bool isLegalAddImmediate(int64_t imm) const override
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const override
unsigned getMaxInterleaveFactor(ElementCount VF) const override
bool isSingleThreaded() const override
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
bool isProfitableLSRChainElement(Instruction *I) const override
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const override
bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const override
std::optional< unsigned > getVScaleForTuning() const override
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
Get intrinsic cost based on arguments.
bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const override
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *, const SCEV *, TTI::TargetCostKind) const override
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override
InstructionCost getScalarizationOverhead(VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy...
TailFoldingStyle getPreferredTailFoldingStyle() const override
std::optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const override
bool isLegalICmpImmediate(int64_t imm) const override
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override
unsigned getRegUsageForType(Type *Ty) const override
InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
Get memory intrinsic cost based on arguments.
BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
bool isTypeLegal(Type *Ty) const override
bool enableWritePrefetching() const override
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const override
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
bool isNumRegsMajorCostOfLSR() const override
BasicTTIImpl(const TargetMachine *TM, const Function &F)
size_type count() const
count - Returns the number of bits which are set.
Definition BitVector.h:181
BitVector & set()
Definition BitVector.h:370
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Definition InstrTypes.h:986
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition InstrTypes.h:676
@ ICMP_SLE
signed less or equal
Definition InstrTypes.h:706
@ ICMP_UGT
unsigned greater than
Definition InstrTypes.h:699
@ ICMP_SGT
signed greater than
Definition InstrTypes.h:703
@ ICMP_ULT
unsigned less than
Definition InstrTypes.h:701
@ ICMP_NE
not equal
Definition InstrTypes.h:698
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition InstrTypes.h:686
static CmpInst::Predicate getGTPredicate(Intrinsic::ID ID)
static CmpInst::Predicate getLTPredicate(Intrinsic::ID ID)
This class represents a range of values.
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:64
constexpr bool isVector() const
One or more elements.
Definition TypeSize.h:324
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition TypeSize.h:309
constexpr bool isScalar() const
Exactly one element.
Definition TypeSize.h:320
Convenience struct for specifying and reasoning about fast-math flags.
Definition FMF.h:23
Container class for subtarget features.
Class to represent fixed width SIMD vectors.
unsigned getNumElements() const
static LLVM_ABI FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition Type.cpp:873
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition Function.h:354
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
static LLVM_ABI IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition Type.cpp:354
const SmallVectorImpl< Type * > & getArgTypes() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
Represents a single loop in the control flow graph.
Definition LoopInfo.h:40
const FeatureBitset & getFeatureBits() const
Machine Value Type.
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
Information for memory intrinsic cost model.
The optimization diagnostic interface.
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for applied optimization remarks.
static LLVM_ABI PointerType * get(Type *ElementType, unsigned AddressSpace)
This constructs a pointer to an object of the specified type in a numbered address space.
Analysis providing profile information.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
static LLVM_ABI bool isZeroEltSplatMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses all elements with the same value as the first element of exa...
static LLVM_ABI bool isSpliceMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is a splice mask, concatenating the two inputs together and then ext...
static LLVM_ABI bool isSelectMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses elements from its source vectors without lane crossings.
static LLVM_ABI bool isExtractSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is an extract subvector mask.
static LLVM_ABI bool isReverseMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask swaps the order of elements from exactly one source vector.
static LLVM_ABI bool isTransposeMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask is a transpose mask.
static LLVM_ABI bool isInsertSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &NumSubElts, int &Index)
Return true if this shuffle mask is an insert subvector mask.
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
static StackOffset getScalable(int64_t Scalable)
Definition TypeSize.h:40
static StackOffset getFixed(int64_t Fixed)
Definition TypeSize.h:39
static LLVM_ABI StructType * create(LLVMContext &Context, StringRef Name)
This creates an identified struct.
Definition Type.cpp:689
Multiway switch.
Provides information about what library functions are available for the current target.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
bool isOperationExpand(unsigned Op, EVT VT) const
Return true if the specified operation is illegal on this target or unlikely to be made legal with cu...
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
LegalizeAction
This enum indicates whether operations are valid for a target, and if not, what action should be used...
virtual bool preferSelectsOverBooleanArithmetic(EVT VT) const
Should we prefer selects to doing arithmetic on boolean types.
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases, uint64_t Range, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Return true if lowering to a jump table is suitable for a set of case clusters which may contain NumC...
virtual bool areJTsAllowed(const Function *Fn) const
Return true if lowering to a jump table is allowed.
bool isOperationLegalOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal using promotion.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace) const
Return how this store with truncation should be treated: either it is legal, needs to be promoted to ...
bool isOperationCustom(unsigned Op, EVT VT) const
Return true if the operation uses custom lowering, regardless of whether the type is legal or not.
bool isSuitableForBitTests(const DenseMap< const BasicBlock *, unsigned int > &DestCmps, const APInt &Low, const APInt &High, const DataLayout &DL) const
Return true if lowering to a bit test is suitable for a set of case clusters which contains NumDests ...
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
LegalizeAction getLoadAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return how this load with extension should be treated: either it is legal, needs to be promoted to a ...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
bool isLoadLegal(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return true if the specified load with extension is legal on this target.
virtual bool isFAbsFree(EVT VT) const
Return true if an fabs operation is free to the point where it is never worthwhile to replace it with...
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
std::pair< LegalizeTypeAction, EVT > LegalizeKind
LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.
Primary interface to the complete machine description for the target machine.
bool isPositionIndependent() const
const Triple & getTargetTriple() const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
CodeModel::Model getCodeModel() const
Returns the code model.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual bool isProfitableLSRChainElement(Instruction *I) const
virtual TailFoldingStyle getPreferredTailFoldingStyle() const
virtual const DataLayout & getDataLayout() const
virtual std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
virtual std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
virtual bool shouldDropLSRSolutionIfLessProfitable() const
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
virtual std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
virtual bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const
virtual std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
virtual unsigned getEpilogueVectorizationMinVF() const
virtual InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
virtual bool isLoweredToCall(const Function *F) const
virtual InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
virtual InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
virtual bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
virtual InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info, const Instruction *I) const
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
VectorInstrContext
Represents a hint about the context in which an insert/extract is used.
@ None
The insert/extract is not used with a load/store.
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Basic
The cost of a typical 'add' instruction.
static LLVM_ABI Instruction::CastOps getOpcodeForPartialReductionExtendKind(PartialReductionExtendKind Kind)
Get the cast opcode for an extension kind.
MemIndexedMode
The type of load/store indexing.
static VectorInstrContext getVectorInstrContextHint(const Instruction *I)
Calculates a VectorInstrContext from I.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
CastContextHint
Represents a hint about the context in which a cast is used.
@ Normal
The cast is used with a normal load/store.
CacheLevel
The possible cache levels.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:47
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition Triple.h:429
LLVM_ABI bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition Triple.cpp:2029
bool isOSDarwin() const
Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, DriverKit, XROS, or bridgeOS).
Definition Triple.h:638
static constexpr TypeSize getFixed(ScalarTy ExactSize)
Definition TypeSize.h:343
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:46
bool isVectorTy() const
True if this is an instance of VectorType.
Definition Type.h:290
bool isPointerTy() const
True if this is an instance of PointerType.
Definition Type.h:284
LLVM_ABI unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
static LLVM_ABI IntegerType * getInt8Ty(LLVMContext &C)
Definition Type.cpp:311
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition Type.h:370
LLVM_ABI Type * getWithNewBitWidth(unsigned NewBitWidth) const
Given an integer or vector type, change the lane bitwidth to NewBitwidth, whilst keeping the old numb...
LLVM_ABI Type * getWithNewType(Type *EltTy) const
Given vector type, change the element type, whilst keeping the old number of elements.
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition Type.h:130
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition Type.cpp:236
static LLVM_ABI IntegerType * getInt1Ty(LLVMContext &C)
Definition Type.cpp:310
static LLVM_ABI IntegerType * getIntNTy(LLVMContext &C, unsigned N)
Definition Type.cpp:317
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition Type.h:227
Type * getContainedType(unsigned i) const
This method is used to implement the type iterator (defined at the end of the file).
Definition Type.h:399
bool isVoidTy() const
Return true if this is 'void'.
Definition Type.h:141
Value * getOperand(unsigned i) const
Definition User.h:207
static LLVM_ABI bool isVPBinOp(Intrinsic::ID ID)
static LLVM_ABI bool isVPCast(Intrinsic::ID ID)
static LLVM_ABI bool isVPCmp(Intrinsic::ID ID)
static LLVM_ABI std::optional< unsigned > getFunctionalOpcodeForVP(Intrinsic::ID ID)
static LLVM_ABI std::optional< Intrinsic::ID > getFunctionalIntrinsicIDForVP(Intrinsic::ID ID)
static LLVM_ABI bool isVPIntrinsic(Intrinsic::ID)
static LLVM_ABI bool isVPReduction(Intrinsic::ID ID)
LLVM Value Representation.
Definition Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition Value.h:255
Base class of all SIMD vector types.
static VectorType * getHalfElementsVectorType(VectorType *VTy)
This static method returns a VectorType with half as many elements as the input type and the same ele...
static LLVM_ABI VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Type * getElementType() const
constexpr ScalarTy getFixedValue() const
Definition TypeSize.h:200
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition TypeSize.h:216
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition TypeSize.h:168
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition TypeSize.h:165
constexpr LeafTy divideCoefficientBy(ScalarTy RHS) const
We do not provide the '/' operator here because division for polynomial types does not work in the sa...
Definition TypeSize.h:252
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
LLVM_ABI APInt ScaleBitMask(const APInt &A, unsigned NewBitWidth, bool MatchAllBits=false)
Splat/Merge neighboring bits to widen/narrow the bitmask represented by.
Definition APInt.cpp:3060
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition CallingConv.h:24
@ Fast
Attempts to make calls as fast as possible (e.g.
Definition CallingConv.h:41
@ C
The default llvm calling convention, compatible with C.
Definition CallingConv.h:34
ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types a...
Definition ISDOpcodes.h:24
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:779
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:394
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:518
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:417
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:747
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:774
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:352
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:541
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:374
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:796
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:348
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:356
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:727
@ MASKED_UDIV
Masked vector arithmetic that returns poison on disabled lanes.
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:805
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:735
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:945
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:534
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:365
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI bool isTargetIntrinsic(ID IID)
isTargetIntrinsic - Returns true if IID is an intrinsic specific to a certain target.
LLVM_ABI Libcall getSINCOSPI(EVT RetVT)
getSINCOSPI - Return the SINCOSPI_* value for the given types, or UNKNOWN_LIBCALL if there is none.
LLVM_ABI Libcall getMODF(EVT VT)
getMODF - Return the MODF_* value for the given types, or UNKNOWN_LIBCALL if there is none.
LLVM_ABI Libcall getSINCOS(EVT RetVT)
getSINCOS - Return the SINCOS_* value for the given types, or UNKNOWN_LIBCALL if there is none.
DiagnosticInfoOptimizationBase::Argument NV
friend class Instruction
Iterator for Instructions in a `BasicBlock.
Definition BasicBlock.h:73
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1739
LLVM_ABI Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
detail::zippy< detail::zip_first, T, U, Args... > zip_equal(T &&t, U &&u, Args &&...args)
zip iterator that assumes that all iteratees have the same length.
Definition STLExtras.h:841
InstructionCost Cost
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
Definition STLExtras.h:2554
Type * toScalarizedTy(Type *Ty)
A helper for converting vectorized types to scalarized (non-vector) types.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Definition Casting.h:732
LLVM_ABI unsigned getArithmeticReductionInstruction(Intrinsic::ID RdxID)
Returns the arithmetic instruction opcode used when expanding a reduction.
bool isVectorizedTy(Type *Ty)
Returns true if Ty is a vector type or a struct of vector types where all vector types share the same...
detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)
Returns a concatenated range across two or more ranges.
Definition STLExtras.h:1152
auto dyn_cast_or_null(const Y &Val)
Definition Casting.h:753
constexpr bool has_single_bit(T Value) noexcept
Definition bit.h:149
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1746
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition MathExtras.h:331
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition MathExtras.h:279
ElementCount getVectorizedTypeVF(Type *Ty)
Returns the number of vector elements for a vectorized type.
LLVM_ABI ConstantRange getVScaleRange(const Function *F, unsigned BitWidth)
Determine the possible constant range of vscale with the given bit width, based on the vscale_range f...
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
constexpr int PoisonMaskElem
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition MathExtras.h:394
FunctionAddr VTableAddr uintptr_t uintptr_t Data
Definition InstrProf.h:221
@ UMin
Unsigned integer min implemented in terms of select(cmp()).
@ UMax
Unsigned integer max implemented in terms of select(cmp()).
DWARFExpression::Operation Op
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
ArrayRef< Type * > getContainedTypes(Type *const &Ty)
Returns the types contained in Ty.
cl::opt< unsigned > PartialUnrollingThreshold
LLVM_ABI bool isVectorizedStructTy(StructType *StructTy)
Returns true if StructTy is an unpacked literal struct where all elements are vectors of matching ele...
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
Extended Value Type.
Definition ValueTypes.h:35
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
Definition ValueTypes.h:145
ElementCount getVectorElementCount() const
Definition ValueTypes.h:358
static LLVM_ABI EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition ValueTypes.h:324
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition ValueTypes.h:61
LLVM_ABI Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Attributes of a target dependent hardware loop.
static bool hasVectorMaskArgument(RTLIB::LibcallImpl Impl)
Returns true if the function has a vector mask argument, which is assumed to be the last argument.
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + ScalableOffset*...
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Parameters that control the generic loop unrolling transformation.
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).