LLVM  15.0.0git
TargetTransformInfoImpl.h
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1 //===- TargetTransformInfoImpl.h --------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file provides helpers for the implementation of
10 /// a TargetTransformInfo-conforming class.
11 ///
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
15 #define LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
16 
20 #include "llvm/IR/DataLayout.h"
22 #include "llvm/IR/IntrinsicInst.h"
23 #include "llvm/IR/Operator.h"
24 #include "llvm/IR/PatternMatch.h"
25 #include <utility>
26 
27 namespace llvm {
28 
29 class Function;
30 
31 /// Base class for use as a mix-in that aids implementing
32 /// a TargetTransformInfo-compatible class.
34 protected:
36 
37  const DataLayout &DL;
38 
40 
41 public:
42  // Provide value semantics. MSVC requires that we spell all of these out.
45 
46  const DataLayout &getDataLayout() const { return DL; }
47 
48  InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
51  // In the basic model, we just assume that all-constant GEPs will be folded
52  // into their uses via addressing modes.
53  for (unsigned Idx = 0, Size = Operands.size(); Idx != Size; ++Idx)
54  if (!isa<Constant>(Operands[Idx]))
55  return TTI::TCC_Basic;
56 
57  return TTI::TCC_Free;
58  }
59 
61  unsigned &JTSize,
62  ProfileSummaryInfo *PSI,
63  BlockFrequencyInfo *BFI) const {
64  (void)PSI;
65  (void)BFI;
66  JTSize = 0;
67  return SI.getNumCases();
68  }
69 
70  unsigned getInliningThresholdMultiplier() const { return 1; }
71  unsigned adjustInliningThreshold(const CallBase *CB) const { return 0; }
72 
73  int getInlinerVectorBonusPercent() const { return 150; }
74 
76  return TTI::TCC_Expensive;
77  }
78 
79  // Although this default value is arbitrary, it is not random. It is assumed
80  // that a condition that evaluates the same way by a higher percentage than
81  // this is best represented as control flow. Therefore, the default value N
82  // should be set such that the win from N% correct executions is greater than
83  // the loss from (100 - N)% mispredicted executions for the majority of
84  // intended targets.
86  return BranchProbability(99, 100);
87  }
88 
89  bool hasBranchDivergence() const { return false; }
90 
91  bool useGPUDivergenceAnalysis() const { return false; }
92 
93  bool isSourceOfDivergence(const Value *V) const { return false; }
94 
95  bool isAlwaysUniform(const Value *V) const { return false; }
96 
97  unsigned getFlatAddressSpace() const { return -1; }
98 
100  Intrinsic::ID IID) const {
101  return false;
102  }
103 
104  bool isNoopAddrSpaceCast(unsigned, unsigned) const { return false; }
106  return AS == 0;
107  };
108 
109  unsigned getAssumedAddrSpace(const Value *V) const { return -1; }
110 
111  std::pair<const Value *, unsigned>
112  getPredicatedAddrSpace(const Value *V) const {
113  return std::make_pair(nullptr, -1);
114  }
115 
117  Value *NewV) const {
118  return nullptr;
119  }
120 
121  bool isLoweredToCall(const Function *F) const {
122  assert(F && "A concrete function must be provided to this routine.");
123 
124  // FIXME: These should almost certainly not be handled here, and instead
125  // handled with the help of TLI or the target itself. This was largely
126  // ported from existing analysis heuristics here so that such refactorings
127  // can take place in the future.
128 
129  if (F->isIntrinsic())
130  return false;
131 
132  if (F->hasLocalLinkage() || !F->hasName())
133  return true;
134 
135  StringRef Name = F->getName();
136 
137  // These will all likely lower to a single selection DAG node.
138  if (Name == "copysign" || Name == "copysignf" || Name == "copysignl" ||
139  Name == "fabs" || Name == "fabsf" || Name == "fabsl" || Name == "sin" ||
140  Name == "fmin" || Name == "fminf" || Name == "fminl" ||
141  Name == "fmax" || Name == "fmaxf" || Name == "fmaxl" ||
142  Name == "sinf" || Name == "sinl" || Name == "cos" || Name == "cosf" ||
143  Name == "cosl" || Name == "sqrt" || Name == "sqrtf" || Name == "sqrtl")
144  return false;
145 
146  // These are all likely to be optimized into something smaller.
147  if (Name == "pow" || Name == "powf" || Name == "powl" || Name == "exp2" ||
148  Name == "exp2l" || Name == "exp2f" || Name == "floor" ||
149  Name == "floorf" || Name == "ceil" || Name == "round" ||
150  Name == "ffs" || Name == "ffsl" || Name == "abs" || Name == "labs" ||
151  Name == "llabs")
152  return false;
153 
154  return true;
155  }
156 
158  AssumptionCache &AC, TargetLibraryInfo *LibInfo,
159  HardwareLoopInfo &HWLoopInfo) const {
160  return false;
161  }
162 
165  DominatorTree *DT,
166  const LoopAccessInfo *LAI) const {
167  return false;
168  }
169 
170  bool emitGetActiveLaneMask() const {
171  return false;
172  }
173 
175  IntrinsicInst &II) const {
176  return None;
177  }
178 
181  APInt DemandedMask, KnownBits &Known,
182  bool &KnownBitsComputed) const {
183  return None;
184  }
185 
187  InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
188  APInt &UndefElts2, APInt &UndefElts3,
189  std::function<void(Instruction *, unsigned, APInt, APInt &)>
190  SimplifyAndSetOp) const {
191  return None;
192  }
193 
196  OptimizationRemarkEmitter *) const {}
197 
199  TTI::PeelingPreferences &) const {}
200 
201  bool isLegalAddImmediate(int64_t Imm) const { return false; }
202 
203  bool isLegalICmpImmediate(int64_t Imm) const { return false; }
204 
205  bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
206  bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
207  Instruction *I = nullptr) const {
208  // Guess that only reg and reg+reg addressing is allowed. This heuristic is
209  // taken from the implementation of LSR.
210  return !BaseGV && BaseOffset == 0 && (Scale == 0 || Scale == 1);
211  }
212 
214  return std::tie(C1.NumRegs, C1.AddRecCost, C1.NumIVMuls, C1.NumBaseAdds,
215  C1.ScaleCost, C1.ImmCost, C1.SetupCost) <
216  std::tie(C2.NumRegs, C2.AddRecCost, C2.NumIVMuls, C2.NumBaseAdds,
217  C2.ScaleCost, C2.ImmCost, C2.SetupCost);
218  }
219 
220  bool isNumRegsMajorCostOfLSR() const { return true; }
221 
222  bool isProfitableLSRChainElement(Instruction *I) const { return false; }
223 
224  bool canMacroFuseCmp() const { return false; }
225 
228  TargetLibraryInfo *LibInfo) const {
229  return false;
230  }
231 
234  return TTI::AMK_None;
235  }
236 
237  bool isLegalMaskedStore(Type *DataType, Align Alignment) const {
238  return false;
239  }
240 
241  bool isLegalMaskedLoad(Type *DataType, Align Alignment) const {
242  return false;
243  }
244 
245  bool isLegalNTStore(Type *DataType, Align Alignment) const {
246  // By default, assume nontemporal memory stores are available for stores
247  // that are aligned and have a size that is a power of 2.
248  unsigned DataSize = DL.getTypeStoreSize(DataType);
249  return Alignment >= DataSize && isPowerOf2_32(DataSize);
250  }
251 
252  bool isLegalNTLoad(Type *DataType, Align Alignment) const {
253  // By default, assume nontemporal memory loads are available for loads that
254  // are aligned and have a size that is a power of 2.
255  unsigned DataSize = DL.getTypeStoreSize(DataType);
256  return Alignment >= DataSize && isPowerOf2_32(DataSize);
257  }
258 
259  bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const {
260  return false;
261  }
262 
263  bool isLegalMaskedScatter(Type *DataType, Align Alignment) const {
264  return false;
265  }
266 
267  bool isLegalMaskedGather(Type *DataType, Align Alignment) const {
268  return false;
269  }
270 
271  bool forceScalarizeMaskedGather(VectorType *DataType, Align Alignment) const {
272  return false;
273  }
274 
276  Align Alignment) const {
277  return false;
278  }
279 
280  bool isLegalMaskedCompressStore(Type *DataType) const { return false; }
281 
282  bool isLegalMaskedExpandLoad(Type *DataType) const { return false; }
283 
284  bool enableOrderedReductions() const { return false; }
285 
286  bool hasDivRemOp(Type *DataType, bool IsSigned) const { return false; }
287 
288  bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const {
289  return false;
290  }
291 
292  bool prefersVectorizedAddressing() const { return true; }
293 
295  int64_t BaseOffset, bool HasBaseReg,
296  int64_t Scale,
297  unsigned AddrSpace) const {
298  // Guess that all legal addressing mode are free.
299  if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
300  AddrSpace))
301  return 0;
302  return -1;
303  }
304 
305  bool LSRWithInstrQueries() const { return false; }
306 
307  bool isTruncateFree(Type *Ty1, Type *Ty2) const { return false; }
308 
309  bool isProfitableToHoist(Instruction *I) const { return true; }
310 
311  bool useAA() const { return false; }
312 
313  bool isTypeLegal(Type *Ty) const { return false; }
314 
315  InstructionCost getRegUsageForType(Type *Ty) const { return 1; }
316 
317  bool shouldBuildLookupTables() const { return true; }
318 
319  bool shouldBuildLookupTablesForConstant(Constant *C) const { return true; }
320 
321  bool shouldBuildRelLookupTables() const { return false; }
322 
323  bool useColdCCForColdCall(Function &F) const { return false; }
324 
326  const APInt &DemandedElts,
327  bool Insert, bool Extract) const {
328  return 0;
329  }
330 
332  ArrayRef<Type *> Tys) const {
333  return 0;
334  }
335 
336  bool supportsEfficientVectorElementLoadStore() const { return false; }
337 
338  bool enableAggressiveInterleaving(bool LoopHasReductions) const {
339  return false;
340  }
341 
343  bool IsZeroCmp) const {
344  return {};
345  }
346 
347  bool enableInterleavedAccessVectorization() const { return false; }
348 
349  bool enableMaskedInterleavedAccessVectorization() const { return false; }
350 
351  bool isFPVectorizationPotentiallyUnsafe() const { return false; }
352 
354  unsigned AddressSpace, Align Alignment,
355  bool *Fast) const {
356  return false;
357  }
358 
359  TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const {
360  return TTI::PSK_Software;
361  }
362 
363  bool haveFastSqrt(Type *Ty) const { return false; }
364 
365  bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { return true; }
366 
369  }
370 
371  InstructionCost getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx,
372  const APInt &Imm, Type *Ty) const {
373  return 0;
374  }
375 
378  return TTI::TCC_Basic;
379  }
380 
381  InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx,
382  const APInt &Imm, Type *Ty,
384  Instruction *Inst = nullptr) const {
385  return TTI::TCC_Free;
386  }
387 
389  const APInt &Imm, Type *Ty,
391  return TTI::TCC_Free;
392  }
393 
394  unsigned getNumberOfRegisters(unsigned ClassID) const { return 8; }
395 
396  unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const {
397  return Vector ? 1 : 0;
398  };
399 
400  const char *getRegisterClassName(unsigned ClassID) const {
401  switch (ClassID) {
402  default:
403  return "Generic::Unknown Register Class";
404  case 0:
405  return "Generic::ScalarRC";
406  case 1:
407  return "Generic::VectorRC";
408  }
409  }
410 
412  return TypeSize::getFixed(32);
413  }
414 
415  unsigned getMinVectorRegisterBitWidth() const { return 128; }
416 
419 
420  bool shouldMaximizeVectorBandwidth() const { return false; }
421 
422  ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const {
423  return ElementCount::get(0, IsScalable);
424  }
425 
426  unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const { return 0; }
427  unsigned getStoreMinimumVF(unsigned VF, Type *, Type *) const { return VF; }
428 
430  const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
431  AllowPromotionWithoutCommonHeader = false;
432  return false;
433  }
434 
435  unsigned getCacheLineSize() const { return 0; }
436 
439  switch (Level) {
443  return llvm::Optional<unsigned>();
444  }
445  llvm_unreachable("Unknown TargetTransformInfo::CacheLevel");
446  }
447 
450  switch (Level) {
454  return llvm::Optional<unsigned>();
455  }
456 
457  llvm_unreachable("Unknown TargetTransformInfo::CacheLevel");
458  }
459 
460  unsigned getPrefetchDistance() const { return 0; }
461  unsigned getMinPrefetchStride(unsigned NumMemAccesses,
462  unsigned NumStridedMemAccesses,
463  unsigned NumPrefetches, bool HasCall) const {
464  return 1;
465  }
466  unsigned getMaxPrefetchIterationsAhead() const { return UINT_MAX; }
467  bool enableWritePrefetching() const { return false; }
468 
469  unsigned getMaxInterleaveFactor(unsigned VF) const { return 1; }
470 
472  unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
473  TTI::OperandValueKind Opd1Info, TTI::OperandValueKind Opd2Info,
474  TTI::OperandValueProperties Opd1PropInfo,
476  const Instruction *CxtI = nullptr) const {
477  // FIXME: A number of transformation tests seem to require these values
478  // which seems a little odd for how arbitary there are.
479  switch (Opcode) {
480  default:
481  break;
482  case Instruction::FDiv:
483  case Instruction::FRem:
484  case Instruction::SDiv:
485  case Instruction::SRem:
486  case Instruction::UDiv:
487  case Instruction::URem:
488  // FIXME: Unlikely to be true for CodeSize.
489  return TTI::TCC_Expensive;
490  }
491  return 1;
492  }
493 
495  ArrayRef<int> Mask, int Index,
496  VectorType *SubTp,
498  return 1;
499  }
500 
501  InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
504  const Instruction *I) const {
505  switch (Opcode) {
506  default:
507  break;
508  case Instruction::IntToPtr: {
509  unsigned SrcSize = Src->getScalarSizeInBits();
510  if (DL.isLegalInteger(SrcSize) &&
511  SrcSize <= DL.getPointerTypeSizeInBits(Dst))
512  return 0;
513  break;
514  }
515  case Instruction::PtrToInt: {
516  unsigned DstSize = Dst->getScalarSizeInBits();
517  if (DL.isLegalInteger(DstSize) &&
518  DstSize >= DL.getPointerTypeSizeInBits(Src))
519  return 0;
520  break;
521  }
522  case Instruction::BitCast:
523  if (Dst == Src || (Dst->isPointerTy() && Src->isPointerTy()))
524  // Identity and pointer-to-pointer casts are free.
525  return 0;
526  break;
527  case Instruction::Trunc: {
528  // trunc to a native type is free (assuming the target has compare and
529  // shift-right of the same width).
530  TypeSize DstSize = DL.getTypeSizeInBits(Dst);
531  if (!DstSize.isScalable() && DL.isLegalInteger(DstSize.getFixedSize()))
532  return 0;
533  break;
534  }
535  }
536  return 1;
537  }
538 
540  VectorType *VecTy,
541  unsigned Index) const {
542  return 1;
543  }
544 
546  const Instruction *I = nullptr) const {
547  // A phi would be free, unless we're costing the throughput because it
548  // will require a register.
549  if (Opcode == Instruction::PHI && CostKind != TTI::TCK_RecipThroughput)
550  return 0;
551  return 1;
552  }
553 
554  InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
555  CmpInst::Predicate VecPred,
557  const Instruction *I) const {
558  return 1;
559  }
560 
561  InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
562  unsigned Index) const {
563  return 1;
564  }
565 
566  unsigned getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
567  const APInt &DemandedDstElts,
569  return 1;
570  }
571 
572  InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
573  unsigned AddressSpace,
575  const Instruction *I) const {
576  return 1;
577  }
578 
579  InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
580  unsigned AddressSpace,
582  const Instruction *I) const {
583  return 1;
584  }
585 
587  Align Alignment, unsigned AddressSpace,
589  return 1;
590  }
591 
592  InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
593  const Value *Ptr, bool VariableMask,
594  Align Alignment,
596  const Instruction *I = nullptr) const {
597  return 1;
598  }
599 
601  unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
602  Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
603  bool UseMaskForCond, bool UseMaskForGaps) const {
604  return 1;
605  }
606 
609  switch (ICA.getID()) {
610  default:
611  break;
612  case Intrinsic::annotation:
613  case Intrinsic::assume:
614  case Intrinsic::sideeffect:
615  case Intrinsic::pseudoprobe:
616  case Intrinsic::arithmetic_fence:
617  case Intrinsic::dbg_declare:
618  case Intrinsic::dbg_value:
619  case Intrinsic::dbg_label:
620  case Intrinsic::invariant_start:
621  case Intrinsic::invariant_end:
622  case Intrinsic::launder_invariant_group:
623  case Intrinsic::strip_invariant_group:
624  case Intrinsic::is_constant:
625  case Intrinsic::lifetime_start:
626  case Intrinsic::lifetime_end:
627  case Intrinsic::experimental_noalias_scope_decl:
628  case Intrinsic::objectsize:
629  case Intrinsic::ptr_annotation:
630  case Intrinsic::var_annotation:
631  case Intrinsic::experimental_gc_result:
632  case Intrinsic::experimental_gc_relocate:
633  case Intrinsic::coro_alloc:
634  case Intrinsic::coro_begin:
635  case Intrinsic::coro_free:
636  case Intrinsic::coro_end:
637  case Intrinsic::coro_frame:
638  case Intrinsic::coro_size:
639  case Intrinsic::coro_align:
640  case Intrinsic::coro_suspend:
641  case Intrinsic::coro_subfn_addr:
642  // These intrinsics don't actually represent code after lowering.
643  return 0;
644  }
645  return 1;
646  }
647 
649  ArrayRef<Type *> Tys,
651  return 1;
652  }
653 
654  // Assume that we have a register of the right size for the type.
655  unsigned getNumberOfParts(Type *Tp) const { return 1; }
656 
658  const SCEV *) const {
659  return 0;
660  }
661 
664  TTI::TargetCostKind) const {
665  return 1;
666  }
667 
669  TTI::TargetCostKind) const {
670  return 1;
671  }
672 
674  getExtendedAddReductionCost(bool IsMLA, bool IsUnsigned, Type *ResTy,
675  VectorType *Ty,
677  return 1;
678  }
679 
681  return 0;
682  }
683 
685  return false;
686  }
687 
689  // Note for overrides: You must ensure for all element unordered-atomic
690  // memory intrinsics that all power-of-2 element sizes up to, and
691  // including, the return value of this method have a corresponding
692  // runtime lib call. These runtime lib call definitions can be found
693  // in RuntimeLibcalls.h
694  return 0;
695  }
696 
698  Type *ExpectedType) const {
699  return nullptr;
700  }
701 
703  unsigned SrcAddrSpace, unsigned DestAddrSpace,
704  unsigned SrcAlign, unsigned DestAlign,
705  Optional<uint32_t> AtomicElementSize) const {
706  return AtomicElementSize ? Type::getIntNTy(Context, *AtomicElementSize * 8)
708  }
709 
712  unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
713  unsigned SrcAlign, unsigned DestAlign,
714  Optional<uint32_t> AtomicCpySize) const {
715  unsigned OpSizeInBytes = AtomicCpySize ? *AtomicCpySize : 1;
716  Type *OpType = Type::getIntNTy(Context, OpSizeInBytes * 8);
717  for (unsigned i = 0; i != RemainingBytes; i += OpSizeInBytes)
718  OpsOut.push_back(OpType);
719  }
720 
721  bool areInlineCompatible(const Function *Caller,
722  const Function *Callee) const {
723  return (Caller->getFnAttribute("target-cpu") ==
724  Callee->getFnAttribute("target-cpu")) &&
725  (Caller->getFnAttribute("target-features") ==
726  Callee->getFnAttribute("target-features"));
727  }
728 
729  bool areTypesABICompatible(const Function *Caller, const Function *Callee,
730  const ArrayRef<Type *> &Types) const {
731  return (Caller->getFnAttribute("target-cpu") ==
732  Callee->getFnAttribute("target-cpu")) &&
733  (Caller->getFnAttribute("target-features") ==
734  Callee->getFnAttribute("target-features"));
735  }
736 
738  const DataLayout &DL) const {
739  return false;
740  }
741 
743  const DataLayout &DL) const {
744  return false;
745  }
746 
747  unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const { return 128; }
748 
749  bool isLegalToVectorizeLoad(LoadInst *LI) const { return true; }
750 
751  bool isLegalToVectorizeStore(StoreInst *SI) const { return true; }
752 
753  bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment,
754  unsigned AddrSpace) const {
755  return true;
756  }
757 
758  bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment,
759  unsigned AddrSpace) const {
760  return true;
761  }
762 
764  ElementCount VF) const {
765  return true;
766  }
767 
768  bool isElementTypeLegalForScalableVector(Type *Ty) const { return true; }
769 
770  unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
771  unsigned ChainSizeInBytes,
772  VectorType *VecTy) const {
773  return VF;
774  }
775 
776  unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
777  unsigned ChainSizeInBytes,
778  VectorType *VecTy) const {
779  return VF;
780  }
781 
782  bool preferInLoopReduction(unsigned Opcode, Type *Ty,
783  TTI::ReductionFlags Flags) const {
784  return false;
785  }
786 
787  bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty,
788  TTI::ReductionFlags Flags) const {
789  return false;
790  }
791 
792  bool shouldExpandReduction(const IntrinsicInst *II) const { return true; }
793 
794  unsigned getGISelRematGlobalCost() const { return 1; }
795 
796  bool supportsScalableVectors() const { return false; }
797 
798  bool enableScalableVectorization() const { return false; }
799 
800  bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
801  Align Alignment) const {
802  return false;
803  }
804 
808  /* EVLParamStrategy */ TargetTransformInfo::VPLegalization::Discard,
809  /* OperatorStrategy */ TargetTransformInfo::VPLegalization::Convert);
810  }
811 
812 protected:
813  // Obtain the minimum required size to hold the value (without the sign)
814  // In case of a vector it returns the min required size for one element.
815  unsigned minRequiredElementSize(const Value *Val, bool &isSigned) const {
816  if (isa<ConstantDataVector>(Val) || isa<ConstantVector>(Val)) {
817  const auto *VectorValue = cast<Constant>(Val);
818 
819  // In case of a vector need to pick the max between the min
820  // required size for each element
821  auto *VT = cast<FixedVectorType>(Val->getType());
822 
823  // Assume unsigned elements
824  isSigned = false;
825 
826  // The max required size is the size of the vector element type
827  unsigned MaxRequiredSize =
828  VT->getElementType()->getPrimitiveSizeInBits().getFixedSize();
829 
830  unsigned MinRequiredSize = 0;
831  for (unsigned i = 0, e = VT->getNumElements(); i < e; ++i) {
832  if (auto *IntElement =
833  dyn_cast<ConstantInt>(VectorValue->getAggregateElement(i))) {
834  bool signedElement = IntElement->getValue().isNegative();
835  // Get the element min required size.
836  unsigned ElementMinRequiredSize =
837  IntElement->getValue().getMinSignedBits() - 1;
838  // In case one element is signed then all the vector is signed.
839  isSigned |= signedElement;
840  // Save the max required bit size between all the elements.
841  MinRequiredSize = std::max(MinRequiredSize, ElementMinRequiredSize);
842  } else {
843  // not an int constant element
844  return MaxRequiredSize;
845  }
846  }
847  return MinRequiredSize;
848  }
849 
850  if (const auto *CI = dyn_cast<ConstantInt>(Val)) {
851  isSigned = CI->getValue().isNegative();
852  return CI->getValue().getMinSignedBits() - 1;
853  }
854 
855  if (const auto *Cast = dyn_cast<SExtInst>(Val)) {
856  isSigned = true;
857  return Cast->getSrcTy()->getScalarSizeInBits() - 1;
858  }
859 
860  if (const auto *Cast = dyn_cast<ZExtInst>(Val)) {
861  isSigned = false;
862  return Cast->getSrcTy()->getScalarSizeInBits();
863  }
864 
865  isSigned = false;
866  return Val->getType()->getScalarSizeInBits();
867  }
868 
869  bool isStridedAccess(const SCEV *Ptr) const {
870  return Ptr && isa<SCEVAddRecExpr>(Ptr);
871  }
872 
874  const SCEV *Ptr) const {
875  if (!isStridedAccess(Ptr))
876  return nullptr;
877  const SCEVAddRecExpr *AddRec = cast<SCEVAddRecExpr>(Ptr);
878  return dyn_cast<SCEVConstant>(AddRec->getStepRecurrence(*SE));
879  }
880 
882  int64_t MergeDistance) const {
883  const SCEVConstant *Step = getConstantStrideStep(SE, Ptr);
884  if (!Step)
885  return false;
886  APInt StrideVal = Step->getAPInt();
887  if (StrideVal.getBitWidth() > 64)
888  return false;
889  // FIXME: Need to take absolute value for negative stride case.
890  return StrideVal.getSExtValue() < MergeDistance;
891  }
892 };
893 
894 /// CRTP base class for use as a mix-in that aids implementing
895 /// a TargetTransformInfo-compatible class.
896 template <typename T>
898 private:
900 
901 protected:
903 
904 public:
905  using BaseT::getGEPCost;
906 
907  InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
910  assert(PointeeType && Ptr && "can't get GEPCost of nullptr");
911  assert(cast<PointerType>(Ptr->getType()->getScalarType())
912  ->isOpaqueOrPointeeTypeMatches(PointeeType) &&
913  "explicit pointee type doesn't match operand's pointee type");
914  auto *BaseGV = dyn_cast<GlobalValue>(Ptr->stripPointerCasts());
915  bool HasBaseReg = (BaseGV == nullptr);
916 
917  auto PtrSizeBits = DL.getPointerTypeSizeInBits(Ptr->getType());
918  APInt BaseOffset(PtrSizeBits, 0);
919  int64_t Scale = 0;
920 
921  auto GTI = gep_type_begin(PointeeType, Operands);
922  Type *TargetType = nullptr;
923 
924  // Handle the case where the GEP instruction has a single operand,
925  // the basis, therefore TargetType is a nullptr.
926  if (Operands.empty())
927  return !BaseGV ? TTI::TCC_Free : TTI::TCC_Basic;
928 
929  for (auto I = Operands.begin(); I != Operands.end(); ++I, ++GTI) {
930  TargetType = GTI.getIndexedType();
931  // We assume that the cost of Scalar GEP with constant index and the
932  // cost of Vector GEP with splat constant index are the same.
933  const ConstantInt *ConstIdx = dyn_cast<ConstantInt>(*I);
934  if (!ConstIdx)
935  if (auto Splat = getSplatValue(*I))
936  ConstIdx = dyn_cast<ConstantInt>(Splat);
937  if (StructType *STy = GTI.getStructTypeOrNull()) {
938  // For structures the index is always splat or scalar constant
939  assert(ConstIdx && "Unexpected GEP index");
940  uint64_t Field = ConstIdx->getZExtValue();
941  BaseOffset += DL.getStructLayout(STy)->getElementOffset(Field);
942  } else {
943  // If this operand is a scalable type, bail out early.
944  // TODO: handle scalable vectors
945  if (isa<ScalableVectorType>(TargetType))
946  return TTI::TCC_Basic;
947  int64_t ElementSize =
948  DL.getTypeAllocSize(GTI.getIndexedType()).getFixedSize();
949  if (ConstIdx) {
950  BaseOffset +=
951  ConstIdx->getValue().sextOrTrunc(PtrSizeBits) * ElementSize;
952  } else {
953  // Needs scale register.
954  if (Scale != 0)
955  // No addressing mode takes two scale registers.
956  return TTI::TCC_Basic;
957  Scale = ElementSize;
958  }
959  }
960  }
961 
962  if (static_cast<T *>(this)->isLegalAddressingMode(
963  TargetType, const_cast<GlobalValue *>(BaseGV),
964  BaseOffset.sextOrTrunc(64).getSExtValue(), HasBaseReg, Scale,
965  Ptr->getType()->getPointerAddressSpace()))
966  return TTI::TCC_Free;
967  return TTI::TCC_Basic;
968  }
969 
972  using namespace llvm::PatternMatch;
973 
974  auto *TargetTTI = static_cast<T *>(this);
975  // Handle non-intrinsic calls, invokes, and callbr.
976  // FIXME: Unlikely to be true for anything but CodeSize.
977  auto *CB = dyn_cast<CallBase>(U);
978  if (CB && !isa<IntrinsicInst>(U)) {
979  if (const Function *F = CB->getCalledFunction()) {
980  if (!TargetTTI->isLoweredToCall(F))
981  return TTI::TCC_Basic; // Give a basic cost if it will be lowered
982 
983  return TTI::TCC_Basic * (F->getFunctionType()->getNumParams() + 1);
984  }
985  // For indirect or other calls, scale cost by number of arguments.
986  return TTI::TCC_Basic * (CB->arg_size() + 1);
987  }
988 
989  Type *Ty = U->getType();
990  unsigned Opcode = Operator::getOpcode(U);
991  auto *I = dyn_cast<Instruction>(U);
992  switch (Opcode) {
993  default:
994  break;
995  case Instruction::Call: {
996  assert(isa<IntrinsicInst>(U) && "Unexpected non-intrinsic call");
997  auto *Intrinsic = cast<IntrinsicInst>(U);
998  IntrinsicCostAttributes CostAttrs(Intrinsic->getIntrinsicID(), *CB);
999  return TargetTTI->getIntrinsicInstrCost(CostAttrs, CostKind);
1000  }
1001  case Instruction::Br:
1002  case Instruction::Ret:
1003  case Instruction::PHI:
1004  case Instruction::Switch:
1005  return TargetTTI->getCFInstrCost(Opcode, CostKind, I);
1006  case Instruction::ExtractValue:
1007  case Instruction::Freeze:
1008  return TTI::TCC_Free;
1009  case Instruction::Alloca:
1010  if (cast<AllocaInst>(U)->isStaticAlloca())
1011  return TTI::TCC_Free;
1012  break;
1013  case Instruction::GetElementPtr: {
1014  const auto *GEP = cast<GEPOperator>(U);
1015  return TargetTTI->getGEPCost(GEP->getSourceElementType(),
1016  GEP->getPointerOperand(),
1017  Operands.drop_front(), CostKind);
1018  }
1019  case Instruction::Add:
1020  case Instruction::FAdd:
1021  case Instruction::Sub:
1022  case Instruction::FSub:
1023  case Instruction::Mul:
1024  case Instruction::FMul:
1025  case Instruction::UDiv:
1026  case Instruction::SDiv:
1027  case Instruction::FDiv:
1028  case Instruction::URem:
1029  case Instruction::SRem:
1030  case Instruction::FRem:
1031  case Instruction::Shl:
1032  case Instruction::LShr:
1033  case Instruction::AShr:
1034  case Instruction::And:
1035  case Instruction::Or:
1036  case Instruction::Xor:
1037  case Instruction::FNeg: {
1040  TTI::OperandValueKind Op1VK =
1041  TTI::getOperandInfo(U->getOperand(0), Op1VP);
1042  TTI::OperandValueKind Op2VK = Opcode != Instruction::FNeg ?
1045  return TargetTTI->getArithmeticInstrCost(Opcode, Ty, CostKind,
1046  Op1VK, Op2VK,
1047  Op1VP, Op2VP, Operands, I);
1048  }
1049  case Instruction::IntToPtr:
1050  case Instruction::PtrToInt:
1051  case Instruction::SIToFP:
1052  case Instruction::UIToFP:
1053  case Instruction::FPToUI:
1054  case Instruction::FPToSI:
1055  case Instruction::Trunc:
1056  case Instruction::FPTrunc:
1057  case Instruction::BitCast:
1058  case Instruction::FPExt:
1059  case Instruction::SExt:
1060  case Instruction::ZExt:
1061  case Instruction::AddrSpaceCast: {
1062  Type *OpTy = U->getOperand(0)->getType();
1063  return TargetTTI->getCastInstrCost(
1064  Opcode, Ty, OpTy, TTI::getCastContextHint(I), CostKind, I);
1065  }
1066  case Instruction::Store: {
1067  auto *SI = cast<StoreInst>(U);
1068  Type *ValTy = U->getOperand(0)->getType();
1069  return TargetTTI->getMemoryOpCost(Opcode, ValTy, SI->getAlign(),
1070  SI->getPointerAddressSpace(),
1071  CostKind, I);
1072  }
1073  case Instruction::Load: {
1074  auto *LI = cast<LoadInst>(U);
1075  Type *LoadType = U->getType();
1076  // If there is a non-register sized type, the cost estimation may expand
1077  // it to be several instructions to load into multiple registers on the
1078  // target. But, if the only use of the load is a trunc instruction to a
1079  // register sized type, the instruction selector can combine these
1080  // instructions to be a single load. So, in this case, we use the
1081  // destination type of the trunc instruction rather than the load to
1082  // accurately estimate the cost of this load instruction.
1083  if (CostKind == TTI::TCK_CodeSize && LI->hasOneUse() &&
1084  !LoadType->isVectorTy()) {
1085  if (const TruncInst *TI = dyn_cast<TruncInst>(*LI->user_begin()))
1086  LoadType = TI->getDestTy();
1087  }
1088  return TargetTTI->getMemoryOpCost(Opcode, LoadType, LI->getAlign(),
1089  LI->getPointerAddressSpace(),
1090  CostKind, I);
1091  }
1092  case Instruction::Select: {
1093  const Value *Op0, *Op1;
1094  if (match(U, m_LogicalAnd(m_Value(Op0), m_Value(Op1))) ||
1095  match(U, m_LogicalOr(m_Value(Op0), m_Value(Op1)))) {
1096  // select x, y, false --> x & y
1097  // select x, true, y --> x | y
1100  TTI::OperandValueKind Op1VK = TTI::getOperandInfo(Op0, Op1VP);
1101  TTI::OperandValueKind Op2VK = TTI::getOperandInfo(Op1, Op2VP);
1102  assert(Op0->getType()->getScalarSizeInBits() == 1 &&
1103  Op1->getType()->getScalarSizeInBits() == 1);
1104 
1106  return TargetTTI->getArithmeticInstrCost(
1107  match(U, m_LogicalOr()) ? Instruction::Or : Instruction::And, Ty,
1108  CostKind, Op1VK, Op2VK, Op1VP, Op2VP, Operands, I);
1109  }
1110  Type *CondTy = U->getOperand(0)->getType();
1111  return TargetTTI->getCmpSelInstrCost(Opcode, U->getType(), CondTy,
1113  CostKind, I);
1114  }
1115  case Instruction::ICmp:
1116  case Instruction::FCmp: {
1117  Type *ValTy = U->getOperand(0)->getType();
1118  // TODO: Also handle ICmp/FCmp constant expressions.
1119  return TargetTTI->getCmpSelInstrCost(Opcode, ValTy, U->getType(),
1120  I ? cast<CmpInst>(I)->getPredicate()
1122  CostKind, I);
1123  }
1124  case Instruction::InsertElement: {
1125  auto *IE = dyn_cast<InsertElementInst>(U);
1126  if (!IE)
1127  return TTI::TCC_Basic; // FIXME
1128  unsigned Idx = -1;
1129  if (auto *CI = dyn_cast<ConstantInt>(IE->getOperand(2)))
1130  if (CI->getValue().getActiveBits() <= 32)
1131  Idx = CI->getZExtValue();
1132  return TargetTTI->getVectorInstrCost(Opcode, Ty, Idx);
1133  }
1134  case Instruction::ShuffleVector: {
1135  auto *Shuffle = dyn_cast<ShuffleVectorInst>(U);
1136  if (!Shuffle)
1137  return TTI::TCC_Basic; // FIXME
1138 
1139  auto *VecTy = cast<VectorType>(U->getType());
1140  auto *VecSrcTy = cast<VectorType>(U->getOperand(0)->getType());
1141  int NumSubElts, SubIndex;
1142 
1143  if (Shuffle->changesLength()) {
1144  // Treat a 'subvector widening' as a free shuffle.
1145  if (Shuffle->increasesLength() && Shuffle->isIdentityWithPadding())
1146  return 0;
1147 
1148  if (Shuffle->isExtractSubvectorMask(SubIndex))
1149  return TargetTTI->getShuffleCost(TTI::SK_ExtractSubvector, VecSrcTy,
1150  Shuffle->getShuffleMask(), SubIndex,
1151  VecTy, Operands);
1152 
1153  if (Shuffle->isInsertSubvectorMask(NumSubElts, SubIndex))
1154  return TargetTTI->getShuffleCost(
1155  TTI::SK_InsertSubvector, VecTy, Shuffle->getShuffleMask(),
1156  SubIndex,
1157  FixedVectorType::get(VecTy->getScalarType(), NumSubElts),
1158  Operands);
1159 
1160  int ReplicationFactor, VF;
1161  if (Shuffle->isReplicationMask(ReplicationFactor, VF)) {
1162  APInt DemandedDstElts =
1163  APInt::getNullValue(Shuffle->getShuffleMask().size());
1164  for (auto I : enumerate(Shuffle->getShuffleMask())) {
1165  if (I.value() != UndefMaskElem)
1166  DemandedDstElts.setBit(I.index());
1167  }
1168  return TargetTTI->getReplicationShuffleCost(
1169  VecSrcTy->getElementType(), ReplicationFactor, VF,
1170  DemandedDstElts, CostKind);
1171  }
1172 
1173  return CostKind == TTI::TCK_RecipThroughput ? -1 : 1;
1174  }
1175 
1176  if (Shuffle->isIdentity())
1177  return 0;
1178 
1179  if (Shuffle->isReverse())
1180  return TargetTTI->getShuffleCost(TTI::SK_Reverse, VecTy,
1181  Shuffle->getShuffleMask(), 0, nullptr,
1182  Operands);
1183 
1184  if (Shuffle->isSelect())
1185  return TargetTTI->getShuffleCost(TTI::SK_Select, VecTy,
1186  Shuffle->getShuffleMask(), 0, nullptr,
1187  Operands);
1188 
1189  if (Shuffle->isTranspose())
1190  return TargetTTI->getShuffleCost(TTI::SK_Transpose, VecTy,
1191  Shuffle->getShuffleMask(), 0, nullptr,
1192  Operands);
1193 
1194  if (Shuffle->isZeroEltSplat())
1195  return TargetTTI->getShuffleCost(TTI::SK_Broadcast, VecTy,
1196  Shuffle->getShuffleMask(), 0, nullptr,
1197  Operands);
1198 
1199  if (Shuffle->isSingleSource())
1200  return TargetTTI->getShuffleCost(TTI::SK_PermuteSingleSrc, VecTy,
1201  Shuffle->getShuffleMask(), 0, nullptr,
1202  Operands);
1203 
1204  if (Shuffle->isInsertSubvectorMask(NumSubElts, SubIndex))
1205  return TargetTTI->getShuffleCost(
1206  TTI::SK_InsertSubvector, VecTy, Shuffle->getShuffleMask(), SubIndex,
1207  FixedVectorType::get(VecTy->getScalarType(), NumSubElts), Operands);
1208 
1209  return TargetTTI->getShuffleCost(TTI::SK_PermuteTwoSrc, VecTy,
1210  Shuffle->getShuffleMask(), 0, nullptr,
1211  Operands);
1212  }
1213  case Instruction::ExtractElement: {
1214  auto *EEI = dyn_cast<ExtractElementInst>(U);
1215  if (!EEI)
1216  return TTI::TCC_Basic; // FIXME
1217  unsigned Idx = -1;
1218  if (auto *CI = dyn_cast<ConstantInt>(EEI->getOperand(1)))
1219  if (CI->getValue().getActiveBits() <= 32)
1220  Idx = CI->getZExtValue();
1221  Type *DstTy = U->getOperand(0)->getType();
1222  return TargetTTI->getVectorInstrCost(Opcode, DstTy, Idx);
1223  }
1224  }
1225  // By default, just classify everything as 'basic'.
1226  return TTI::TCC_Basic;
1227  }
1228 
1230  SmallVector<const Value *, 4> Operands(I->operand_values());
1232  return 0;
1233 
1234  if (isa<LoadInst>(I))
1235  return 4;
1236 
1237  Type *DstTy = I->getType();
1238 
1239  // Usually an intrinsic is a simple instruction.
1240  // A real function call is much slower.
1241  if (auto *CI = dyn_cast<CallInst>(I)) {
1242  const Function *F = CI->getCalledFunction();
1243  if (!F || static_cast<T *>(this)->isLoweredToCall(F))
1244  return 40;
1245  // Some intrinsics return a value and a flag, we use the value type
1246  // to decide its latency.
1247  if (StructType *StructTy = dyn_cast<StructType>(DstTy))
1248  DstTy = StructTy->getElementType(0);
1249  // Fall through to simple instructions.
1250  }
1251 
1252  if (VectorType *VectorTy = dyn_cast<VectorType>(DstTy))
1253  DstTy = VectorTy->getElementType();
1254  if (DstTy->isFloatingPointTy())
1255  return 3;
1256 
1257  return 1;
1258  }
1259 };
1260 } // namespace llvm
1261 
1262 #endif
i
i
Definition: README.txt:29
llvm::InstructionCost
Definition: InstructionCost.h:29
llvm::TargetTransformInfo::CacheLevel::L1D
@ L1D
llvm::TargetTransformInfoImplBase::canHaveNonUndefGlobalInitializerInAddressSpace
bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const
Definition: TargetTransformInfoImpl.h:105
llvm::TargetTransformInfoImplBase::getCacheLineSize
unsigned getCacheLineSize() const
Definition: TargetTransformInfoImpl.h:435
llvm::TargetTransformInfo::SK_Select
@ SK_Select
Selects elements from the corresponding lane of either source operand.
Definition: TargetTransformInfo.h:874
llvm::TargetTransformInfo::TargetCostKind
TargetCostKind
The kind of cost model.
Definition: TargetTransformInfo.h:210
llvm::TargetTransformInfoImplBase::isHardwareLoopProfitable
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
Definition: TargetTransformInfoImpl.h:157
llvm::TargetTransformInfo::LSRCost::NumRegs
unsigned NumRegs
Definition: TargetTransformInfo.h:420
llvm::TargetTransformInfo::TCC_Expensive
@ TCC_Expensive
The cost of a 'div' instruction on x86.
Definition: TargetTransformInfo.h:263
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::TargetTransformInfo::ReductionFlags
Flags describing the kind of vector reduction.
Definition: TargetTransformInfo.h:1386
llvm::TargetTransformInfoImplBase::useAA
bool useAA() const
Definition: TargetTransformInfoImpl.h:311
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::TargetTransformInfoImplBase::preferPredicateOverEpilogue
bool preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *TLI, DominatorTree *DT, const LoopAccessInfo *LAI) const
Definition: TargetTransformInfoImpl.h:163
llvm::TargetTransformInfo::MemIndexedMode
MemIndexedMode
The type of load/store indexing.
Definition: TargetTransformInfo.h:1334
llvm::TargetTransformInfo::TCK_Latency
@ TCK_Latency
The latency of instruction.
Definition: TargetTransformInfo.h:212
llvm::CmpInst::Predicate
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:719
llvm::TargetTransformInfoImplBase::enableOrderedReductions
bool enableOrderedReductions() const
Definition: TargetTransformInfoImpl.h:284
llvm::TargetTransformInfoImplBase::getAssumedAddrSpace
unsigned getAssumedAddrSpace(const Value *V) const
Definition: TargetTransformInfoImpl.h:109
llvm::TargetTransformInfoImplBase::isStridedAccess
bool isStridedAccess(const SCEV *Ptr) const
Definition: TargetTransformInfoImpl.h:869
IntrinsicInst.h
llvm::ElementCount
Definition: TypeSize.h:390
llvm::TargetTransformInfoImplBase::getMaxVScale
Optional< unsigned > getMaxVScale() const
Definition: TargetTransformInfoImpl.h:417
llvm::TypeSize::getFixedSize
ScalarTy getFixedSize() const
Definition: TypeSize.h:430
T
llvm::Function
Definition: Function.h:60
llvm::Loop
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:530
llvm::TargetTransformInfoImplBase::isLegalICmpImmediate
bool isLegalICmpImmediate(int64_t Imm) const
Definition: TargetTransformInfoImpl.h:203
llvm::TargetTransformInfo::PopcntSupportKind
PopcntSupportKind
Flags indicating the kind of support for population count.
Definition: TargetTransformInfo.h:594
llvm::TargetTransformInfoImplCRTPBase::getUserCost
InstructionCost getUserCost(const User *U, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind)
Definition: TargetTransformInfoImpl.h:970
llvm::DataLayout::getTypeSizeInBits
TypeSize getTypeSizeInBits(Type *Ty) const
Size examples:
Definition: DataLayout.h:673
C1
instcombine should handle this C2 when C1
Definition: README.txt:263
GetElementPtrTypeIterator.h
llvm::Type::getScalarType
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition: Type.h:309
llvm::ConstantInt::getValue
const APInt & getValue() const
Return the constant as an APInt value reference.
Definition: Constants.h:133
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
llvm::DataLayout::getPointerTypeSizeInBits
unsigned getPointerTypeSizeInBits(Type *) const
Layout pointer size, in bits, based on the type.
Definition: DataLayout.cpp:721
llvm::enumerate
detail::enumerator< R > enumerate(R &&TheRange)
Given an input range, returns a new range whose values are are pair (A,B) such that A is the 0-based ...
Definition: STLExtras.h:2045
llvm::TargetTransformInfoImplBase::isLSRCostLess
bool isLSRCostLess(TTI::LSRCost &C1, TTI::LSRCost &C2) const
Definition: TargetTransformInfoImpl.h:213
llvm::APInt::getSExtValue
int64_t getSExtValue() const
Get sign extended value.
Definition: APInt.h:1490
llvm::DataLayout::getTypeStoreSize
TypeSize getTypeStoreSize(Type *Ty) const
Returns the maximum number of bytes that may be overwritten by storing the specified type.
Definition: DataLayout.h:474
llvm::TargetTransformInfoImplBase::isLegalMaskedExpandLoad
bool isLegalMaskedExpandLoad(Type *DataType) const
Definition: TargetTransformInfoImpl.h:282
llvm::TargetTransformInfoImplBase::getAddressComputationCost
InstructionCost getAddressComputationCost(Type *Tp, ScalarEvolution *, const SCEV *) const
Definition: TargetTransformInfoImpl.h:657
llvm::TargetTransformInfoImplBase::getFlatAddressSpace
unsigned getFlatAddressSpace() const
Definition: TargetTransformInfoImpl.h:97
llvm::getSplatValue
Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
Definition: VectorUtils.cpp:371
llvm::TargetTransformInfo
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Definition: TargetTransformInfo.h:167
llvm::Type::getPointerAddressSpace
unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
Definition: DerivedTypes.h:729
llvm::ScalarEvolution
The main scalar evolution driver.
Definition: ScalarEvolution.h:449
llvm::TargetTransformInfoImplBase::getMinVectorRegisterBitWidth
unsigned getMinVectorRegisterBitWidth() const
Definition: TargetTransformInfoImpl.h:415
llvm::TargetTransformInfoImplBase::getInlinerVectorBonusPercent
int getInlinerVectorBonusPercent() const
Definition: TargetTransformInfoImpl.h:73
llvm::DominatorTree
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition: Dominators.h:166
llvm::TargetTransformInfoImplBase::TTI
TargetTransformInfo TTI
Definition: TargetTransformInfoImpl.h:35
llvm::TargetTransformInfoImplBase::getScalingFactorCost
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const
Definition: TargetTransformInfoImpl.h:294
llvm::TargetTransformInfo::TCK_CodeSize
@ TCK_CodeSize
Instruction code size.
Definition: TargetTransformInfo.h:213
llvm::TargetTransformInfo::VPLegalization
Definition: TargetTransformInfo.h:1436
llvm::DataLayout::getStructLayout
const StructLayout * getStructLayout(StructType *Ty) const
Returns a StructLayout object, indicating the alignment of the struct, its size, and the offsets of i...
Definition: DataLayout.cpp:678
llvm::TargetTransformInfo::LSRCost::NumIVMuls
unsigned NumIVMuls
Definition: TargetTransformInfo.h:422
llvm::TargetTransformInfoImplBase::getRegisterClassName
const char * getRegisterClassName(unsigned ClassID) const
Definition: TargetTransformInfoImpl.h:400
llvm::TargetTransformInfoImplBase::getLoadStoreVecRegBitWidth
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const
Definition: TargetTransformInfoImpl.h:747
llvm::TargetTransformInfoImplBase::getPopcntSupport
TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const
Definition: TargetTransformInfoImpl.h:359
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
llvm::APInt::getBitWidth
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1423
llvm::TargetTransformInfo::VPLegalization::Convert
@ Convert
Definition: TargetTransformInfo.h:1443
llvm::TargetTransformInfo::PeelingPreferences
Definition: TargetTransformInfo.h:537
llvm::TargetTransformInfoImplBase::isLegalToVectorizeStore
bool isLegalToVectorizeStore(StoreInst *SI) const
Definition: TargetTransformInfoImpl.h:751
llvm::SPII::Load
@ Load
Definition: SparcInstrInfo.h:32
llvm::TargetTransformInfoImplBase::isProfitableToHoist
bool isProfitableToHoist(Instruction *I) const
Definition: TargetTransformInfoImpl.h:309
llvm::Optional
Definition: APInt.h:33
Vector
So we should use XX3Form_Rcr to implement intrinsic Convert DP outs ins xscvdpsp No builtin are required Round &Convert QP DP(dword[1] is set to zero) No builtin are required Round to Quad Precision because you need to assign rounding mode in instruction Provide builtin(set f128:$vT,(int_ppc_vsx_xsrqpi f128:$vB))(set f128 yields< n x< ty > >< result > yields< ty >< result > No builtin are required Load Store Vector
Definition: README_P9.txt:497
T
#define T
Definition: Mips16ISelLowering.cpp:341
Operator.h
llvm::MipsISD::Ret
@ Ret
Definition: MipsISelLowering.h:119
llvm::TargetTransformInfoImplBase::useGPUDivergenceAnalysis
bool useGPUDivergenceAnalysis() const
Definition: TargetTransformInfoImpl.h:91
llvm::TargetTransformInfoImplBase::getIntImmCost
InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const
Definition: TargetTransformInfoImpl.h:376
llvm::TargetTransformInfoImplBase::TargetTransformInfoImplBase
TargetTransformInfoImplBase(const DataLayout &DL)
Definition: TargetTransformInfoImpl.h:39
llvm::TargetTransformInfoImplCRTPBase::getGEPCost
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind)
Definition: TargetTransformInfoImpl.h:907
llvm::isPowerOf2_32
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:491
llvm::gep_type_begin
gep_type_iterator gep_type_begin(const User *GEP)
Definition: GetElementPtrTypeIterator.h:123
llvm::TargetTransformInfoImplBase::getMinMaxReductionCost
InstructionCost getMinMaxReductionCost(VectorType *, VectorType *, bool, TTI::TargetCostKind) const
Definition: TargetTransformInfoImpl.h:668
llvm::Type::isFloatingPointTy
bool isFloatingPointTy() const
Return true if this is one of the six floating-point types.
Definition: Type.h:163
llvm::TargetTransformInfoImplBase::isLegalMaskedGather
bool isLegalMaskedGather(Type *DataType, Align Alignment) const
Definition: TargetTransformInfoImpl.h:267
llvm::TargetTransformInfo::SK_PermuteSingleSrc
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
Definition: TargetTransformInfo.h:882
llvm::TargetTransformInfoImplBase::haveFastSqrt
bool haveFastSqrt(Type *Ty) const
Definition: TargetTransformInfoImpl.h:363
llvm::Type::getInt8Ty
static IntegerType * getInt8Ty(LLVMContext &C)
Definition: Type.cpp:237
llvm::TargetTransformInfoImplBase::enableInterleavedAccessVectorization
bool enableInterleavedAccessVectorization() const
Definition: TargetTransformInfoImpl.h:347
llvm::LinearPolySize::isScalable
bool isScalable() const
Returns whether the size is scaled by a runtime quantity (vscale).
Definition: TypeSize.h:298
llvm::TargetTransformInfo::CacheLevel
CacheLevel
The possible cache levels.
Definition: TargetTransformInfo.h:974
llvm::TargetTransformInfoImplBase::getConstantStrideStep
const SCEVConstant * getConstantStrideStep(ScalarEvolution *SE, const SCEV *Ptr) const
Definition: TargetTransformInfoImpl.h:873
llvm::TargetTransformInfoImplBase::collectFlatAddressOperands
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const
Definition: TargetTransformInfoImpl.h:99
llvm::TargetTransformInfo::SK_Broadcast
@ SK_Broadcast
Broadcast element 0 to all other elements.
Definition: TargetTransformInfo.h:872
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::TargetTransformInfo::LSRCost::AddRecCost
unsigned AddRecCost
Definition: TargetTransformInfo.h:421
llvm::TargetTransformInfoImplBase::isTruncateFree
bool isTruncateFree(Type *Ty1, Type *Ty2) const
Definition: TargetTransformInfoImpl.h:307
llvm::UndefMaskElem
constexpr int UndefMaskElem
Definition: Instructions.h:1996
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
llvm::TargetTransformInfoImplBase::getDataLayout
const DataLayout & getDataLayout() const
Definition: TargetTransformInfoImpl.h:46
llvm::TargetTransformInfoImplBase::areInlineCompatible
bool areInlineCompatible(const Function *Caller, const Function *Callee) const
Definition: TargetTransformInfoImpl.h:721
llvm::TargetTransformInfoImplBase::getMinimumVF
ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const
Definition: TargetTransformInfoImpl.h:422
Arg
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
Definition: AMDGPULibCalls.cpp:186
llvm::TargetTransformInfo::LSRCost::SetupCost
unsigned SetupCost
Definition: TargetTransformInfo.h:425
llvm::BitmaskEnumDetail::Mask
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
llvm::TargetTransformInfoImplBase::getExtendedAddReductionCost
InstructionCost getExtendedAddReductionCost(bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const
Definition: TargetTransformInfoImpl.h:674
llvm::TargetTransformInfoImplBase::isNumRegsMajorCostOfLSR
bool isNumRegsMajorCostOfLSR() const
Definition: TargetTransformInfoImpl.h:220
llvm::TargetTransformInfoImplBase::isLegalToVectorizeReduction
bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const
Definition: TargetTransformInfoImpl.h:763
llvm::TargetTransformInfoImplBase::getPredictableBranchThreshold
BranchProbability getPredictableBranchThreshold() const
Definition: TargetTransformInfoImpl.h:85
llvm::TargetTransformInfoImplBase::allowsMisalignedMemoryAccesses
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, bool *Fast) const
Definition: TargetTransformInfoImpl.h:353
llvm::ConstantInt
This is the shared class of boolean and integer constants.
Definition: Constants.h:79
llvm::TargetTransformInfoImplBase::hasDivRemOp
bool hasDivRemOp(Type *DataType, bool IsSigned) const
Definition: TargetTransformInfoImpl.h:286
llvm::TargetTransformInfo::SK_PermuteTwoSrc
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
Definition: TargetTransformInfo.h:880
llvm::BlockFrequencyInfo
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Definition: BlockFrequencyInfo.h:37
llvm::LinearPolySize< ElementCount >::get
static ElementCount get(ScalarTy MinVal, bool Scalable)
Definition: TypeSize.h:289
llvm::TargetTransformInfoImplBase::getReplicationShuffleCost
unsigned getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind)
Definition: TargetTransformInfoImpl.h:566
llvm::TargetTransformInfo::getCastContextHint
static CastContextHint getCastContextHint(const Instruction *I)
Calculates a CastContextHint from I.
Definition: TargetTransformInfo.cpp:763
llvm::TargetTransformInfoImplBase::getMaxInterleaveFactor
unsigned getMaxInterleaveFactor(unsigned VF) const
Definition: TargetTransformInfoImpl.h:469
llvm::APInt::setBit
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition: APInt.h:1292
llvm::TargetTransformInfoImplBase::TargetTransformInfoImplBase
TargetTransformInfoImplBase(TargetTransformInfoImplBase &&Arg)
Definition: TargetTransformInfoImpl.h:44
llvm::TargetTransformInfoImplBase
Base class for use as a mix-in that aids implementing a TargetTransformInfo-compatible class.
Definition: TargetTransformInfoImpl.h:33
llvm::TargetTransformInfoImplBase::getCacheAssociativity
llvm::Optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
Definition: TargetTransformInfoImpl.h:449
llvm::PatternMatch::match
bool match(Val *V, const Pattern &P)
Definition: PatternMatch.h:49
llvm::TargetTransformInfoImplBase::getPrefetchDistance
unsigned getPrefetchDistance() const
Definition: TargetTransformInfoImpl.h:460
llvm::TargetTransformInfoImplBase::getNumberOfRegisters
unsigned getNumberOfRegisters(unsigned ClassID) const
Definition: TargetTransformInfoImpl.h:394
llvm::TargetTransformInfo::OP_None
@ OP_None
Definition: TargetTransformInfo.h:898
llvm::TargetTransformInfo::ShuffleKind
ShuffleKind
The various kinds of shuffle patterns for vector queries.
Definition: TargetTransformInfo.h:871
llvm::TargetTransformInfoImplBase::hasActiveVectorLength
bool hasActiveVectorLength(unsigned Opcode, Type *DataType, Align Alignment) const
Definition: TargetTransformInfoImpl.h:800
llvm::TargetTransformInfo::CastContextHint
CastContextHint
Represents a hint about the context in which a cast is used.
Definition: TargetTransformInfo.h:1091
llvm::TargetTransformInfoImplBase::isLegalMaskedStore
bool isLegalMaskedStore(Type *DataType, Align Alignment) const
Definition: TargetTransformInfoImpl.h:237
llvm::User
Definition: User.h:44
llvm::TargetTransformInfoImplBase::forceScalarizeMaskedScatter
bool forceScalarizeMaskedScatter(VectorType *DataType, Align Alignment) const
Definition: TargetTransformInfoImpl.h:275
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::TargetTransformInfoImplBase::shouldBuildLookupTablesForConstant
bool shouldBuildLookupTablesForConstant(Constant *C) const
Definition: TargetTransformInfoImpl.h:319
llvm::TargetTransformInfoImplBase::getVectorInstrCost
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) const
Definition: TargetTransformInfoImpl.h:561
llvm::TargetTransformInfoImplBase::getMemcpyLoopLoweringType
Type * getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign, Optional< uint32_t > AtomicElementSize) const
Definition: TargetTransformInfoImpl.h:702
llvm::Type::isVectorTy
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:227
llvm::TargetTransformInfoImplBase::hasBranchDivergence
bool hasBranchDivergence() const
Definition: TargetTransformInfoImpl.h:89
llvm::TargetTransformInfoImplBase::isIndexedStoreLegal
bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty, const DataLayout &DL) const
Definition: TargetTransformInfoImpl.h:742
llvm::TargetTransformInfoImplBase::shouldBuildLookupTables
bool shouldBuildLookupTables() const
Definition: TargetTransformInfoImpl.h:317
llvm::Instruction
Definition: Instruction.h:42
llvm::Type::getScalarSizeInBits
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition: Type.cpp:189
llvm::TargetTransformInfoImplBase::getNumberOfParts
unsigned getNumberOfParts(Type *Tp) const
Definition: TargetTransformInfoImpl.h:655
llvm::SPII::Store
@ Store
Definition: SparcInstrInfo.h:33
llvm::TargetTransformInfoImplBase::getIntImmCostInst
InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr) const
Definition: TargetTransformInfoImpl.h:381
llvm::Operator::getOpcode
unsigned getOpcode() const
Return the opcode for this Instruction or ConstantExpr.
Definition: Operator.h:42
llvm::TargetTransformInfoImplBase::isTypeLegal
bool isTypeLegal(Type *Ty) const
Definition: TargetTransformInfoImpl.h:313
llvm::TargetTransformInfoImplBase::isLegalAddressingMode
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr) const
Definition: TargetTransformInfoImpl.h:205
llvm::TargetTransformInfoImplBase::getMemcpyLoopResidualLoweringType
void getMemcpyLoopResidualLoweringType(SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign, Optional< uint32_t > AtomicCpySize) const
Definition: TargetTransformInfoImpl.h:710
llvm::TargetTransformInfoImplBase::getCFInstrCost
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
Definition: TargetTransformInfoImpl.h:545
llvm::TargetTransformInfoImplBase::getRegUsageForType
InstructionCost getRegUsageForType(Type *Ty) const
Definition: TargetTransformInfoImpl.h:315
llvm::TargetTransformInfoImplBase::getOrCreateResultFromMemIntrinsic
Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType) const
Definition: TargetTransformInfoImpl.h:697
llvm::TargetTransformInfoImplCRTPBase
CRTP base class for use as a mix-in that aids implementing a TargetTransformInfo-compatible class.
Definition: TargetTransformInfoImpl.h:897
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::TargetTransformInfoImplBase::hasVolatileVariant
bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const
Definition: TargetTransformInfoImpl.h:288
llvm::TargetTransformInfoImplBase::getPredicatedAddrSpace
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const
Definition: TargetTransformInfoImpl.h:112
PatternMatch.h
llvm::TargetTransformInfoImplBase::getCostOfKeepingLiveOverCall
InstructionCost getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys) const
Definition: TargetTransformInfoImpl.h:680
llvm::TargetTransformInfoImplBase::enableWritePrefetching
bool enableWritePrefetching() const
Definition: TargetTransformInfoImpl.h:467
llvm::FixedVectorType::get
static FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition: Type.cpp:684
llvm::TargetTransformInfoImplBase::enableMemCmpExpansion
TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
Definition: TargetTransformInfoImpl.h:342
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::MCID::Call
@ Call
Definition: MCInstrDesc.h:155
llvm::AddressSpace
AddressSpace
Definition: NVPTXBaseInfo.h:21
llvm::TargetTransformInfoImplBase::isSourceOfDivergence
bool isSourceOfDivergence(const Value *V) const
Definition: TargetTransformInfoImpl.h:93
llvm::TargetTransformInfoImplBase::getVPLegalizationStrategy
TargetTransformInfo::VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const
Definition: TargetTransformInfoImpl.h:806
llvm::TargetTransformInfoImplBase::getMaskedMemoryOpCost
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind) const
Definition: TargetTransformInfoImpl.h:586
llvm::None
const NoneType None
Definition: None.h:24
llvm::LinearPolySize< TypeSize >::getFixed
static TypeSize getFixed(ScalarTy MinVal)
Definition: TypeSize.h:283
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
llvm::IntrinsicCostAttributes
Definition: TargetTransformInfo.h:117
llvm::TargetTransformInfoImplBase::getGatherScatterOpCost
InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
Definition: TargetTransformInfoImpl.h:592
llvm::TargetTransformInfo::PSK_Software
@ PSK_Software
Definition: TargetTransformInfo.h:594
llvm::TargetTransformInfoImplBase::getCacheSize
llvm::Optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const
Definition: TargetTransformInfoImpl.h:438
llvm::TargetTransformInfoImplBase::emitGetActiveLaneMask
bool emitGetActiveLaneMask() const
Definition: TargetTransformInfoImpl.h:170
llvm::TargetTransformInfoImplBase::isProfitableLSRChainElement
bool isProfitableLSRChainElement(Instruction *I) const
Definition: TargetTransformInfoImpl.h:222
llvm::ProfileSummaryInfo
Analysis providing profile information.
Definition: ProfileSummaryInfo.h:39
Operands
mir Rename Register Operands
Definition: MIRNamerPass.cpp:74
llvm::ARM_PROC::IE
@ IE
Definition: ARMBaseInfo.h:27
llvm::TargetTransformInfoImplBase::getGEPCost
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind) const
Definition: TargetTransformInfoImpl.h:48
llvm::TargetTransformInfoImplBase::simplifyDemandedVectorEltsIntrinsic
Optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
Definition: TargetTransformInfoImpl.h:186
llvm::TargetTransformInfoImplBase::preferPredicatedReductionSelect
bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
Definition: TargetTransformInfoImpl.h:787
llvm::TargetTransformInfoImplBase::supportsScalableVectors
bool supportsScalableVectors() const
Definition: TargetTransformInfoImpl.h:796
llvm::TargetTransformInfoImplBase::enableMaskedInterleavedAccessVectorization
bool enableMaskedInterleavedAccessVectorization() const
Definition: TargetTransformInfoImpl.h:349
llvm::TargetTransformInfo::SK_Reverse
@ SK_Reverse
Reverse the order of the vector.
Definition: TargetTransformInfo.h:873
llvm::TargetTransformInfoImplCRTPBase::TargetTransformInfoImplCRTPBase
TargetTransformInfoImplCRTPBase(const DataLayout &DL)
Definition: TargetTransformInfoImpl.h:902
llvm::TargetTransformInfoImplBase::getCallInstrCost
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Definition: TargetTransformInfoImpl.h:648
llvm::VectorType
Base class of all SIMD vector types.
Definition: DerivedTypes.h:389
VectorUtils.h
llvm::SCEV
This class represents an analyzed expression in the program.
Definition: ScalarEvolution.h:75
llvm::TargetTransformInfoImplBase::canMacroFuseCmp
bool canMacroFuseCmp() const
Definition: TargetTransformInfoImpl.h:224
llvm::StoreInst
An instruction for storing to memory.
Definition: Instructions.h:305
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::TargetTransformInfo::SK_InsertSubvector
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
Definition: TargetTransformInfo.h:878
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::TargetTransformInfoImplBase::getEstimatedNumberOfCaseClusters
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Definition: TargetTransformInfoImpl.h:60
llvm::TargetTransformInfoImplBase::isLegalNTStore
bool isLegalNTStore(Type *DataType, Align Alignment) const
Definition: TargetTransformInfoImpl.h:245
llvm::TargetTransformInfoImplBase::shouldMaximizeVectorBandwidth
bool shouldMaximizeVectorBandwidth() const
Definition: TargetTransformInfoImpl.h:420
uint64_t
llvm::TargetTransformInfo::LSRCost
Definition: TargetTransformInfo.h:416
llvm::TargetTransformInfoImplBase::isLegalToVectorizeStoreChain
bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
Definition: TargetTransformInfoImpl.h:758
llvm::PatternMatch::m_LogicalOr
LogicalOp_match< LHS, RHS, Instruction::Or > m_LogicalOr(const LHS &L, const RHS &R)
Matches L || R either in the form of L | R or L ? true : R.
Definition: PatternMatch.h:2562
llvm::TargetTransformInfoImplBase::getArithmeticReductionCost
InstructionCost getArithmeticReductionCost(unsigned, VectorType *, Optional< FastMathFlags > FMF, TTI::TargetCostKind) const
Definition: TargetTransformInfoImpl.h:662
llvm::TruncInst
This class represents a truncation of integer types.
Definition: Instructions.h:4780
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
llvm::TargetTransformInfoImplBase::simplifyDemandedUseBitsIntrinsic
Optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
Definition: TargetTransformInfoImpl.h:180
llvm::TargetTransformInfoImplBase::getPreferredAddressingMode
TTI::AddressingModeKind getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const
Definition: TargetTransformInfoImpl.h:233
llvm::TargetTransformInfo::UnrollingPreferences
Parameters that control the generic loop unrolling transformation.
Definition: TargetTransformInfo.h:430
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::TargetTransformInfoImplBase::getCastInstrCost
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
Definition: TargetTransformInfoImpl.h:501
llvm::TargetTransformInfo::OperandValueProperties
OperandValueProperties
Additional properties of an operand's values.
Definition: TargetTransformInfo.h:898
llvm::LoopAccessInfo
Drive the analysis of memory accesses in the loop.
Definition: LoopAccessAnalysis.h:558
llvm::SCEVConstant
This class represents a constant integer value.
Definition: ScalarEvolutionExpressions.h:60
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::TargetTransformInfo::VPLegalization::Discard
@ Discard
Definition: TargetTransformInfo.h:1441
SI
StandardInstrumentations SI(Debug, VerifyEach)
llvm::TargetTransformInfoImplBase::shouldConsiderAddressTypePromotion
bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const
Definition: TargetTransformInfoImpl.h:429
llvm::TargetTransformInfoImplBase::isLoweredToCall
bool isLoweredToCall(const Function *F) const
Definition: TargetTransformInfoImpl.h:121
llvm::CmpInst::BAD_ICMP_PREDICATE
@ BAD_ICMP_PREDICATE
Definition: InstrTypes.h:752
Mode
SI Whole Quad Mode
Definition: SIWholeQuadMode.cpp:262
function
print Print MemDeps of function
Definition: MemDepPrinter.cpp:82
llvm::TargetTransformInfo::LSRCost::ScaleCost
unsigned ScaleCost
Definition: TargetTransformInfo.h:426
llvm::TargetTransformInfoImplBase::getOperandsScalarizationOverhead
InstructionCost getOperandsScalarizationOverhead(ArrayRef< const Value * > Args, ArrayRef< Type * > Tys) const
Definition: TargetTransformInfoImpl.h:331
llvm::TargetTransformInfoImplBase::getInterleavedMemoryOpCost
unsigned getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond, bool UseMaskForGaps) const
Definition: TargetTransformInfoImpl.h:600
llvm::TargetTransformInfoImplBase::getTgtMemIntrinsic
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const
Definition: TargetTransformInfoImpl.h:684
llvm::TargetTransformInfoImplBase::enableAggressiveInterleaving
bool enableAggressiveInterleaving(bool LoopHasReductions) const
Definition: TargetTransformInfoImpl.h:338
llvm::TargetTransformInfo::OperandValueKind
OperandValueKind
Additional information about an operand's possible values.
Definition: TargetTransformInfo.h:890
llvm::PatternMatch::m_Value
class_match< Value > m_Value()
Match an arbitrary value and ignore it.
Definition: PatternMatch.h:76
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:75
llvm::TargetTransformInfoImplBase::isNoopAddrSpaceCast
bool isNoopAddrSpaceCast(unsigned, unsigned) const
Definition: TargetTransformInfoImpl.h:104
llvm::TargetTransformInfo::MemCmpExpansionOptions
Returns options for expansion of memcmp. IsZeroCmp is.
Definition: TargetTransformInfo.h:773
llvm::TargetTransformInfoImplBase::isLegalNTLoad
bool isLegalNTLoad(Type *DataType, Align Alignment) const
Definition: TargetTransformInfoImpl.h:252
llvm::TargetTransformInfo::TCC_Free
@ TCC_Free
Expected to fold away in lowering.
Definition: TargetTransformInfo.h:261
llvm::TargetTransformInfoImplBase::isElementTypeLegalForScalableVector
bool isElementTypeLegalForScalableVector(Type *Ty) const
Definition: TargetTransformInfoImpl.h:768
llvm::TargetTransformInfoImplBase::getVPMemoryOpCost
InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I) const
Definition: TargetTransformInfoImpl.h:579
llvm::TargetTransformInfoImplBase::shouldExpandReduction
bool shouldExpandReduction(const IntrinsicInst *II) const
Definition: TargetTransformInfoImpl.h:792
llvm::TargetTransformInfoImplBase::getStoreMinimumVF
unsigned getStoreMinimumVF(unsigned VF, Type *, Type *) const
Definition: TargetTransformInfoImpl.h:427
llvm::TargetTransformInfoImplBase::getInliningThresholdMultiplier
unsigned getInliningThresholdMultiplier() const
Definition: TargetTransformInfoImpl.h:70
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::LoopInfo
Definition: LoopInfo.h:1086
llvm::OptimizationRemarkEmitter
The optimization diagnostic interface.
Definition: OptimizationRemarkEmitter.h:33
Mul
BinaryOperator * Mul
Definition: X86PartialReduction.cpp:70
DataLayout.h
llvm::StructType
Class to represent struct types.
Definition: DerivedTypes.h:213
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::TargetTransformInfoImplBase::isLegalBroadcastLoad
bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const
Definition: TargetTransformInfoImpl.h:259
llvm::AssumptionCache
A cache of @llvm.assume calls within a function.
Definition: AssumptionCache.h:42
llvm::TargetTransformInfoImplBase::getGISelRematGlobalCost
unsigned getGISelRematGlobalCost() const
Definition: TargetTransformInfoImpl.h:794
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::Value::getType
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
llvm::TargetTransformInfoImplCRTPBase::getInstructionLatency
InstructionCost getInstructionLatency(const Instruction *I)
Definition: TargetTransformInfoImpl.h:1229
llvm::TargetTransformInfoImplBase::LSRWithInstrQueries
bool LSRWithInstrQueries() const
Definition: TargetTransformInfoImpl.h:305
CostKind
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
llvm::BranchProbability
Definition: BranchProbability.h:29
llvm::TargetTransformInfoImplBase::getVScaleForTuning
Optional< unsigned > getVScaleForTuning() const
Definition: TargetTransformInfoImpl.h:418
llvm::TargetTransformInfoImplBase::getScalarizationOverhead
InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract) const
Definition: TargetTransformInfoImpl.h:325
llvm::TargetTransformInfoImplBase::supportsEfficientVectorElementLoadStore
bool supportsEfficientVectorElementLoadStore() const
Definition: TargetTransformInfoImpl.h:336
llvm::TargetTransformInfoImplBase::isFCmpOrdCheaperThanFCmpZero
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const
Definition: TargetTransformInfoImpl.h:365
llvm::PICLevel::Level
Level
Definition: CodeGen.h:33
llvm::TargetTransformInfoImplBase::getCmpSelInstrCost
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I) const
Definition: TargetTransformInfoImpl.h:554
llvm::TargetTransformInfo::AddressingModeKind
AddressingModeKind
Definition: TargetTransformInfo.h:641
llvm::TargetTransformInfoImplBase::isLegalMaskedLoad
bool isLegalMaskedLoad(Type *DataType, Align Alignment) const
Definition: TargetTransformInfoImpl.h:241
llvm::AMDGPUISD::BFI
@ BFI
Definition: AMDGPUISelLowering.h:429
llvm::TargetTransformInfo::OK_AnyValue
@ OK_AnyValue
Definition: TargetTransformInfo.h:891
LLVM_FALLTHROUGH
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:280
llvm::LoadInst
An instruction for reading from memory.
Definition: Instructions.h:176
llvm::TargetTransformInfo::SK_Transpose
@ SK_Transpose
Transpose two vectors.
Definition: TargetTransformInfo.h:877
llvm::DataLayout::isLegalInteger
bool isLegalInteger(uint64_t Width) const
Returns true if the specified type is known to be a native integer type supported by the CPU.
Definition: DataLayout.h:266
llvm::Value::stripPointerCasts
const Value * stripPointerCasts() const
Strip off pointer casts, all-zero GEPs and address space casts.
Definition: Value.cpp:682
llvm::TargetTransformInfo::CacheLevel::L2D
@ L2D
llvm::ConstantInt::getZExtValue
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:142
Callee
amdgpu Simplify well known AMD library false FunctionCallee Callee
Definition: AMDGPULibCalls.cpp:186
llvm::TargetTransformInfoImplBase::getArithmeticInstrCost
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info, TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo, TTI::OperandValueProperties Opd2PropInfo, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
Definition: TargetTransformInfoImpl.h:471
llvm::APInt::getNullValue
static APInt getNullValue(unsigned numBits)
NOTE: This is soft-deprecated. Please use getZero() instead.
Definition: APInt.h:180
llvm::MCID::Select
@ Select
Definition: MCInstrDesc.h:164
llvm::TargetTransformInfoImplBase::preferInLoopReduction
bool preferInLoopReduction(unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
Definition: TargetTransformInfoImpl.h:782
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::KnownBits
Definition: KnownBits.h:23
llvm::Type::getIntNTy
static IntegerType * getIntNTy(LLVMContext &C, unsigned N)
Definition: Type.cpp:243
llvm::TargetTransformInfo::LSRCost::NumBaseAdds
unsigned NumBaseAdds
Definition: TargetTransformInfo.h:423
llvm::TargetTransformInfoImplBase::forceScalarizeMaskedGather
bool forceScalarizeMaskedGather(VectorType *DataType, Align Alignment) const
Definition: TargetTransformInfoImpl.h:271
llvm::TargetTransformInfoImplBase::getAtomicMemIntrinsicMaxElementSize
unsigned getAtomicMemIntrinsicMaxElementSize() const
Definition: TargetTransformInfoImpl.h:688
llvm::TargetTransformInfoImplBase::getMaxPrefetchIterationsAhead
unsigned getMaxPrefetchIterationsAhead() const
Definition: TargetTransformInfoImpl.h:466
llvm::TargetTransformInfoImplBase::getIntImmCostIntrin
InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const
Definition: TargetTransformInfoImpl.h:388
llvm::StructLayout::getElementOffset
uint64_t getElementOffset(unsigned Idx) const
Definition: DataLayout.h:652
llvm::TargetTransformInfoImplBase::getMemcpyCost
InstructionCost getMemcpyCost(const Instruction *I) const
Definition: TargetTransformInfoImpl.h:75
llvm::TargetTransformInfoImplBase::rewriteIntrinsicWithAddressSpace
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const
Definition: TargetTransformInfoImpl.h:116
llvm::VPIntrinsic
This is the common base class for vector predication intrinsics.
Definition: IntrinsicInst.h:391
VPLegalization
TargetTransformInfo::VPLegalization VPLegalization
Definition: ExpandVectorPredication.cpp:34
llvm::APInt::sextOrTrunc
APInt sextOrTrunc(unsigned width) const
Sign extend or truncate to width.
Definition: APInt.cpp:1002
llvm::TargetTransformInfoImplBase::minRequiredElementSize
unsigned minRequiredElementSize(const Value *Val, bool &isSigned) const
Definition: TargetTransformInfoImpl.h:815
llvm::TypeSize
Definition: TypeSize.h:421
llvm::SCEVAddRecExpr
This node represents a polynomial recurrence on the trip count of the specified loop.
Definition: ScalarEvolutionExpressions.h:342
llvm::TargetTransformInfoImplBase::getLoadVectorFactor
unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
Definition: TargetTransformInfoImpl.h:770
llvm::BitWidth
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:147
llvm::TargetTransformInfoImplBase::isIndexedLoadLegal
bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty, const DataLayout &DL) const
Definition: TargetTransformInfoImpl.h:737
llvm::TargetTransformInfoImplBase::getMinPrefetchStride
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const
Definition: TargetTransformInfoImpl.h:461
llvm::TargetLibraryInfo
Provides information about what library functions are available for the current target.
Definition: TargetLibraryInfo.h:222
llvm::User::operand_values
iterator_range< value_op_iterator > operand_values()
Definition: User.h:266
llvm::TargetTransformInfo::LSRCost::ImmCost
unsigned ImmCost
Definition: TargetTransformInfo.h:424
llvm::TargetTransformInfoImplBase::isLegalAddImmediate
bool isLegalAddImmediate(int64_t Imm) const
Definition: TargetTransformInfoImpl.h:201
llvm::TargetTransformInfoImplBase::getMemoryOpCost
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I) const
Definition: TargetTransformInfoImpl.h:572
llvm::MCID::Add
@ Add
Definition: MCInstrDesc.h:185
llvm::TargetTransformInfoImplBase::getRegisterClassForType
unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const
Definition: TargetTransformInfoImpl.h:396
llvm::TargetTransformInfoImplBase::getRegisterBitWidth
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const
Definition: TargetTransformInfoImpl.h:411
llvm::TargetTransformInfoImplBase::canSaveCmp
bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const
Definition: TargetTransformInfoImpl.h:226
llvm::InstCombiner
The core instruction combiner logic.
Definition: InstCombiner.h:45
llvm::TargetTransformInfoImplBase::instCombineIntrinsic
Optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
Definition: TargetTransformInfoImpl.h:174
llvm::TargetTransformInfoImplBase::DL
const DataLayout & DL
Definition: TargetTransformInfoImpl.h:37
llvm::SCEVConstant::getAPInt
const APInt & getAPInt() const
Definition: ScalarEvolutionExpressions.h:70
llvm::IntrinsicInst
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:46
llvm::HardwareLoopInfo
Attributes of a target dependent hardware loop.
Definition: TargetTransformInfo.h:94
llvm::TargetTransformInfoImplBase::getUnrollingPreferences
void getUnrollingPreferences(Loop *, ScalarEvolution &, TTI::UnrollingPreferences &, OptimizationRemarkEmitter *) const
Definition: TargetTransformInfoImpl.h:194
llvm::TargetTransformInfoImplBase::getExtractWithExtendCost
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const
Definition: TargetTransformInfoImpl.h:539
llvm::TargetTransformInfoImplBase::isConstantStridedAccessLessThan
bool isConstantStridedAccessLessThan(ScalarEvolution *SE, const SCEV *Ptr, int64_t MergeDistance) const
Definition: TargetTransformInfoImpl.h:881
llvm::TargetTransformInfoImplBase::isFPVectorizationPotentiallyUnsafe
bool isFPVectorizationPotentiallyUnsafe() const
Definition: TargetTransformInfoImpl.h:351
ScalarEvolutionExpressions.h
llvm::TargetTransformInfoImplBase::isAlwaysUniform
bool isAlwaysUniform(const Value *V) const
Definition: TargetTransformInfoImpl.h:95
llvm::RecurrenceDescriptor
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
Definition: IVDescriptors.h:69
llvm::TargetTransformInfoImplBase::isLegalMaskedCompressStore
bool isLegalMaskedCompressStore(Type *DataType) const
Definition: TargetTransformInfoImpl.h:280
llvm::IntrinsicCostAttributes::getID
Intrinsic::ID getID() const
Definition: TargetTransformInfo.h:147
llvm::TargetTransformInfo::RegisterKind
RegisterKind
Definition: TargetTransformInfo.h:919
llvm::TargetTransformInfoImplBase::isLegalToVectorizeLoad
bool isLegalToVectorizeLoad(LoadInst *LI) const
Definition: TargetTransformInfoImpl.h:749
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:340
TargetTransformInfo.h
llvm::PatternMatch
Definition: PatternMatch.h:47
llvm::SmallVectorImpl< int >
llvm::MemIntrinsicInfo
Information about a load/store intrinsic defined by the target.
Definition: TargetTransformInfo.h:69
llvm::CallBase
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Definition: InstrTypes.h:1174
llvm::TargetTransformInfoImplBase::getStoreVectorFactor
unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
Definition: TargetTransformInfoImpl.h:776
llvm::TargetTransformInfoImplBase::isLegalToVectorizeLoadChain
bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
Definition: TargetTransformInfoImpl.h:753
GEP
Hexagon Common GEP
Definition: HexagonCommonGEP.cpp:172
llvm::TargetTransformInfoImplBase::isLegalMaskedScatter
bool isLegalMaskedScatter(Type *DataType, Align Alignment) const
Definition: TargetTransformInfoImpl.h:263
llvm::TargetTransformInfo::getOperandInfo
static OperandValueKind getOperandInfo(const Value *V, OperandValueProperties &OpProps)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
Definition: TargetTransformInfo.cpp:692
llvm::TargetTransformInfoImplBase::enableScalableVectorization
bool enableScalableVectorization() const
Definition: TargetTransformInfoImpl.h:798
llvm::TargetTransformInfo::TCC_Basic
@ TCC_Basic
The cost of a typical 'add' instruction.
Definition: TargetTransformInfo.h:262
llvm::SwitchInst
Multiway switch.
Definition: Instructions.h:3243
llvm::OptimizedStructLayoutField
A field in a structure.
Definition: OptimizedStructLayout.h:45
llvm::TargetTransformInfoImplBase::shouldBuildRelLookupTables
bool shouldBuildRelLookupTables() const
Definition: TargetTransformInfoImpl.h:321
llvm::AMDGPU::HSAMD::Kernel::Key::Args
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Definition: AMDGPUMetadata.h:394
llvm::User::getOperand
Value * getOperand(unsigned i) const
Definition: User.h:169
llvm::TargetTransformInfoImplBase::adjustInliningThreshold
unsigned adjustInliningThreshold(const CallBase *CB) const
Definition: TargetTransformInfoImpl.h:71
llvm::TargetTransformInfoImplBase::getShuffleCost
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Ty, ArrayRef< int > Mask, int Index, VectorType *SubTp, ArrayRef< const Value * > Args=None) const
Definition: TargetTransformInfoImpl.h:494
llvm::BranchInst
Conditional or Unconditional Branch instruction.
Definition: Instructions.h:3099
llvm::TargetTransformInfoImplBase::getIntrinsicInstrCost
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Definition: TargetTransformInfoImpl.h:607
llvm::TargetTransformInfoImplBase::prefersVectorizedAddressing
bool prefersVectorizedAddressing() const
Definition: TargetTransformInfoImpl.h:292
llvm::TargetTransformInfoImplBase::useColdCCForColdCall
bool useColdCCForColdCall(Function &F) const
Definition: TargetTransformInfoImpl.h:323
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::TargetTransformInfo::TCK_RecipThroughput
@ TCK_RecipThroughput
Reciprocal throughput.
Definition: TargetTransformInfo.h:211
llvm::TargetTransformInfoImplBase::getIntImmCodeSizeCost
InstructionCost getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty) const
Definition: TargetTransformInfoImpl.h:371
llvm::TargetTransformInfo::AMK_None
@ AMK_None
Definition: TargetTransformInfo.h:644
llvm::TargetTransformInfo::SK_ExtractSubvector
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
Definition: TargetTransformInfo.h:879
llvm::PatternMatch::m_LogicalAnd
LogicalOp_match< LHS, RHS, Instruction::And > m_LogicalAnd(const LHS &L, const RHS &R)
Matches L && R either in the form of L & R or L ? R : false.
Definition: PatternMatch.h:2544
llvm::codeview::PublicSymFlags::Function
@ Function
llvm::TargetTransformInfoImplBase::getPeelingPreferences
void getPeelingPreferences(Loop *, ScalarEvolution &, TTI::PeelingPreferences &) const
Definition: TargetTransformInfoImpl.h:198
llvm::SCEVAddRecExpr::getStepRecurrence
const SCEV * getStepRecurrence(ScalarEvolution &SE) const
Constructs and returns the recurrence indicating how much this expression steps by.
Definition: ScalarEvolutionExpressions.h:360
llvm::TargetTransformInfoImplBase::getMaximumVF
unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const
Definition: TargetTransformInfoImpl.h:426
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:37
llvm::DataLayout::getTypeAllocSize
TypeSize getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:506
llvm::TargetTransformInfoImplBase::getFPOpCost
InstructionCost getFPOpCost(Type *Ty) const
Definition: TargetTransformInfoImpl.h:367
llvm::TargetTransformInfoImplBase::areTypesABICompatible
bool areTypesABICompatible(const Function *Caller, const Function *Callee, const ArrayRef< Type * > &Types) const
Definition: TargetTransformInfoImpl.h:729