LLVM 17.0.0git
WebAssemblyMCInstLower.cpp
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1// WebAssemblyMCInstLower.cpp - Convert WebAssembly MachineInstr to an MCInst //
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file contains code to lower WebAssembly MachineInstrs to their
11/// corresponding MCInst records.
12///
13//===----------------------------------------------------------------------===//
14
24#include "llvm/IR/Constants.h"
25#include "llvm/MC/MCAsmInfo.h"
26#include "llvm/MC/MCContext.h"
27#include "llvm/MC/MCExpr.h"
28#include "llvm/MC/MCInst.h"
32
33using namespace llvm;
34
35// This disables the removal of registers when lowering into MC, as required
36// by some current tests.
38 WasmKeepRegisters("wasm-keep-registers", cl::Hidden,
39 cl::desc("WebAssembly: output stack registers in"
40 " instruction output for test purposes only."),
41 cl::init(false));
42
43static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI);
44
46WebAssemblyMCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const {
47 const GlobalValue *Global = MO.getGlobal();
48 if (!isa<Function>(Global)) {
49 auto *WasmSym = cast<MCSymbolWasm>(Printer.getSymbol(Global));
50 // If the symbol doesn't have an explicit WasmSymbolType yet and the
51 // GlobalValue is actually a WebAssembly global, then ensure the symbol is a
52 // WASM_SYMBOL_TYPE_GLOBAL.
53 if (WebAssembly::isWasmVarAddressSpace(Global->getAddressSpace()) &&
54 !WasmSym->getType()) {
55 const MachineFunction &MF = *MO.getParent()->getParent()->getParent();
56 const TargetMachine &TM = MF.getTarget();
57 const Function &CurrentFunc = MF.getFunction();
58 Type *GlobalVT = Global->getValueType();
60 computeLegalValueVTs(CurrentFunc, TM, GlobalVT, VTs);
61
62 WebAssembly::wasmSymbolSetType(WasmSym, GlobalVT, VTs);
63 }
64 return WasmSym;
65 }
66
67 const auto *FuncTy = cast<FunctionType>(Global->getValueType());
68 const MachineFunction &MF = *MO.getParent()->getParent()->getParent();
69 const TargetMachine &TM = MF.getTarget();
70 const Function &CurrentFunc = MF.getFunction();
71
72 SmallVector<MVT, 1> ResultMVTs;
73 SmallVector<MVT, 4> ParamMVTs;
74 const auto *const F = dyn_cast<Function>(Global);
75 computeSignatureVTs(FuncTy, F, CurrentFunc, TM, ParamMVTs, ResultMVTs);
76 auto Signature = signatureFromMVTs(ResultMVTs, ParamMVTs);
77
78 bool InvokeDetected = false;
79 auto *WasmSym = Printer.getMCSymbolForFunction(
81 Signature.get(), InvokeDetected);
82 WasmSym->setSignature(Signature.get());
83 Printer.addSignature(std::move(Signature));
84 WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION);
85 return WasmSym;
86}
87
88MCSymbol *WebAssemblyMCInstLower::GetExternalSymbolSymbol(
89 const MachineOperand &MO) const {
90 return Printer.getOrCreateWasmSymbol(MO.getSymbolName());
91}
92
93MCOperand WebAssemblyMCInstLower::lowerSymbolOperand(const MachineOperand &MO,
94 MCSymbol *Sym) const {
96 unsigned TargetFlags = MO.getTargetFlags();
97
98 switch (TargetFlags) {
100 break;
103 break;
106 break;
109 break;
112 break;
115 break;
116 default:
117 llvm_unreachable("Unknown target flag on GV operand");
118 }
119
120 const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Kind, Ctx);
121
122 if (MO.getOffset() != 0) {
123 const auto *WasmSym = cast<MCSymbolWasm>(Sym);
124 if (TargetFlags == WebAssemblyII::MO_GOT)
125 report_fatal_error("GOT symbol references do not support offsets");
126 if (WasmSym->isFunction())
127 report_fatal_error("Function addresses with offsets not supported");
128 if (WasmSym->isGlobal())
129 report_fatal_error("Global indexes with offsets not supported");
130 if (WasmSym->isTag())
131 report_fatal_error("Tag indexes with offsets not supported");
132 if (WasmSym->isTable())
133 report_fatal_error("Table indexes with offsets not supported");
134
136 Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
137 }
138
139 return MCOperand::createExpr(Expr);
140}
141
142MCOperand WebAssemblyMCInstLower::lowerTypeIndexOperand(
144 SmallVector<wasm::ValType, 4> &&Params) const {
145 auto Signature = std::make_unique<wasm::WasmSignature>(std::move(Returns),
146 std::move(Params));
147 MCSymbol *Sym = Printer.createTempSymbol("typeindex");
148 auto *WasmSym = cast<MCSymbolWasm>(Sym);
149 WasmSym->setSignature(Signature.get());
150 Printer.addSignature(std::move(Signature));
151 WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION);
152 const MCExpr *Expr =
154 return MCOperand::createExpr(Expr);
155}
156
159 const Function &F = MI->getMF()->getFunction();
160 const TargetMachine &TM = MI->getMF()->getTarget();
161 Type *RetTy = F.getReturnType();
162 SmallVector<MVT, 4> CallerRetTys;
163 computeLegalValueVTs(F, TM, RetTy, CallerRetTys);
164 valTypesFromMVTs(CallerRetTys, Returns);
165}
166
168 MCInst &OutMI) const {
169 OutMI.setOpcode(MI->getOpcode());
170
171 const MCInstrDesc &Desc = MI->getDesc();
172 unsigned NumVariadicDefs = MI->getNumExplicitDefs() - Desc.getNumDefs();
173 for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
174 const MachineOperand &MO = MI->getOperand(I);
175
176 MCOperand MCOp;
177 switch (MO.getType()) {
178 default:
179 MI->print(errs());
180 llvm_unreachable("unknown operand type");
182 MI->print(errs());
183 llvm_unreachable("MachineBasicBlock operand should have been rewritten");
185 // Ignore all implicit register operands.
186 if (MO.isImplicit())
187 continue;
188 const WebAssemblyFunctionInfo &MFI =
189 *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>();
190 unsigned WAReg = MFI.getWAReg(MO.getReg());
191 MCOp = MCOperand::createReg(WAReg);
192 break;
193 }
195 unsigned DescIndex = I - NumVariadicDefs;
196 if (DescIndex < Desc.NumOperands) {
197 const MCOperandInfo &Info = Desc.operands()[DescIndex];
198 if (Info.OperandType == WebAssembly::OPERAND_TYPEINDEX) {
201
202 const MachineRegisterInfo &MRI =
203 MI->getParent()->getParent()->getRegInfo();
204 for (const MachineOperand &MO : MI->defs())
205 Returns.push_back(
206 WebAssembly::regClassToValType(MRI.getRegClass(MO.getReg())));
207 for (const MachineOperand &MO : MI->explicit_uses())
208 if (MO.isReg())
209 Params.push_back(
210 WebAssembly::regClassToValType(MRI.getRegClass(MO.getReg())));
211
212 // call_indirect instructions have a callee operand at the end which
213 // doesn't count as a param.
214 if (WebAssembly::isCallIndirect(MI->getOpcode()))
215 Params.pop_back();
216
217 // return_call_indirect instructions have the return type of the
218 // caller
219 if (MI->getOpcode() == WebAssembly::RET_CALL_INDIRECT)
220 getFunctionReturns(MI, Returns);
221
222 MCOp = lowerTypeIndexOperand(std::move(Returns), std::move(Params));
223 break;
224 } else if (Info.OperandType == WebAssembly::OPERAND_SIGNATURE) {
225 auto BT = static_cast<WebAssembly::BlockType>(MO.getImm());
229 getFunctionReturns(MI, Returns);
230 MCOp = lowerTypeIndexOperand(std::move(Returns),
232 break;
233 }
234 }
235 }
236 MCOp = MCOperand::createImm(MO.getImm());
237 break;
238 }
240 const ConstantFP *Imm = MO.getFPImm();
241 const uint64_t BitPattern =
242 Imm->getValueAPF().bitcastToAPInt().getZExtValue();
243 if (Imm->getType()->isFloatTy())
244 MCOp = MCOperand::createSFPImm(static_cast<uint32_t>(BitPattern));
245 else if (Imm->getType()->isDoubleTy())
246 MCOp = MCOperand::createDFPImm(BitPattern);
247 else
248 llvm_unreachable("unknown floating point immediate type");
249 break;
250 }
252 MCOp = lowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
253 break;
255 MCOp = lowerSymbolOperand(MO, GetExternalSymbolSymbol(MO));
256 break;
258 assert(MO.getTargetFlags() == 0 &&
259 "WebAssembly does not use target flags on MCSymbol");
260 MCOp = lowerSymbolOperand(MO, MO.getMCSymbol());
261 break;
262 }
263
264 OutMI.addOperand(MCOp);
265 }
266
269 else if (Desc.variadicOpsAreDefs())
270 OutMI.insert(OutMI.begin(), MCOperand::createImm(MI->getNumExplicitDefs()));
271}
272
273static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) {
274 // Remove all uses of stackified registers to bring the instruction format
275 // into its final stack form used thruout MC, and transition opcodes to
276 // their _S variant.
277 // We do this separate from the above code that still may need these
278 // registers for e.g. call_indirect signatures.
279 // See comments in lib/Target/WebAssembly/WebAssemblyInstrFormats.td for
280 // details.
281 // TODO: the code above creates new registers which are then removed here.
282 // That code could be slightly simplified by not doing that, though maybe
283 // it is simpler conceptually to keep the code above in "register mode"
284 // until this transition point.
285 // FIXME: we are not processing inline assembly, which contains register
286 // operands, because it is used by later target generic code.
287 if (MI->isDebugInstr() || MI->isLabel() || MI->isInlineAsm())
288 return;
289
290 // Transform to _S instruction.
291 auto RegOpcode = OutMI.getOpcode();
292 auto StackOpcode = WebAssembly::getStackOpcode(RegOpcode);
293 assert(StackOpcode != -1 && "Failed to stackify instruction");
294 OutMI.setOpcode(StackOpcode);
295
296 // Remove register operands.
297 for (auto I = OutMI.getNumOperands(); I; --I) {
298 auto &MO = OutMI.getOperand(I - 1);
299 if (MO.isReg()) {
300 OutMI.erase(&MO);
301 }
302 }
303}
unsigned const MachineRegisterInfo * MRI
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
This file contains the declarations for the subclasses of Constant, which represent the different fla...
return RetTy
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
cl::opt< bool > WasmKeepRegisters
This file defines the interfaces that WebAssembly uses to lower LLVM code into a selection DAG.
static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI)
cl::opt< bool > WasmKeepRegisters("wasm-keep-registers", cl::Hidden, cl::desc("WebAssembly: output stack registers in" " instruction output for test purposes only."), cl::init(false))
static void getFunctionReturns(const MachineInstr *MI, SmallVectorImpl< wasm::ValType > &Returns)
This file declares the class to lower WebAssembly MachineInstrs to their corresponding MCInst records...
This file declares WebAssembly-specific per-machine-function information.
This file registers the WebAssembly target.
This file contains the declaration of the WebAssembly-specific type parsing utility functions.
This file contains the declaration of the WebAssembly-specific utility functions.
MCSymbol * getSymbol(const GlobalValue *GV) const
Definition: AsmPrinter.cpp:643
MCSymbol * createTempSymbol(const Twine &Name) const
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:256
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:525
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Definition: MCExpr.cpp:194
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
void erase(iterator I)
Definition: MCInst.h:216
unsigned getNumOperands() const
Definition: MCInst.h:208
unsigned getOpcode() const
Definition: MCInst.h:198
iterator insert(iterator I, const MCOperand &Op)
Definition: MCInst.h:224
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
iterator begin()
Definition: MCInst.h:219
void setOpcode(unsigned Op)
Definition: MCInst.h:197
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:206
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:198
ArrayRef< MCOperandInfo > operands() const
Definition: MCInstrDesc.h:239
unsigned getNumDefs() const
Return the number of MachineOperands that are register definitions.
Definition: MCInstrDesc.h:247
unsigned short NumOperands
Definition: MCInstrDesc.h:206
bool variadicOpsAreDefs() const
Return true if variadic operands of this instruction are definitions.
Definition: MCInstrDesc.h:417
This holds information about one operand of a machine instruction, indicating the register class for ...
Definition: MCInstrDesc.h:85
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:134
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:162
static MCOperand createSFPImm(uint32_t Val)
Definition: MCInst.h:148
static MCOperand createImm(int64_t Val)
Definition: MCInst.h:141
static MCOperand createDFPImm(uint64_t Val)
Definition: MCInst.h:155
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:386
void setSignature(wasm::WasmSignature *Sig)
Definition: MCSymbolWasm.h:129
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Representation of each machine instruction.
Definition: MachineInstr.h:68
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:313
MachineOperand class - Representation of each machine instruction operand.
const GlobalValue * getGlobal() const
int64_t getImm() const
bool isImplicit() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
unsigned getTargetFlags() const
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const char * getSymbolName() const
Register getReg() const
getReg - Returns the register number.
const ConstantFP * getFPImm() const
MCSymbol * getMCSymbol() const
@ MO_Immediate
Immediate operand.
@ MO_MCSymbol
MCSymbol reference (for debug/eh info)
@ MO_GlobalAddress
Address of a global value.
@ MO_MachineBasicBlock
MachineBasicBlock reference.
@ MO_Register
Register operand.
@ MO_ExternalSymbol
Name of external global symbol.
@ MO_FPImmediate
Floating-point immediate operand.
int64_t getOffset() const
Return the offset from the symbol in this operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
Definition: Pass.cpp:130
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
void push_back(const T &Elt)
Definition: SmallVector.h:416
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:78
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
MCSymbol * getOrCreateWasmSymbol(StringRef Name)
MCSymbolWasm * getMCSymbolForFunction(const Function *F, bool EnableEmEH, wasm::WasmSignature *Sig, bool &InvokeDetected)
void addSignature(std::unique_ptr< wasm::WasmSignature > &&Sig)
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
unsigned getWAReg(unsigned VReg) const
void lower(const MachineInstr *MI, MCInst &OutMI) const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
bool isCallIndirect(unsigned Opc)
wasm::ValType regClassToValType(unsigned RC)
void wasmSymbolSetType(MCSymbolWasm *Sym, const Type *GlobalVT, const SmallVector< MVT, 1 > &VTs)
Sets a Wasm Symbol Type.
cl::opt< bool > WasmEnableEmEH
BlockType
Used as immediate MachineOperands for block signatures.
@ OPERAND_TYPEINDEX
type signature immediate for call_indirect.
@ OPERAND_SIGNATURE
signature immediate for block/loop.
cl::opt< bool > WasmEnableEmSjLj
int getStackOpcode(unsigned short Opcode)
bool isWasmVarAddressSpace(unsigned AS)
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:445
@ WASM_SYMBOL_TYPE_FUNCTION
Definition: Wasm.h:383
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void computeSignatureVTs(const FunctionType *Ty, const Function *TargetFunc, const Function &ContextFunc, const TargetMachine &TM, SmallVectorImpl< MVT > &Params, SmallVectorImpl< MVT > &Results)
void valTypesFromMVTs(const ArrayRef< MVT > &In, SmallVectorImpl< wasm::ValType > &Out)
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:145
std::unique_ptr< wasm::WasmSignature > signatureFromMVTs(const SmallVectorImpl< MVT > &Results, const SmallVectorImpl< MVT > &Params)
raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
@ Global
Append to llvm.global_dtors.
void computeLegalValueVTs(const WebAssemblyTargetLowering &TLI, LLVMContext &Ctx, const DataLayout &DL, Type *Ty, SmallVectorImpl< MVT > &ValueVTs)